50. DAC 2013: Austin, TX, USA

Emerging mapping and management algorithms for parallel embedded systems

Lay it out, analog!

Designing and modeling biology continues: hurdles and progress

Transformations in FPGA design and productivity

Balancing security and utility in medical devices

Teaching the old backend compiler dog new tricks

Answers to some of your embedded system design questions

Don't fret about your FinFet: physical design in 14nm and beyond

Taming the beast: coping with imperfect design and silicon defects

The silicon flashlight: mapping the road to 6nm

Better to be proactive or be a slacker in NoC design?

Off-the-shelf techniques for quantum and bio circuits

Enlarging the universe: innovative exploration for RTL and high-level synthesis

Emerging application-oriented, low-power techniques

Huff and PUF

Secrets of analog verification

Litho is hot!

Understanding mother nature and taming its wrath

The future of operating systems for embedded systems and software (ESS)

Captcha the chip!

Multi challenges of embedded multi-processing

Accelerated simulation and verification for power grid and memory

We're gonna route around the clock

21st century digital design tools

Electronics and software on wheels: embedded systems design challenges for electric vehicles and the path ahead

Adventures in time and space: targeting resiliency

New frontiers in EDA: from beyond CMOS to more than Moore

Novel application scenarios for DVFS techniques

Verification: from SystemC to the reality of silicon

The role of cascade, a cycle-based simulation infrastructure, in designing the anton special-purpose supercomputers

The future is here: live demos of the "next" transistor

System compilation for multi-cores: analysis and synthesis

Embedded: when applications and architectures collide