ICCD 2000: Austin, Texas, USA

Keynote Address

Session 1.1: New Architectures

Session 1.2: Fault-Simulation and ATPG at Different Design Levels

Session 1.3: Advanced Design Techniques

Session 2.1: Improving CPU Performance

Session 2.2: Parasitic Modeling, Analysis, and Optimization

Session 2.3: Low Power and Arithmetic

Session 3.1: Servers and Parallelism

Session 3.2: Circuit Optimization and Analysis

Session 3.3: Logic Circuit Families

Keynote Address

Session 4.1: Intelligent Memory

Session 4.2: Processor Microarchitecture

Session 4.3: Digital Logic Techniques

Session 5.1: Embedded Processors: Architecture and System-Design Issues

Session 5.2: Floorplanning and Partitioning

Session 5.3: Basic Algorithms in Verification and Test

Session 6.1: Special Session: Advancements in DSP Architecture

Session 6.2: Advanced Architectural Design and Synthesis

Session 6.3: Application and Case Studies in Test and Verification

Invited Paper

Session 7.1: Logic Optimization

Session 7.2: High Level Specification and Synthesis

Poster Sessions

maintained by Schloss Dagstuhl LZI at University of Trier