Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID19th RSP 2008: Monterey, California, USA
- The 19th IEEE/IFIP International Symposium on Rapid System Prototyping: RSP 2009, Shortening the Path from Specification to Prototype, 2-5 June 2008, Monterey, California, USA. IEEE Computer Society 2008, ISBN 978-0-7695-3180-9
Keynotes
- Greg Bollella:
The RTSJ for Prototyping Real-Time Systems: A Case Study. - Bruce A. Lewis, Peter H. Feiler:
Multi-dimensional Model Based Engineering Using AADL. - Eric Sax, Stefan Abendroth:
Testing Automotive System Prototypes Far before Driving on the Proving Ground.
System Specification
- Amir A. Khwaja, Joseph E. Urban:
RealSpec: An Executable Specification Language for Prototyping Concurrent Systems. 3-9 - Jérôme Hugues, Maxime Perrotin, Thanassis Tsiodras:
Using MDE for the Rapid Prototyping of Space Critical Systems. 10-16 - William Plishker, Nimish Sane, Mary Kiemb, Kapil Anand, Shuvra S. Bhattacharyya
:
Functional DIF for Rapid Prototyping. 17-23
Embedded Software Design
- Sergio Johann Filho, Alexandra Aguiar, César Augusto Missio Marcon, Fabiano Hessel:
High-Level Estimation of Execution Time and Energy Consumption for Fast Homogeneous MPSoCs Prototyping. 27-33 - Ludovic Demontes, Marius Bonaciu, Paul Amblard:
Software for Multi Processor System on Chip: Moving an MPEG4 Decoder from Generic RISC Platforms to CELL. 34-40 - Benaoumeur Senouci, Abdellah-Medjadji Kouadri-Kouadri, Frédéric Rousseau, Frédéric Pétrot:
Multi-CPU/FPGA Platform Based Heterogeneous Multiprocessor Prototyping: New Challenges for Embedded Software Designers. 41-47
MPSoC Design
- Hao Shen, Patrice Gerin, Frédéric Pétrot:
Configurable Heterogeneous MPSoC Architecture Exploration Using Abstraction Levels. 51-57 - Slobodan Lukovic, Leandro Fiorin:
An Automated Design Flow for NoC-based MPSoCs on FPGA. 58-64 - Edson Ifarraguirre Moreno, Katalin Maria Popovici, Ney Laert Vilar Calazans, Ahmed Amine Jerraya:
Integrating Abstract NoC Models within MPSoC Design. 65-71
Methodology
- Laurent Moss, Marc-André Cantin, Guy Bois, El Mostapha Aboulhamid:
Automation of Communication Refinement and Hardware Synthesis within a System-Level Design Methodology. 75-81 - Heiko Hinkelmann, Andreas Reinhardt, Manfred Glesner:
A Methodology for Wireless Sensor Network Prototyping with Sophisticated Debugging Support. 82-88 - André Meisel, Alexander Draeger, Sven Schneider, Wolfram Hardt:
Design Flow for Reconfiguration Based on the Overlaying Concept. 89-95
Verification
- Yingpan Wu, Lixin Yu, Lidong Lan, Haiyang Zhou:
A Coverage-Driven Constraint Random-Based Functional Verification Method of Memory Controller. 99-104 - Sabnam Sengupta, Ananya Kanjilal, Swapan Bhattacharya:
Requirement Traceability in Software Development Process: An Empirical Approach. 105-111 - Fakhreddine Ghaffari, Benoît Miramond, François Verdier:
Dynamic Adaptation of Hardware-Software Scheduling for Reconfigurable System-on-Chip. 112-118
FPGA Design
- Susan Xu, Hugh Pollitt-Smith:
A Multi-MicroBlaze Based SOC System: From SystemC Modeling to FPGA Prototyping. 121-127 - Olivier Muller, Amer Baghdadi, Michel Jézéquel:
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding. 128-134 - Benjamin Glas, Alexander Klimm, David Schwab, Klaus D. Müller-Glaser, Jürgen Becker:
A Prototype of Trusted Platform Functionality on Reconfigurable Hardware for Bitstream Updates. 135-141 - Mateusz Majer, Stefan Wildermann, Josef Angermeier, Stefan Hanke, Jürgen Teich:
Co-design Architecture and Implementation for Point-Based Rendering on FPGAs. 142-148
Image Processing
- Xiaohua Tian, Thinh M. Le, Xi Jiang, Yong Lian:
Implementation Strategies for Statistical Codec Designs in H.264/AVC Standard. 151-157 - N. T. Ngo, Trang T. T. Do, Thinh M. Le, Y. S. Kadam, Amine Bermak:
ASIP-controlled Inverse Integer Transform for H.264/AVC Compression. 158-164 - V. Mariatos, Kostas Adaos, George Alexiou:
A Novel System-on-Chip Architecture for Efficient Image Processing. 165-171
Case Studies
- Ryan Wood, Joseph C. Libby, Kenneth B. Kent:
Application Specific Instruction Sets and their Impact on the Design Space Requirements of a Hardware Java Virtual Machine. 175-181 - Ryan B. Proudfoot, Kenneth B. Kent, Eric E. Aubanel, Nan Chen:
Flexible Software-Hardware Network Intrusion Detection System. 182-188 - Gregory P. Ball, Kevin Squire, Craig H. Martell, Man-tak Shing:
MAJIC: A Java Application for Controlling Multiple, Heterogeneous Robotic Agents. 189-195 - Christopher Spies, Peter Zipf, Manfred Glesner, Harald Klingbeil:
Bandwidth Requirement Determination for a Digitally Controlled Cavity Synchronisation in a Heavy Ion Synchrotron Using Ptolemy II. 196-202 - Author Index. 203
- Publisher's Information. 204
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-04-18 20:19 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
