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ORCIDIEEE Transactions on Electronic Computers, Volume 14
Volume 14, Number 1, February 1965
- Michael Yoeli, G. Rosenfeld:
A New Reader Service-Publication of Informational Retrieval Catalog Cards. 7-8 - Ching-Lai Sheng:
A Graphical Interpretation of Realization of Symmetric Boolean Functions with Threshold Logic Elements. 8-18 - Michael Yoeli, G. Rosenfeld:
Logical Design of Ternary Switching Circuits. 19-29 - R. H. S. Riordan, R. R. A. Morton:
The Use of Analog Techniques in Binary Arithmetic Units. 29-35 - Charles P. Womack:
Schmoo Plot Analysis of Coincident-Current Memory Systems. 36-44 - K. Fukunaga, T. Ito:
A Design Theory of Recognition Functions in Self-Organizing Systems. 44-52 - Arthur Hausner:
The Solution of Lagrange's Equations by Analog Computation. 53-61 - R. E. Burke, J. G. Van Bosse:
Correction [to "Some techniques of state assignment for synchronous sequential machines"]. 61 - C. Hugh Mays:
The Relationship of Algorithms Used with Adjustable Threshold Elements to Differential Equations. 62-63 - R. E. Burke, J. G. Van Bosse:
NAND-AND Circuits. 63-65 - C. Hugh Mays:
The Boundary Matrix of Threshold Functions. 65-66 - C. K. Chow:
Statistical Independence and Threshold Functions. 66-68 - J. E. Olivares:
Synthesis of Nonconstant Weight Binary Codes for Minimum Diode Counters. 69-72 - R. S. Gaines, Chester V. Lee:
An Improved Cell Memory. 72-75 - Thomas A. Kriz, T. Koryu Ishii:
Microwave Readout of Ferrite Memory Storage. 75-76 - Sundaram Seshu:
On an Improved Diagnosis Program. 76-79 - R. A. Smith:
Minimal Three-Variable NOR and NAND Logic Circuits. 79-81 - Richard M. Brown:
An Experimental Study of an On-Line Man-Computer System. 82-85 - W. H. Specker:
A Class of Algorithms for Ln x, Exp x, Sin x, Cos x, Tan-1 x, and Cot-1 x. 85-86
Volume 14, Number 2, April 1965
- Saburo Muroga:
Generation and Asymmetry of Self-Dual Threshold Functions. 125-136 - Saburo Muroga:
Lower Bounds of the Number of Threshold Functions and a Maximum Weight. 136-148 - Janusz A. Brzozowski:
Regular Expressions for Linear Sequential Circuits. 148-156 - Herschel H. Loomis Jr.:
Completeness of Sets of Delayed-Logic Devices. 157-172 - Herschel H. Loomis Jr., Robert H. Wyman Jr.:
On Complete Sets of Logic Primitives. 173-174 - Sheldon B. Akers Jr.:
A Diagrammatic Approach to Multilevel Logic Synthesis. 174-181 - Gernot Metze:
Minimal Square Rooting. 181-185 - Bently A. Crane, J. A. Githens:
Bulk Processing in Distributed Logic Memory. 186-196 - Charles J. Peters:
A Magnetically Scanned Magnetic Tape Transducer. 196-203 - Hugh M. Sierra:
Linear, Passive, Matched Filter for Digital Magnetic Recording. 204-209 - Frank N. Marzocco:
Computer Recognition of Handwritten First Names. 210-217 - C. P. Gilbert, B. J. J. McHugh:
Economical Circuits for the Analog Solution of Algebraic Equations. 217-229 - Jacques J. Vidal, S. M. Bawin:
Frequency Analysis of Truncation Errors in RC Networks. 229-233 - S. K. Chan, E. F. Kurtz:
On Using an Analog Computer to Study Hydrodynamic Stability. 233-238 - Charles F. Hepner:
Improved Methods of Simulating Time Delays. 239-243 - Amos Nathan:
The Cascade Multiplier. 243-247 - S. K. Chan, E. F. Kurtz:
Correction [to "An approach to single-threshold-element synthesis"]. 247 - Jorge Santos, Héctor Arango, Manuel Pascual:
A Ternary Storage Element Using a Conventional Ferrite Core. 248 - B. Scheff:
Using a Decision-Table Structure as the Input Language Format for Programming Automatic Test Equipment Systems. 248-250 - Kenneth R. Kaplan, Robert O. Winder:
Chebyshev Approximation and Threshold Functions. 250-252 - Robert O. Winder:
Properties of Threshold Functions. 252-254 - Earl E. Gose:
A Synthesis Technique for Networks Consisting of Logical Functions Feeding a Linear Summation Element. 254-256 - J. E. Price:
Counting with Majority-Logic Networks. 256-260 - Richard Wesley Hamming, Wanda L. Mammel:
A Note on the Location of the Binary Point in a Computing Machine. 260-261 - Donald W. Davies:
Longest "Separated" Paths and Loops in an N Cube. 261 - Irving S. Reed:
Some Remarks on State Reduction of Asynchronous Circuits by the Paull-Unger Method. 262-265 - Stuart B. Lerner:
Hazard Correction in Asynchronous Sequential Circuits. 265-267 - R. W. Ahrons:
Calculations of Speed of Ladder Network for Superconductive Associative Memories. 267-270 - Maurice V. Wilkes:
Slave Memories and Dynamic Storage Allocation. 270-271
Volume 14, Number 3, June 1965
- Robert O. Winder:
Enumeration of Seven-Argument Threshold Functions. 315-325 - Thomas M. Cover:
Geometrical and Statistical Properties of Systems of Linear Inequalities with Applications in Pattern Recognition. 326-334 - D. M. Y. Chang, Thomas H. Mott Jr.:
Computing Irredundant Normal Forms from Abbreviated Presence Functions. 335-342 - A. J. Nichols, A. J. Bernstein:
State Assignments in Combinational Networks. 343-349 - Antonio Grasselli, Fabrizio Luccio:
A Method for Minimizing the Number of Internal States in Incompletely Specified Sequential Networks. 350-359 - Roy L. Russo:
Synthesis of Error-Tolerant Counters Using Minimum Distance Three State Assignments. 359-366 - Martin Cohn, Shimon Even:
Identification and Minimization of Linear Machines. 367-376 - James H. Pugsley:
Sequential Functions and Linear Sequential Machines. 376-382 - Jack Goldberg, Robert A. Short:
Antiparallel Control Logic. 383-393 - A. J. Atrubin:
A One-Dimensional Real-Time Iterative Multiplier. 394-399 - H. C. Brearley Jr.:
ILLIAC II-A Short Description and Annotated Bibliography. 399-403 - M. S. Zucker:
LOCS: An EDP Machine Logic and Control Simulator. 403-416 - Yaohan Chu:
Direct Execution of Programs in Floating Code by Address Interpretation. 417-422 - H. Mott, C. C. Carroll:
A Versatile Comparator for Encoding Devices. 423-427 - Morton H. Lewin, H. R. Beelitz, J. Guarracini:
Fixed Resistor-Card Memory. 428-434 - Herbert A. Glucksman:
A Parapropagation Pattern Classifier. 434-443 - Arthur I. Rubin, G. F. Graber:
Acoustic Ray Tracing on the General-Purpose Electronic-Analog Computer. 443-455 - Robert M. Deiters:
Optimum Design of a Diode Squarer by Applying the Criterion of Square Root of the Integral of Per Cent Error Squared. 456-463 - Arthur Gill:
On the Bound to the Memory of a Sequential Machine. 464-466 - Gregory J. Chaitin:
An Improvement on a Theorem of E. F. Moore. 466-467 - Stephen S. Yau:
Autonomous Clocks in Sequential Machines. 467-472 - Stephen H. Unger:
Flow Table Simplification-Some Useful Aids. 472-475 - Otakar A. Horna:
A Geometric Synthesis Method of Three-Input Majority Logic Networks. 475-481 - Haruhisa Ishida, Robert M. Stewart Jr.:
A Learning Network Using Adaptive Threshold Elements. 481-485 - James F. Gimpel:
A Method of Producing a Boolean Function Having an Arbitrarily Prescribed Prime Implicant Table. 485-488 - Sheldon B. Akers Jr.:
On the Construction of (d, k) Graphs. 488 - Robert F. Rosin:
A Special Purpose Computer for Solution of Partial Differential Equations and Other Iterative Algorithms. 488-490 - G. K. Aggarwal:
Effect of Finite Gain on One-Amplifier Circuits. 491-492 - Walter Del Picchia:
New Type of Transistorized Digital Analog Converter. 492
Volume 14, Number 4, August 1965
- James F. Gimpel:
A Reduction Technique for Prime Implicant Tables. 535-541 - Franco Mileto, Gianfranco R. Putzolu:
Average Values of Quantities Appearing in Multiple Output Boolean Minimization. 542-552 - John E. Hopcroft, Richard L. Mattson:
Synthesis of Minimal Threshold Logic Networks. 552-560 - Shimon Even:
On Information Lossless Automata of Finite Order. 561-569 - Thomas C. Bartee, D. J. Chapman:
Design of an Accumulator for a General Purpose Computer. 570-574 - Dennis W. Fife, J. L. Smith:
Transmission Capacity of Disk Storage Systems with Concurrent Arm Positioning. 575-582 - Harold K. Knudsen:
The Scaling of Digital Differential Analyzers. 583-590 - W. Bongenaar, N. C. de Troye:
Worst-Case Considerations in Designing Logical Circuits. 590-599 - Yaohan Chu:
A Destructive-Readout Associative Memory. 600-605 - Guillermo Gonzalez:
Delay Approximations for Correlation Measurements Using Analog Computers. 606-617 - Walter W. Wierwille:
Experimental Study of a New Method of Time Delay for Analog Computers. 617-623 - Irving J. Gabelman:
An Algorithm for Threshold Element Analysis. 623-625 - Ming-Tsan Liu:
On the Dual-Monotonicity of Threshold Functions. 625-627 - Rocco H. Urbano:
Matrix Criteria for Arbitrary Reliability in Iterated Neural Nets. 627-629 - Janusz A. Brzozowski:
Some Problems in Relay Circuit Design. 630-634 - Shimon Even:
Comments on the Minimization of Stochastic Machines. 634-637 - Gordon A. Rose:
"Light-Pen"' Facilities for Direct View Storage Tubes-An Economical Solution for Multiple Man-Machine Communication. 637-639 - Andrew Richard Martin, Allen B. Rosenstein:
A Shiftrix for High-Speed Multiplication. 639-643 - Otakar A. Horna:
Figure of Merit of Electronic Switching Devices. 643-646 - H. Mott, C. C. Carroll:
A Functional Counter. 646-647 - George L. Powers:
Comment on NOR-NAND Synthesis. 648
Volume 14, Number 5, October 1965
- Yu-Chi Ho, R. L. Kashyap:
An Algorithm for Linear Inequalities and its Applications. 683-688 - A. J. Nichols:
Minimal Shift-Register Realizations of Sequential Machines. 688-700 - D. T. Ellis:
A Synthesis of Combinational Logic with NAND or NOR Elements. 701-705 - Herbert Y. Chang:
An Algorithm for Selecting an Optimum Set of Diagnostic Tests. 706-711 - Karyl J. Gurzi:
Estimates for Best Placement of Voters in a Triplicated Logic Network. 711-717 - Robert H. Whigham:
A Fast Analog Comparison for Hybrid Computation. 717-719 - Karl S. Menger:
Characterization and Cardinality of Universal Functions. 720-721 - L. M. Maxwell, E. E. Olander:
A Method of Determining the Number of Vertices Contained in the SC Network Corresponding to a Given SC Transmission Function. 721-723 - C. V. Ramamoorthy:
Connectivity Considerations of Graphs Representing Discrete Sequential Systems. 724-727 - Barrett Hazeltine:
Encoding of Asynchronous Sequential Circuits. 727-729 - F. R. Frola:
A Note on the Problem of Classifying Vertices of the n Cube into m Categories. 729-730 - V. Varshavsky, B. Ovsievich:
Networks Composed of Ternary Majority Elements. 730-733 - I. Brcic:
"Ideally Fast" Decimal Counters with Bistables. 733-737 - Karl Steinbuch, Bernard Widrow:
A Critical Comparison of Two Kinds of Adaptive Classification Networks. 737-740 - Peter Fellgett:
Logical Design of Analog-to-Digital Converters. 740-741
Volume 14, Number 6, December 1965
- Rocco H. Urbano:
Some New Results on the Convergence, Oscillation, and Reliability of Polyfunctional Nets. 769-781 - Juris Hartmanis:
Two Tests for the Linearity of Sequential Machines. 781-786 - Florin S. Stanciulescu:
Sequential Logic and its Application to the Synthesis of Finite Automata. 786-791 - Franco P. Preparata:
On the Realizability of Special Classes of Autonomous Sequential Networks. 791-797 - Ching-Lai Sheng:
Compound Synthesis of Threshold-Logic Network for the Realization of General Boolean Functions. 798-814 - Michael Yoeli:
A Group-Theoretical Approach to Two-Rail Cascades. 815-822 - Frank M. Brown:
Code Transformation in Sequential Machines. 822-829 - Angelo R. Meo:
On the Determination of the ps Maximal Implicants of a Switching Function. 830-840 - Ronald E. Prather:
On Tree Circuits. 841-851 - Harold S. Stone, A. J. Korenjak:
Canonical Form and Synthesis of Cellular Cascades. 852-862 - M. Combet, H. Van Zonneveld, L. Verbeek:
Computation of the Base Two Logarithm of Binary Numbers. 863-867 - Donald L. Dietmeyer, Peter R. Schneider:
A Computer-Oriented Factoring Algorithm for NOR Logic Design. 868-874 - Frank C. Yao:
Interconnection and Noise Immunity of Circuitry in Digital Computers. 875-880 - George W. Taylor:
Utilization of the t* Partial Switching Properties of Ferroelectrics in Memory Devices. 881-886 - Stanoje P. Bingulac, Emir A. Humo:
Analog Computer Generation of Bessel Functions of Arbitrary Order. 886-889 - Rajko Tomovic, N. S. Parezanovic, Michael J. Merritt:
Sensitivity of Dynamic Systems to Parameters Which Increase the Order of Mathematical Models. 890-897 - Arthur Hausner:
Analog Computer Techniques for Problems in Complex Variables. 898-908 - Walter W. Wierwille:
A Theory and Method for Correlation Analysis of Nonstationary Signals. 909-919 - S. R. Das, A. K. Choudhury:
Maxterm Type Expressions of Switching Functions and Their Prime Implicants. 920-923 - Ching-Lai Sheng:
Detection of Totally Symmetric Boolean Functions. 924-926 - Shuzo Yajima, Toshihide Ibaraki:
A Lower Bound of the Number of Threshold Functions. 926-929 - Sergiu Rudeanu:
On Tohma's Decompositions of Logical Functions. 929-931 - Kenneth E. Batcher:
On the Number of Stable States in a NOR Network. 931-932 - Zvi Kohavi:
Reduction of Output Dependency in Sequential Machines. 932-934 - C. E. Kiessling, Cyril J. Tunis:
Linearly Separable Codes for Adaptive Threshold Networks. 935-936 - Paul E. Wood Jr.:
Digital Differential Analyzers with Arbitrary Stored Interconnections. 936-941 - Fred W. Smith:
Coding Analog Variables for Threshold Logic Discrimination. 941-943 - P. Spiegel, R. L. Luce:
A Nanosecond Monolithic TTL Gate. 944-946 - Harry R. Eckes:
A Fast Mode-Control Switch for Iterative Differential Analyzers. 946-950 - Melvin A. Breuer:
Implementation of Threshold Nets by Integer Linear Programming. 950-952 - F. L. Wang:
An Isomorphic Notation of Switching Circuits. 952-954 - Iwao Toda:
The Tree Set of a Linear Machine. 954-957 - Pierre Lavallée:
Nonstable Cycle and Level Sets for Linear Sequential Machines. 957-959 - Pierre Lavallée:
Some New Group Theoretic Properties of Singular Linear Sequential Machines. 959-961 - Jack Sklansky, A. J. Korenjak, H. S. Stone:
Canonical Tributary Networks. 961-963 - Lucio Tavernini:
The Automatic Sequencing of Block-Operators in the Digital Simulation of Analog and Analog-Hybrid Computers. 963-965
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