BibTeX records: Khosrov Dabbagh-Sadeghipour

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@article{DBLP:journals/tcasI/KhanghahDKAOT22,
  author       = {Meysam M. Khanghah and
                  Khosrov Dabbagh{-}Sadeghipour and
                  Denis Kelly and
                  Cleitus Antony and
                  Peter Ossieur and
                  Paul D. Townsend},
  title        = {A 7-Bit 7-GHz Multiphase Interpolator-Based {DPC} for {CDR} Applications},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {69},
  number       = {10},
  pages        = {3976--3988},
  year         = {2022},
  url          = {https://doi.org/10.1109/TCSI.2022.3191229},
  doi          = {10.1109/TCSI.2022.3191229},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcasI/KhanghahDKAOT22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/Dabbagh-Sadeghipour15,
  author       = {Khosrov Dabbagh{-}Sadeghipour and
                  Paul D. Townsend and
                  Peter Ossieur},
  title        = {Design of a sample-and-hold analog front end for a 56Gb/s {PAM-4}
                  receiver using 65nm {CMOS}},
  booktitle    = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  2015, Lisbon, Portugal, May 24-27, 2015},
  pages        = {1606--1609},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISCAS.2015.7168956},
  doi          = {10.1109/ISCAS.2015.7168956},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/Dabbagh-Sadeghipour15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/Dabbagh-Sadeghipour12,
  author       = {Khosrov Dabbagh{-}Sadeghipour},
  title        = {An accurate track-and-latch comparator},
  journal      = {{IEICE} Electron. Express},
  volume       = {9},
  number       = {8},
  pages        = {808--814},
  year         = {2012},
  url          = {https://doi.org/10.1587/elex.9.808},
  doi          = {10.1587/ELEX.9.808},
  timestamp    = {Fri, 12 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ieiceee/Dabbagh-Sadeghipour12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/Dabbagh-SadeghipourA11,
  author       = {Khosrov Dabbagh{-}Sadeghipour and
                  Asgar Abbaszadeh},
  title        = {Efficient realization of reconfigurable {FIR} filter using the new
                  coefficient representation},
  journal      = {{IEICE} Electron. Express},
  volume       = {8},
  number       = {12},
  pages        = {902--907},
  year         = {2011},
  url          = {https://doi.org/10.1587/elex.8.902},
  doi          = {10.1587/ELEX.8.902},
  timestamp    = {Fri, 12 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ieiceee/Dabbagh-SadeghipourA11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icdsp/AbbaszadehAD11,
  author       = {Asgar Abbaszadeh and
                  Anasystem Azerbaijan and
                  Khosrov Dabbagh{-}Sadeghipour},
  title        = {A new hardware efficient reconfigurable fir filter architecture suitable
                  for {FPGA} applications},
  booktitle    = {17th International Conference on Digital Signal Processing, {DSP}
                  2011, Corfu, Greece, July 6-8, 2011},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ICDSP.2011.6004958},
  doi          = {10.1109/ICDSP.2011.6004958},
  timestamp    = {Thu, 04 Feb 2021 10:37:05 +0100},
  biburl       = {https://dblp.org/rec/conf/icdsp/AbbaszadehAD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/apccas/Dabbagh-Sadeghipour10,
  author       = {Khosrov Dabbagh{-}Sadeghipour},
  title        = {A new offset cancelled latch comparator for high-speed, low-power
                  ADCs},
  booktitle    = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2010,
                  Kuala Lumpur, Malaysia, December 6-9, 2010},
  pages        = {13--16},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/APCCAS.2010.5774892},
  doi          = {10.1109/APCCAS.2010.5774892},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/Dabbagh-Sadeghipour10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sips/AbbaszadehD09,
  author       = {Asgar Abbaszadeh and
                  Khosrov Dabbagh{-}Sadeghipour},
  title        = {A new FPGA-based postprocessor architecture for channel mismatch correction
                  of time interleaved {ADCS}},
  booktitle    = {Proceedings of the {IEEE} Workshop on Signal Processing Systems, SiPS
                  2009, October 7-9, 2009, Tampere, Finland},
  pages        = {202--207},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/SIPS.2009.5336252},
  doi          = {10.1109/SIPS.2009.5336252},
  timestamp    = {Sun, 21 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/sips/AbbaszadehD09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/apccas/Dabbagh-Sadeghipour08,
  author       = {Khosrov Dabbagh{-}Sadeghipour},
  title        = {A new wideband, high-linear passive Sample and Hold structure suitable
                  for high-speed, high-resolution ADCs},
  booktitle    = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008,
                  Macao, China, November 30 2008 - December 3, 2008},
  pages        = {149--152},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/APCCAS.2008.4745982},
  doi          = {10.1109/APCCAS.2008.4745982},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/Dabbagh-Sadeghipour08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icecsys/Dabbagh-SadeghipourA03,
  author       = {Khosrov Dabbagh{-}Sadeghipour and
                  Ali Aghagolzadeh},
  title        = {A new hardware efficient, low power {FIR} digital filter implementation
                  approach},
  booktitle    = {Proceedings of the 2003 10th {IEEE} International Conference on Electronics,
                  Circuits and Systems, {ICECS} 2003, Sharjah, United Arab Emirates,
                  December 14-17, 2003},
  pages        = {1144--1147},
  publisher    = {{IEEE}},
  year         = {2003},
  url          = {https://doi.org/10.1109/ICECS.2003.1301714},
  doi          = {10.1109/ICECS.2003.1301714},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/Dabbagh-SadeghipourA03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}