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BibTeX records: Andrea Marongiu
@inproceedings{DBLP:conf/hipeac/DeroueiVSM24, author = {Mohammadhassan Gholami Derouei and Paolo Valente and Marco Solieri and Andrea Marongiu}, editor = {Patrick Meumeu Yomsi and Stefan Wildermann}, title = {{HMB:} Scheduling PREM-Like Real-Time Tasks at High Memory Bandwidth (Invited Paper)}, booktitle = {Fifth Workshop on Next Generation Real-Time Embedded Systems, {NG-RES} 2024, January 17-19, 2024, Munich, Germany}, series = {OASIcs}, volume = {117}, pages = {1:1--1:18}, publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik}, year = {2024}, url = {https://doi.org/10.4230/OASIcs.NG-RES.2024.1}, doi = {10.4230/OASICS.NG-RES.2024.1}, timestamp = {Mon, 04 Mar 2024 16:45:38 +0100}, biburl = {https://dblp.org/rec/conf/hipeac/DeroueiVSM24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/sensors/BianconiSFKMFMNSP23, author = {Francesco Bianconi and Roberto Salis and Mario Luca Fravolini and Muhammad Usama Khan and Matteo Minestrini and Luca Filippi and Andrea Marongiu and Susanna Nuvoli and Angela Spanu and Barbara Palumbo}, title = {Performance Analysis of Six Semi-Automated Tumour Delineation Methods on {[18F]} Fluorodeoxyglucose Positron Emission Tomography/Computed Tomography {(FDG} {PET/CT)} in Patients with Head and Neck Cancer}, journal = {Sensors}, volume = {23}, number = {18}, pages = {7952}, year = {2023}, url = {https://doi.org/10.3390/s23187952}, doi = {10.3390/S23187952}, timestamp = {Sat, 10 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/sensors/BianconiSFKMFMNSP23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tecs/BrilliCSVM23, author = {Gianluca Brilli and Roberto Cavicchioli and Marco Solieri and Paolo Valente and Andrea Marongiu}, title = {Evaluating Controlled Memory Request Injection for Efficient Bandwidth Utilization and Predictable Execution in Heterogeneous SoCs}, journal = {{ACM} Trans. Embed. Comput. Syst.}, volume = {22}, number = {1}, pages = {7:1--7:25}, year = {2023}, url = {https://doi.org/10.1145/3548773}, doi = {10.1145/3548773}, timestamp = {Tue, 31 Jan 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tecs/BrilliCSVM23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/BrilliVCBMVM23, author = {Gianluca Brilli and Giacomo Valente and Alessandro Capotondi and Paolo Burgio and T. Di Masciov and Paolo Valente and Andrea Marongiu}, title = {Fine-Grained QoS Control via Tightly-Coupled Bandwidth Monitoring and Regulation for FPGA-based Heterogeneous SoCs}, booktitle = {60th {ACM/IEEE} Design Automation Conference, {DAC} 2023, San Francisco, CA, USA, July 9-13, 2023}, pages = {1--6}, publisher = {{IEEE}}, year = {2023}, url = {https://doi.org/10.1109/DAC56929.2023.10247840}, doi = {10.1109/DAC56929.2023.10247840}, timestamp = {Sun, 12 Nov 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/BrilliVCBMVM23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2309-12864, author = {Lorenzo Carletti and Gianluca Brilli and Alessandro Capotondi and Paolo Valente and Andrea Marongiu}, title = {The Importance of Worst-Case Memory Contention Analysis for Heterogeneous SoCs}, journal = {CoRR}, volume = {abs/2309.12864}, year = {2023}, url = {https://doi.org/10.48550/arXiv.2309.12864}, doi = {10.48550/ARXIV.2309.12864}, eprinttype = {arXiv}, eprint = {2309.12864}, timestamp = {Wed, 27 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-2309-12864.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/CapodieciCM22, author = {Nicola Capodieci and Roberto Cavicchioli and Andrea Marongiu}, title = {A Taxonomy of Modern {GPGPU} Programming Methods: On the Benefits of a Unified Specification}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {41}, number = {6}, pages = {1649--1662}, year = {2022}, url = {https://doi.org/10.1109/TCAD.2021.3082863}, doi = {10.1109/TCAD.2021.3082863}, timestamp = {Thu, 02 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/CapodieciCM22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/BernardiBCMB22, author = {Andrea Bernardi and Gianluca Brilli and Alessandro Capotondi and Andrea Marongiu and Paolo Burgio}, editor = {Cristiana Bolchini and Ingrid Verbauwhede and Ioana Vatajelu}, title = {An {FPGA} Overlay for Efficient Real-Time Localization in 1/10th Scale Autonomous Vehicles}, booktitle = {2022 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022}, pages = {915--920}, publisher = {{IEEE}}, year = {2022}, url = {https://doi.org/10.23919/DATE54114.2022.9774517}, doi = {10.23919/DATE54114.2022.9774517}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/BernardiBCMB22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/SinghOCMC22, author = {Jayati Singh and Ignacio Sa{\~{n}}udo Olmedo and Nicola Capodieci and Andrea Marongiu and Marco Caccamo}, editor = {Cristiana Bolchini and Ingrid Verbauwhede and Ioana Vatajelu}, title = {Reconciling QoS and Concurrency in {NVIDIA} GPUs via Warp-Level Scheduling}, booktitle = {2022 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022}, pages = {1275--1280}, publisher = {{IEEE}}, year = {2022}, url = {https://doi.org/10.23919/DATE54114.2022.9774761}, doi = {10.23919/DATE54114.2022.9774761}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/SinghOCMC22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/BrilliCBM22, author = {Gianluca Brilli and Alessandro Capotondi and Paolo Burgio and Andrea Marongiu}, editor = {Cristiana Bolchini and Ingrid Verbauwhede and Ioana Vatajelu}, title = {Understanding and Mitigating Memory Interference in FPGA-based HeSoCs}, booktitle = {2022 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022}, pages = {1335--1340}, publisher = {{IEEE}}, year = {2022}, url = {https://doi.org/10.23919/DATE54114.2022.9774768}, doi = {10.23919/DATE54114.2022.9774768}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/BrilliCBM22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/ForsbergBM21, author = {Bj{\"{o}}rn Forsberg and Luca Benini and Andrea Marongiu}, title = {HePREM: {A} Predictable Execution Model for GPU-based Heterogeneous SoCs}, journal = {{IEEE} Trans. Computers}, volume = {70}, number = {1}, pages = {17--29}, year = {2021}, url = {https://doi.org/10.1109/TC.2020.2980520}, doi = {10.1109/TC.2020.2980520}, timestamp = {Thu, 11 Feb 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tc/ForsbergBM21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tecs/ForsbergSBBM21, author = {Bj{\"{o}}rn Forsberg and Marco Solieri and Marko Bertogna and Luca Benini and Andrea Marongiu}, title = {The Predictable Execution Model in Practice: Compiling Real Applications for {COTS} Hardware}, journal = {{ACM} Trans. Embed. Comput. Syst.}, volume = {20}, number = {5}, pages = {47:1--47:25}, year = {2021}, url = {https://doi.org/10.1145/3465370}, doi = {10.1145/3465370}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tecs/ForsbergSBBM21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/BellocchiCCM21, author = {Gianluca Bellocchi and Alessandro Capotondi and Francesco Conti and Andrea Marongiu}, editor = {Francesco Leporati and Salvatore Vitabile and Amund Skavhaug}, title = {A RISC-V-based {FPGA} Overlay to Simplify Embedded Accelerator Deployment}, booktitle = {24th Euromicro Conference on Digital System Design, {DSD} 2021, Virtual Event / Palermo, Sicily, Italy, September 1-3, 2021}, pages = {9--17}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/DSD53832.2021.00011}, doi = {10.1109/DSD53832.2021.00011}, timestamp = {Mon, 07 Nov 2022 07:58:07 +0100}, biburl = {https://dblp.org/rec/conf/dsd/BellocchiCCM21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hipeac/MadronalPCM21, author = {Daniel Madro{\~{n}}al and Francesca Palumbo and Alessandro Capotondi and Andrea Marongiu}, title = {Unmanned Vehicles in Smart Farming: a Survey and a Glance at Future Horizons}, booktitle = {DroneSE and {RAPIDO} '21: Methods and Tools, Budapest, Hungary, January 18, 2021}, pages = {1--8}, publisher = {{ACM}}, year = {2021}, url = {https://doi.org/10.1145/3444950.3444958}, doi = {10.1145/3444950.3444958}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hipeac/MadronalPCM21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/TagliaviniMB20, author = {Giuseppe Tagliavini and Andrea Marongiu and Luca Benini}, title = {FlexFloat: {A} Software Library for Transprecision Computing}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {39}, number = {1}, pages = {145--156}, year = {2020}, url = {https://doi.org/10.1109/TCAD.2018.2883902}, doi = {10.1109/TCAD.2018.2883902}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/TagliaviniMB20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cc/KurthWFCMGB20, author = {Andreas Kurth and Koen Wolters and Bj{\"{o}}rn Forsberg and Alessandro Capotondi and Andrea Marongiu and Tobias Grosser and Luca Benini}, editor = {Louis{-}No{\"{e}}l Pouchet and Alexandra Jimborean}, title = {Mixed-data-model heterogeneous compilation and OpenMP offloading}, booktitle = {{CC} '20: 29th International Conference on Compiler Construction, San Diego, CA, USA, February 22-23, 2020}, pages = {119--131}, publisher = {{ACM}}, year = {2020}, url = {https://doi.org/10.1145/3377555.3377891}, doi = {10.1145/3377555.3377891}, timestamp = {Mon, 03 Jan 2022 22:32:58 +0100}, biburl = {https://dblp.org/rec/conf/cc/KurthWFCMGB20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/jsspp/CavicchioliCSBV20, author = {Roberto Cavicchioli and Nicola Capodieci and Marco Solieri and Marko Bertogna and Paolo Valente and Andrea Marongiu}, editor = {Dalibor Klus{\'{a}}cek and Walfredo Cirne and Narayan Desai}, title = {Evaluating Controlled Memory Request Injection to Counter {PREM} Memory Underutilization}, booktitle = {Job Scheduling Strategies for Parallel Processing - 23rd International Workshop, {JSSPP} 2020, New Orleans, LA, USA, May 22, 2020, Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {12326}, pages = {85--105}, publisher = {Springer}, year = {2020}, url = {https://doi.org/10.1007/978-3-030-63171-0\_5}, doi = {10.1007/978-3-030-63171-0\_5}, timestamp = {Thu, 14 Oct 2021 10:11:24 +0200}, biburl = {https://dblp.org/rec/conf/jsspp/CavicchioliCSBV20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/lctrts/ForsbergMKMB20, author = {Bj{\"{o}}rn Forsberg and Maxim Mattheeuws and Andreas Kurth and Andrea Marongiu and Luca Benini}, editor = {Jingling Xue and Changhee Jung}, title = {A Synergistic Approach to Predictable Compilation and Scheduling on Commodity Multi-Cores}, booktitle = {Proceedings of the 21st {ACM} {SIGPLAN/SIGBED} International Conference on Languages, Compilers, and Tools for Embedded Systems, {LCTES} 2020, London, UK, June 16, 2020}, pages = {108--118}, publisher = {{ACM}}, year = {2020}, url = {https://doi.org/10.1145/3372799.3394369}, doi = {10.1145/3372799.3394369}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/lctrts/ForsbergMKMB20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/rtas/OlmedoCMMB20, author = {Ignacio Sanudo Olmedo and Nicola Capodieci and Jorge Luis Martinez and Andrea Marongiu and Marko Bertogna}, title = {Dissecting the {CUDA} scheduling hierarchy: a Performance and Predictability Perspective}, booktitle = {{IEEE} Real-Time and Embedded Technology and Applications Symposium, {RTAS} 2020, Sydney, Australia, April 21-24, 2020}, pages = {213--225}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/RTAS48715.2020.000-5}, doi = {10.1109/RTAS48715.2020.000-5}, timestamp = {Fri, 04 Dec 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/rtas/OlmedoCMMB20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/pc/MatejkaFSSBMH19, author = {Joel Matejka and Bj{\"{o}}rn Forsberg and Michal Sojka and Premysl Sucha and Luca Benini and Andrea Marongiu and Zdenek Hanz{\'{a}}lek}, title = {Combining {PREM} compilation and static scheduling for high-performance and predictable MPSoC execution}, journal = {Parallel Comput.}, volume = {85}, pages = {27--44}, year = {2019}, url = {https://doi.org/10.1016/j.parco.2018.11.002}, doi = {10.1016/J.PARCO.2018.11.002}, timestamp = {Mon, 15 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/pc/MatejkaFSSBMH19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/VogelMB19, author = {Pirmin Vogel and Andrea Marongiu and Luca Benini}, title = {Exploring Shared Virtual Memory for {FPGA} Accelerators with a Configurable {IOMMU}}, journal = {{IEEE} Trans. Computers}, volume = {68}, number = {4}, pages = {510--525}, year = {2019}, url = {https://doi.org/10.1109/TC.2018.2879080}, doi = {10.1109/TC.2018.2879080}, timestamp = {Fri, 12 Apr 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/VogelMB19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsisp/PalossiGDMTB19, author = {Daniele Palossi and Andres Gomez and Stefan Draskovic and Andrea Marongiu and Lothar Thiele and Luca Benini}, title = {Extending the Lifetime of Nano-Blimps via Dynamic Motor Control}, journal = {J. Signal Process. Syst.}, volume = {91}, number = {3-4}, pages = {339--361}, year = {2019}, url = {https://doi.org/10.1007/s11265-018-1343-1}, doi = {10.1007/S11265-018-1343-1}, timestamp = {Mon, 26 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsisp/PalossiGDMTB19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/ForsbergBM19, author = {Bj{\"{o}}rn Forsberg and Luca Benini and Andrea Marongiu}, editor = {J{\"{u}}rgen Teich and Franco Fummi}, title = {Taming Data Caches for Predictable Execution on GPU-based SoCs}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2019, Florence, Italy, March 25-29, 2019}, pages = {650--653}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.23919/DATE.2019.8715255}, doi = {10.23919/DATE.2019.8715255}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/ForsbergBM19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/TagliaviniMRMB19, author = {Giuseppe Tagliavini and Stefan Mach and Davide Rossi and Andrea Marongiu and Luca Benini}, editor = {J{\"{u}}rgen Teich and Franco Fummi}, title = {Design and Evaluation of SmallFloat {SIMD} extensions to the {RISC-V} {ISA}}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2019, Florence, Italy, March 25-29, 2019}, pages = {654--657}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.23919/DATE.2019.8714897}, doi = {10.23919/DATE.2019.8714897}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/TagliaviniMRMB19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/esticas/AliotoDM18, author = {Massimo Alioto and Vivek De and Andrea Marongiu}, title = {Guest Editorial Energy-Quality Scalable Circuits and Systems for Sensing and Computing: From Approximate to Communication-Inspired and Learning-Based}, journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.}, volume = {8}, number = {3}, pages = {361--368}, year = {2018}, url = {https://doi.org/10.1109/JETCAS.2018.2865783}, doi = {10.1109/JETCAS.2018.2865783}, timestamp = {Wed, 03 Oct 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/esticas/AliotoDM18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/esticas/AliotoDM18a, author = {Massimo Alioto and Vivek De and Andrea Marongiu}, title = {Energy-Quality Scalable Integrated Circuits and Systems: Continuing Energy Scaling in the Twilight of Moore's Law}, journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.}, volume = {8}, number = {4}, pages = {653--678}, year = {2018}, url = {https://doi.org/10.1109/JETCAS.2018.2881461}, doi = {10.1109/JETCAS.2018.2881461}, timestamp = {Fri, 18 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/esticas/AliotoDM18a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijpp/Papagiannopoulou18, author = {Dimitra Papagiannopoulou and Andrea Marongiu and Tali Moreshet and Luca Benini and Maurice Herlihy and R. Iris Bahar}, title = {Hardware Transactional Memory Exploration in Coherence-Free Many-Core Architectures}, journal = {Int. J. Parallel Program.}, volume = {46}, number = {6}, pages = {1304--1328}, year = {2018}, url = {https://doi.org/10.1007/s10766-018-0569-7}, doi = {10.1007/S10766-018-0569-7}, timestamp = {Wed, 01 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijpp/Papagiannopoulou18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jrtip/TagliaviniHMB18, author = {Giuseppe Tagliavini and Germain Haugou and Andrea Marongiu and Luca Benini}, title = {Optimizing memory bandwidth exploitation for OpenVX applications on embedded many-core accelerators}, journal = {J. Real Time Image Process.}, volume = {15}, number = {1}, pages = {73--92}, year = {2018}, url = {https://doi.org/10.1007/s11554-015-0544-0}, doi = {10.1007/S11554-015-0544-0}, timestamp = {Thu, 18 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jrtip/TagliaviniHMB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/TagliaviniRMB18, author = {Giuseppe Tagliavini and Davide Rossi and Andrea Marongiu and Luca Benini}, title = {Synergistic {HW/SW} Approximation Techniques for Ultralow-Power Parallel Computing}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {37}, number = {5}, pages = {982--995}, year = {2018}, url = {https://doi.org/10.1109/TCAD.2016.2633474}, doi = {10.1109/TCAD.2016.2633474}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/TagliaviniRMB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tetc/CapotondiMB18, author = {Alessandro Capotondi and Andrea Marongiu and Luca Benini}, title = {Runtime Support for Multiple Offload-Based Programming Models on Clustered Manycore Accelerators}, journal = {{IEEE} Trans. Emerg. Top. Comput.}, volume = {6}, number = {3}, pages = {330--342}, year = {2018}, url = {https://doi.org/10.1109/TETC.2016.2554318}, doi = {10.1109/TETC.2016.2554318}, timestamp = {Fri, 15 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tetc/CapotondiMB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tmscs/LoiCRMB18, author = {Igor Loi and Alessandro Capotondi and Davide Rossi and Andrea Marongiu and Luca Benini}, title = {The Quest for Energy-Efficient I{\textdollar} Design in Ultra-Low-Power Clustered Many-Cores}, journal = {{IEEE} Trans. Multi Scale Comput. Syst.}, volume = {4}, number = {2}, pages = {99--112}, year = {2018}, url = {https://doi.org/10.1109/TMSCS.2017.2769046}, doi = {10.1109/TMSCS.2017.2769046}, timestamp = {Wed, 02 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tmscs/LoiCRMB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tpds/TagliaviniCM18, author = {Giuseppe Tagliavini and Daniele Cesarini and Andrea Marongiu}, title = {Unleashing Fine-Grained Parallelism on Embedded Many-Core Accelerators with Lightweight OpenMP Tasking}, journal = {{IEEE} Trans. Parallel Distributed Syst.}, volume = {29}, number = {9}, pages = {2150--2163}, year = {2018}, url = {https://doi.org/10.1109/TPDS.2018.2814602}, doi = {10.1109/TPDS.2018.2814602}, timestamp = {Fri, 02 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tpds/TagliaviniCM18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/IEEEpact/KurthCVBM18, author = {Andreas Kurth and Alessandro Capotondi and Pirmin Vogel and Luca Benini and Andrea Marongiu}, editor = {Andrea Bartolini and Jo{\~{a}}o M. P. Cardoso and Cristina Silvano}, title = {{HERO:} an open-source research platform for {HW/SW} exploration of heterogeneous manycore systems}, booktitle = {Proceedings of the 2nd Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient {HPC} Systems, ANDARE@PACT 2018, Limassol, Cyprus, November 4, 2018}, pages = {5:1--5:6}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3295816.3295821}, doi = {10.1145/3295816.3295821}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/IEEEpact/KurthCVBM18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/ForsbergBM18, author = {Bj{\"{o}}rn Forsberg and Luca Benini and Andrea Marongiu}, editor = {Jan Madsen and Ayse K. Coskun}, title = {HePREM: Enabling predictable {GPU} execution on heterogeneous SoC}, booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018}, pages = {539--544}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.23919/DATE.2018.8342066}, doi = {10.23919/DATE.2018.8342066}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/ForsbergBM18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/TagliaviniMRMB18, author = {Giuseppe Tagliavini and Stefan Mach and Davide Rossi and Andrea Marongiu and Luca Benini}, editor = {Jan Madsen and Ayse K. Coskun}, title = {A transprecision floating-point platform for ultra-low power computing}, booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018}, pages = {1051--1056}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.23919/DATE.2018.8342167}, doi = {10.23919/DATE.2018.8342167}, timestamp = {Tue, 24 Apr 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/TagliaviniMRMB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/KurthVMB18, author = {Andreas Kurth and Pirmin Vogel and Andrea Marongiu and Luca Benini}, title = {Scalable and Efficient Virtual Memory Sharing in Heterogeneous SoCs with {TLB} Prefetching and MMU-Aware {DMA} Engine}, booktitle = {36th {IEEE} International Conference on Computer Design, {ICCD} 2018, Orlando, FL, USA, October 7-10, 2018}, pages = {292--300}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/ICCD.2018.00052}, doi = {10.1109/ICCD.2018.00052}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/KurthVMB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/MachRTMB18, author = {Stefan Mach and Davide Rossi and Giuseppe Tagliavini and Andrea Marongiu and Luca Benini}, title = {A Transprecision Floating-Point Architecture for Energy-Efficient Embedded Computing}, booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018, 27-30 May 2018, Florence, Italy}, pages = {1--5}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.1109/ISCAS.2018.8351816}, doi = {10.1109/ISCAS.2018.8351816}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iscas/MachRTMB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ppopp/MatejkaFSHBM18, author = {Joel Matejka and Bj{\"{o}}rn Forsberg and Michal Sojka and Zdenek Hanz{\'{a}}lek and Luca Benini and Andrea Marongiu}, editor = {Quan Chen and Zhiyi Huang and Pavan Balaji}, title = {Combining {PREM} compilation and {ILP} scheduling for high-performance and predictable MPSoC execution}, booktitle = {Proceedings of the 9th International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM@PPoPP 2018, February 25, 2018, Vienna, Austria}, pages = {11--20}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3178442.3178444}, doi = {10.1145/3178442.3178444}, timestamp = {Sun, 12 Jun 2022 19:46:08 +0200}, biburl = {https://dblp.org/rec/conf/ppopp/MatejkaFSHBM18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/scopes/ForsbergBM18, author = {Bj{\"{o}}rn Forsberg and Luca Benini and Andrea Marongiu}, editor = {Sander Stuijk}, title = {On the Cost of Freedom From Interference in Heterogeneous SoCs}, booktitle = {Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems, {SCOPES} 2018, Sankt Goar, Germany, May 28-30, 2018}, pages = {31--34}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3207719.3207735}, doi = {10.1145/3207719.3207735}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/scopes/ForsbergBM18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-1808-09751, author = {Andreas Kurth and Pirmin Vogel and Andrea Marongiu and Luca Benini}, title = {Scalable and Efficient Virtual Memory Sharing in Heterogeneous SoCs with {TLB} Prefetching and MMU-Aware {DMA} Engine}, journal = {CoRR}, volume = {abs/1808.09751}, year = {2018}, url = {http://arxiv.org/abs/1808.09751}, eprinttype = {arXiv}, eprint = {1808.09751}, timestamp = {Mon, 03 Sep 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-1808-09751.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/BurgioBCCSHMGSM17, author = {Paolo Burgio and Marko Bertogna and Nicola Capodieci and Roberto Cavicchioli and Michal Sojka and Premysl Houdek and Andrea Marongiu and Paolo Gai and Claudio Scordino and Bruno Morelli}, title = {A software stack for next-generation automotive systems on many-core heterogeneous platforms}, journal = {Microprocess. Microsystems}, volume = {52}, pages = {299--311}, year = {2017}, url = {https://doi.org/10.1016/j.micpro.2017.06.016}, doi = {10.1016/J.MICPRO.2017.06.016}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/BurgioBCCSHMGSM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tecs/Papagiannopoulou17, author = {Dimitra Papagiannopoulou and Andrea Marongiu and Tali Moreshet and Maurice Herlihy and R. Iris Bahar}, title = {Edge-TM: Exploiting Transactional Memory for Error Tolerance and Energy Efficiency}, journal = {{ACM} Trans. Embed. Comput. Syst.}, volume = {16}, number = {5s}, pages = {153:1--153:18}, year = {2017}, url = {https://doi.org/10.1145/3126556}, doi = {10.1145/3126556}, timestamp = {Tue, 08 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tecs/Papagiannopoulou17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tecs/VogelKWMB17, author = {Pirmin Vogel and Andreas Kurth and Johannes Weinbuch and Andrea Marongiu and Luca Benini}, title = {Efficient Virtual Memory Sharing via On-Accelerator Page Table Walking in Heterogeneous Embedded SoCs}, journal = {{ACM} Trans. Embed. Comput. Syst.}, volume = {16}, number = {5s}, pages = {154:1--154:19}, year = {2017}, url = {https://doi.org/10.1145/3126560}, doi = {10.1145/3126560}, timestamp = {Tue, 08 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tecs/VogelKWMB17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tpds/VogelMB17, author = {Pirmin Vogel and Andrea Marongiu and Luca Benini}, title = {Lightweight Virtual Memory Support for Zero-Copy Sharing of Pointer-Rich Data Structures in Heterogeneous Embedded SoCs}, journal = {{IEEE} Trans. Parallel Distributed Syst.}, volume = {28}, number = {7}, pages = {1947--1959}, year = {2017}, url = {https://doi.org/10.1109/TPDS.2016.2645219}, doi = {10.1109/TPDS.2016.2645219}, timestamp = {Fri, 02 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tpds/VogelMB17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/ForsbergMB17, author = {Bj{\"{o}}rn Forsberg and Andrea Marongiu and Luca Benini}, editor = {David Atienza and Giorgio Di Natale}, title = {GPUguard: Towards supporting a predictable execution model for heterogeneous SoC}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2017, Lausanne, Switzerland, March 27-31, 2017}, pages = {318--321}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.23919/DATE.2017.7927008}, doi = {10.23919/DATE.2017.7927008}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/ForsbergMB17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/PalossiMB17, author = {Daniele Palossi and Andrea Marongiu and Luca Benini}, editor = {David Atienza and Giorgio Di Natale}, title = {Ultra low-power visual odometry for nano-scale unmanned aerial vehicles}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2017, Lausanne, Switzerland, March 27-31, 2017}, pages = {1647--1650}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.23919/DATE.2017.7927257}, doi = {10.23919/DATE.2017.7927257}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/PalossiMB17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccS/ForsbergPMB17, author = {Bj{\"{o}}rn Forsberg and Daniele Palossi and Andrea Marongiu and Luca Benini}, editor = {Petros Koumoutsakos and Michael Lees and Valeria V. Krzhizhanovskaya and Jack J. Dongarra and Peter M. A. Sloot}, title = {GPU-Accelerated Real-Time Path Planning and the Predictable Execution Model}, booktitle = {International Conference on Computational Science, {ICCS} 2017, 12-14 June 2017, Zurich, Switzerland}, series = {Procedia Computer Science}, volume = {108}, pages = {2428--2432}, publisher = {Elsevier}, year = {2017}, url = {https://doi.org/10.1016/j.procs.2017.05.219}, doi = {10.1016/J.PROCS.2017.05.219}, timestamp = {Thu, 08 Jul 2021 16:04:01 +0200}, biburl = {https://dblp.org/rec/conf/iccS/ForsbergPMB17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/scopes/CapotondiM17, author = {Alessandro Capotondi and Andrea Marongiu}, editor = {Sander Stuijk}, title = {Enabling zero-copy OpenMP offloading on the {PULP} many-core accelerator}, booktitle = {Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, {SCOPES} 2017, Sankt Goar, Germany, June 12-13, 2017}, pages = {68--71}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3078659.3079071}, doi = {10.1145/3078659.3079071}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/scopes/CapotondiM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/scopes/PalossiMB17, author = {Daniele Palossi and Andrea Marongiu and Luca Benini}, editor = {Sander Stuijk}, title = {On the Accuracy of Near-Optimal CPU-Based Path Planning for UAVs}, booktitle = {Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, {SCOPES} 2017, Sankt Goar, Germany, June 12-13, 2017}, pages = {85--88}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3078659.3079072}, doi = {10.1145/3078659.3079072}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/scopes/PalossiMB17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-1711-10374, author = {Giuseppe Tagliavini and Stefan Mach and Davide Rossi and Andrea Marongiu and Luca Benini}, title = {A Transprecision Floating-Point Platform for Ultra-Low Power Computing}, journal = {CoRR}, volume = {abs/1711.10374}, year = {2017}, url = {http://arxiv.org/abs/1711.10374}, eprinttype = {arXiv}, eprint = {1711.10374}, timestamp = {Mon, 13 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-1711-10374.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-1712-06497, author = {Andreas Kurth and Pirmin Vogel and Alessandro Capotondi and Andrea Marongiu and Luca Benini}, title = {{HERO:} Heterogeneous Embedded Research Platform for Exploring {RISC-V} Manycore Accelerators on {FPGA}}, journal = {CoRR}, volume = {abs/1712.06497}, year = {2017}, url = {http://arxiv.org/abs/1712.06497}, eprinttype = {arXiv}, eprint = {1712.06497}, timestamp = {Mon, 13 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-1712-06497.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/pc/MarongiuCB16, author = {Andrea Marongiu and Alessandro Capotondi and Luca Benini}, title = {Controlling {NUMA} effects in embedded manycore applications with lightweight nested parallelism support}, journal = {Parallel Comput.}, volume = {59}, pages = {24--42}, year = {2016}, url = {https://doi.org/10.1016/j.parco.2016.02.002}, doi = {10.1016/J.PARCO.2016.02.002}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/pc/MarongiuCB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tecs/BortolottiMB16, author = {Daniele Bortolotti and Andrea Marongiu and Luca Benini}, title = {VirtualSoC: {A} Research Tool for Modern MPSoCs}, journal = {{ACM} Trans. Embed. Comput. Syst.}, volume = {16}, number = {1}, pages = {3:1--3:27}, year = {2016}, url = {http://dl.acm.org/citation.cfm?id=2930665}, timestamp = {Tue, 08 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tecs/BortolottiMB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsisp/ContiMPB16, author = {Francesco Conti and Andrea Marongiu and Chuck Pilkington and Luca Benini}, title = {He-P2012: Performance and Energy Exploration of Architecturally Heterogeneous Many-Cores}, journal = {J. Signal Process. Syst.}, volume = {85}, number = {3}, pages = {325--340}, year = {2016}, url = {https://doi.org/10.1007/s11265-015-1056-7}, doi = {10.1007/S11265-015-1056-7}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsisp/ContiMPB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/TagliaviniHMB16, author = {Giuseppe Tagliavini and Germain Haugou and Andrea Marongiu and Luca Benini}, title = {Enabling OpenVX support in mW-scale parallel accelerators}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {2:1--2:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968518}, doi = {10.1145/2968455.2968518}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/TagliaviniHMB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/CarlePMMHB16, author = {Thomas Carle and Dimitra Papagiannopoulou and Tali Moreshet and Andrea Marongiu and Maurice Herlihy and R. Iris Bahar}, title = {Thrifty-malloc: {A} {HW/SW} codesign for the dynamic management of hardware transactional memory in embedded multicore systems}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {20:1--20:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968513}, doi = {10.1145/2968455.2968513}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cases/CarlePMMHB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cd/PalossiFNMMB16, author = {Daniele Palossi and Michele Furci and Roberto Naldi and Andrea Marongiu and Lorenzo Marconi and Luca Benini}, editor = {Gianluca Palermo and John Feo}, title = {An energy-efficient parallel algorithm for real-time near-optimal {UAV} path planning}, booktitle = {Proceedings of the {ACM} International Conference on Computing Frontiers, CF'16, Como, Italy, May 16-19, 2016}, pages = {392--397}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2903150.2911712}, doi = {10.1145/2903150.2911712}, timestamp = {Thu, 23 Dec 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cd/PalossiFNMMB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/0001PMRB16, author = {Francesco Conti and Daniele Palossi and Andrea Marongiu and Davide Rossi and Luca Benini}, editor = {Luca Fanucci and J{\"{u}}rgen Teich}, title = {Enabling the heterogeneous accelerator model on ultra-low power microcontroller platforms}, booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016}, pages = {1201--1206}, publisher = {{IEEE}}, year = {2016}, url = {https://ieeexplore.ieee.org/document/7459494/}, timestamp = {Mon, 09 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/0001PMRB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/CesariniMB16, author = {Daniele Cesarini and Andrea Marongiu and Luca Benini}, editor = {Luca Fanucci and J{\"{u}}rgen Teich}, title = {An optimized task-based runtime system for resource-constrained parallel accelerators}, booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016}, pages = {1261--1266}, publisher = {{IEEE}}, year = {2016}, url = {https://ieeexplore.ieee.org/document/7459504/}, timestamp = {Mon, 09 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/CesariniMB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/BurgioBOGMS16, author = {Paolo Burgio and Marko Bertogna and Ignacio Sanudo Olmedo and Paolo Gai and Andrea Marongiu and Michal Sojka}, editor = {Paris Kitsos}, title = {A Software Stack for Next-Generation Automotive Systems on Many-Core Heterogeneous Platforms}, booktitle = {2016 Euromicro Conference on Digital System Design, {DSD} 2016, Limassol, Cyprus, August 31 - September 2, 2016}, pages = {55--59}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/DSD.2016.84}, doi = {10.1109/DSD.2016.84}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/BurgioBOGMS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/TagliaviniMRB16, author = {Giuseppe Tagliavini and Andrea Marongiu and Davide Rossi and Luca Benini}, title = {Always-on motion detection with application-level error control on a near-threshold approximate computing platform}, booktitle = {2016 {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 2016, Monte Carlo, Monaco, December 11-14, 2016}, pages = {552--555}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ICECS.2016.7841261}, doi = {10.1109/ICECS.2016.7841261}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/icecsys/TagliaviniMRB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ieeehpcs/CapotondiM16, author = {Alessandro Capotondi and Andrea Marongiu}, title = {On the effectiveness of OpenMP teams for cluster-based many-core accelerators}, booktitle = {International Conference on High Performance Computing {\&} Simulation, {HPCS} 2016, Innsbruck, Austria, July 18-22, 2016}, pages = {667--674}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/HPCSim.2016.7568399}, doi = {10.1109/HPCSIM.2016.7568399}, timestamp = {Wed, 16 Oct 2019 14:14:54 +0200}, biburl = {https://dblp.org/rec/conf/ieeehpcs/CapotondiM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/scopes/PalossiM16, author = {Daniele Palossi and Andrea Marongiu}, editor = {Sander Stuijk}, title = {Exploring Single Source Shortest Path Parallelization on Shared Memory Accelerators}, booktitle = {Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, {SCOPES} 2016, Sankt Goar, Germany, May 23-25, 2016}, pages = {197--200}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2906363.2915925}, doi = {10.1145/2906363.2915925}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/scopes/PalossiM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/PinhoNYQBBMSGRM15, author = {Lu{\'{\i}}s Miguel Pinho and Vincent N{\'{e}}lis and Patrick Meumeu Yomsi and Eduardo Qui{\~{n}}ones and Marko Bertogna and Paolo Burgio and Andrea Marongiu and Claudio Scordino and Paolo Gai and Michele Ramponi and Michal Mardiak}, title = {{P-SOCRATES:} {A} parallel software framework for time-critical many-core systems}, journal = {Microprocess. Microsystems}, volume = {39}, number = {8}, pages = {1190--1203}, year = {2015}, url = {https://doi.org/10.1016/j.micpro.2015.06.004}, doi = {10.1016/J.MICPRO.2015.06.004}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/PinhoNYQBBMSGRM15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/DehyadegariMKMY15, author = {Masoud Dehyadegari and Andrea Marongiu and Mohammad Reza Kakoee and Siamak Mohammadi and Nasser Yazdani and Luca Benini}, title = {Architecture Support for Tightly-Coupled Multi-Core Clusters with Shared-Memory {HW} Accelerators}, journal = {{IEEE} Trans. Computers}, volume = {64}, number = {8}, pages = {2132--2144}, year = {2015}, url = {https://doi.org/10.1109/TC.2014.2360522}, doi = {10.1109/TC.2014.2360522}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tc/DehyadegariMKMY15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tii/MarongiuCTB15, author = {Andrea Marongiu and Alessandro Capotondi and Giuseppe Tagliavini and Luca Benini}, title = {Simplifying Many-Core-Based Heterogeneous SoC Programming With Offload Directives}, journal = {{IEEE} Trans. Ind. Informatics}, volume = {11}, number = {4}, pages = {957--967}, year = {2015}, url = {https://doi.org/10.1109/TII.2015.2449994}, doi = {10.1109/TII.2015.2449994}, timestamp = {Thu, 21 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tii/MarongiuCTB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tpds/RaghavRMPAB15, author = {Shivani Raghav and Martino Ruggiero and Andrea Marongiu and Christian Pinto and David Atienza and Luca Benini}, title = {{GPU} Acceleration for Simulating Massively Parallel Many-Core Platforms}, journal = {{IEEE} Trans. Parallel Distributed Syst.}, volume = {26}, number = {5}, pages = {1336--1349}, year = {2015}, url = {https://doi.org/10.1109/TPDS.2014.2319092}, doi = {10.1109/TPDS.2014.2319092}, timestamp = {Fri, 02 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tpds/RaghavRMPAB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/SerranoMVMBQ15, author = {Maria A. Serrano and Alessandra Melani and Roberto Vargas and Andrea Marongiu and Marko Bertogna and Eduardo Qui{\~{n}}ones}, editor = {Ravi Iyer and Siddharth Garg}, title = {Timing characterization of OpenMP4 tasking model}, booktitle = {2015 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October 4-9, 2015}, pages = {157--166}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/CASES.2015.7324556}, doi = {10.1109/CASES.2015.7324556}, timestamp = {Wed, 16 Oct 2019 14:14:51 +0200}, biburl = {https://dblp.org/rec/conf/cases/SerranoMVMBQ15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cgo/CapotondiHMB15, author = {Alessandro Capotondi and Germain Haugou and Andrea Marongiu and Luca Benini}, editor = {Zheng Wang and Pavlos Petoumenos and Hugh Leather}, title = {Runtime Support for Multiple Offload-Based Programming Models on Embedded Manycore Accelerators}, booktitle = {Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many Cores, COSMIC@CGO 2015, San Francisco Bay Area, CA, USA, February 8, 2015}, pages = {4:1--4:10}, publisher = {{ACM}}, year = {2015}, url = {https://doi.org/10.1145/2723772.2723773}, doi = {10.1145/2723772.2723773}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cgo/CapotondiHMB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cgo/VogelMB15, author = {Pirmin Vogel and Andrea Marongiu and Luca Benini}, editor = {Zheng Wang and Pavlos Petoumenos and Hugh Leather}, title = {An Evaluation of Memory Sharing Performance for Heterogeneous Embedded SoCs with Many-Core Accelerators}, booktitle = {Proceedings of the 2015 International Workshop on Code Optimisation for Multi and Many Cores, COSMIC@CGO 2015, San Francisco Bay Area, CA, USA, February 8, 2015}, pages = {6:1--6:9}, publisher = {{ACM}}, year = {2015}, url = {https://doi.org/10.1145/2723772.2723775}, doi = {10.1145/2723772.2723775}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cgo/VogelMB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/codes/VogelMB15, author = {Pirmin Vogel and Andrea Marongiu and Luca Benini}, editor = {Gabriela Nicolescu and Andreas Gerstlauer}, title = {Lightweight virtual memory support for many-core accelerators in heterogeneous embedded SoCs}, booktitle = {2015 International Conference on Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2015, Amsterdam, Netherlands, October 4-9, 2015}, pages = {45--54}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/CODESISSS.2015.7331367}, doi = {10.1109/CODESISSS.2015.7331367}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/codes/VogelMB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/RahimiCMGB15, author = {Abbas Rahimi and Daniele Cesarini and Andrea Marongiu and Rajesh K. Gupta and Luca Benini}, title = {Task scheduling strategies to mitigate hardware variability in embedded shared memory clusters}, booktitle = {Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015}, pages = {152:1--152:6}, publisher = {{ACM}}, year = {2015}, url = {https://doi.org/10.1145/2744769.2744915}, doi = {10.1145/2744769.2744915}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/RahimiCMGB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/VargasQM15, author = {Roberto Vargas and Eduardo Qui{\~{n}}ones and Andrea Marongiu}, editor = {Wolfgang Nebel and David Atienza}, title = {OpenMP and timing predictability: a possible union?}, booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March 9-13, 2015}, pages = {617--620}, publisher = {{ACM}}, year = {2015}, url = {http://dl.acm.org/citation.cfm?id=2755893}, timestamp = {Mon, 09 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/VargasQM15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/glvlsi/Papagiannopoulou15, author = {Dimitra Papagiannopoulou and Andrea Marongiu and Tali Moreshet and Luca Benini and Maurice Herlihy and R. Iris Bahar}, editor = {Alex K. Jones and Hai (Helen) Li and Ayse K. Coskun and Martin Margala}, title = {Playing with Fire: Transactional Memory Revisited for Error-Resilient and Energy-Efficient MPSoC Execution}, booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI, {GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015}, pages = {9--14}, publisher = {{ACM}}, year = {2015}, url = {https://doi.org/10.1145/2742060.2742090}, doi = {10.1145/2742060.2742090}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/glvlsi/Papagiannopoulou15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hotchips/Rossi0MPLGTCFB15, author = {Davide Rossi and Francesco Conti and Andrea Marongiu and Antonio Pullini and Igor Loi and Michael Gautschi and Giuseppe Tagliavini and Alessandro Capotondi and Philippe Flatresse and Luca Benini}, title = {{PULP:} {A} parallel ultra low power platform for next generation IoT applications}, booktitle = {2015 {IEEE} Hot Chips 27 Symposium (HCS), Cupertino, CA, USA, August 22-25, 2015}, pages = {1--39}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2015.7477325}, doi = {10.1109/HOTCHIPS.2015.7477325}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hotchips/Rossi0MPLGTCFB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/TagliaviniRBM15, author = {Giuseppe Tagliavini and Davide Rossi and Luca Benini and Andrea Marongiu}, title = {Synergistic Architecture and Programming Model Support for Approximate Micropower Computing}, booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015, Montpellier, France, July 8-10, 2015}, pages = {280--285}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/ISVLSI.2015.64}, doi = {10.1109/ISVLSI.2015.64}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/TagliaviniRBM15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mcsoc/TagliaviniHMB15, author = {Giuseppe Tagliavini and Germain Haugou and Andrea Marongiu and Luca Benini}, title = {{ADRENALINE:} An OpenVX Environment to Optimize Embedded Vision Applications on Many-core Accelerators}, booktitle = {{IEEE} 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2015, Turin, Italy, September 23-25, 2015}, pages = {289--296}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/MCSoC.2015.45}, doi = {10.1109/MCSOC.2015.45}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mcsoc/TagliaviniHMB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mcsoc/CapotondiMB15, author = {Alessandro Capotondi and Andrea Marongiu and Luca Benini}, title = {Enabling Scalable and Fine-Grained Nested Parallelism on Embedded Many-cores}, booktitle = {{IEEE} 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2015, Turin, Italy, September 23-25, 2015}, pages = {297--304}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/MCSoC.2015.47}, doi = {10.1109/MCSOC.2015.47}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mcsoc/CapotondiMB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/scopes/TagliaviniHMB15, author = {Giuseppe Tagliavini and Germain Haugou and Andrea Marongiu and Luca Benini}, editor = {Henk Corporaal and Sander Stuijk}, title = {A framework for optimizing OpenVX applications performance on embedded manycore accelerators}, booktitle = {Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, {SCOPES} 2015, Sankt Goar, Germany, June 1-3, 2015}, pages = {125--128}, publisher = {{ACM}}, year = {2015}, url = {https://doi.org/10.1145/2764967.2776858}, doi = {10.1145/2764967.2776858}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/scopes/TagliaviniHMB15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/esticas/RahimiCMGB14, author = {Abbas Rahimi and Daniele Cesarini and Andrea Marongiu and Rajesh K. Gupta and Luca Benini}, title = {Improving Resilience to Timing Errors by Exposing Variability Effects to Software in Tightly-Coupled Processor Clusters}, journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.}, volume = {4}, number = {2}, pages = {216--229}, year = {2014}, url = {https://doi.org/10.1109/JETCAS.2014.2315883}, doi = {10.1109/JETCAS.2014.2315883}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/esticas/RahimiCMGB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/asap/ContiPMB14, author = {Francesco Conti and Chuck Pilkington and Andrea Marongiu and Luca Benini}, title = {He-P2012: Architectural heterogeneity exploration on a scalable many-core platform}, booktitle = {{IEEE} 25th International Conference on Application-Specific Systems, Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June 18-20, 2014}, pages = {114--120}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ASAP.2014.6868645}, doi = {10.1109/ASAP.2014.6868645}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/asap/ContiPMB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/BurgioDMCB14, author = {Paolo Burgio and Robin Danilo and Andrea Marongiu and Philippe Coussy and Luca Benini}, editor = {Gerhard P. Fettweis and Wolfgang Nebel}, title = {A tightly-coupled hardware controller to improve scalability and programmability of shared-memory heterogeneous clusters}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2014, Dresden, Germany, March 24-28, 2014}, pages = {1--4}, publisher = {European Design and Automation Association}, year = {2014}, url = {https://doi.org/10.7873/DATE.2014.038}, doi = {10.7873/DATE.2014.038}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/date/BurgioDMCB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/BurgioTCMB14, author = {Paolo Burgio and Giuseppe Tagliavini and Francesco Conti and Andrea Marongiu and Luca Benini}, editor = {Gerhard P. Fettweis and Wolfgang Nebel}, title = {Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2014, Dresden, Germany, March 24-28, 2014}, pages = {1--6}, publisher = {European Design and Automation Association}, year = {2014}, url = {https://doi.org/10.7873/DATE.2014.169}, doi = {10.7873/DATE.2014.169}, timestamp = {Tue, 23 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/BurgioTCMB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/PinhoQBMCSR14, author = {Lu{\'{\i}}s Miguel Pinho and Eduardo Qui{\~{n}}ones and Marko Bertogna and Andrea Marongiu and Jorge Pereira Carlos and Claudio Scordino and Michele Ramponi}, title = {{P-SOCRATES:} {A} Parallel Software Framework for Time-Critical Many-Core Systems}, booktitle = {17th Euromicro Conference on Digital System Design, {DSD} 2014, Verona, Italy, August 27-29, 2014}, pages = {214--221}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/DSD.2014.94}, doi = {10.1109/DSD.2014.94}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/PinhoQBMCSR14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/euc/BurgioMCB14, author = {Paolo Burgio and Andrea Marongiu and Philippe Coussy and Luca Benini}, title = {A HLS-Based Toolflow to Design Next-Generation Heterogeneous Many-Core Platforms with Shared Memory}, booktitle = {12th {IEEE} International Conference on Embedded and Ubiquitous Computing, {EUC} 2014, Milano, Italy, August 26-28, 2014}, pages = {130--137}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/EUC.2014.27}, doi = {10.1109/EUC.2014.27}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/euc/BurgioMCB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/glvlsi/ContiPMB14, author = {Francesco Conti and Chuck Pilkington and Andrea Marongiu and Luca Benini}, editor = {Joseph R. Cavallaro and Tong Zhang and Alex K. Jones and Hai (Helen) Li}, title = {He-P2012: architectural heterogeneity exploration on a scalable many-core platform}, booktitle = {Great Lakes Symposium on {VLSI} 2014, {GLSVLSI} '14, Houston, TX, {USA} - May 21 - 23, 2014}, pages = {231--232}, publisher = {{ACM}}, year = {2014}, url = {https://doi.org/10.1145/2591513.2591553}, doi = {10.1145/2591513.2591553}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/glvlsi/ContiPMB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/Al-KhalissiBM14, author = {Hayder Al{-}Khalissi and Mladen Berekovic and Andrea Marongiu}, editor = {Masoud Daneshtalab and Masoumeh Ebrahimi and Maurizio Palesi and Federico Angiolini and Juha Plosila}, title = {On the Relevance of Architectural Awareness for Efficient Fork/Join Support on Cluster-Based Manycores}, booktitle = {Proceedings of the 2nd International Workshop on Many-core Embedded Systems, MES'2014, in conjunction with the 41st International Symposium on Computer Architecture, ISCA'2014, Minneapolis, MN, USA, June 15, 2014}, pages = {9--16}, publisher = {{ACM}}, year = {2014}, url = {https://doi.org/10.1145/2613908.2613911}, doi = {10.1145/2613908.2613911}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isca/Al-KhalissiBM14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/PintoMB14, author = {Christian Pinto and Andrea Marongiu and Luca Benini}, editor = {Masoud Daneshtalab and Masoumeh Ebrahimi and Maurizio Palesi and Federico Angiolini and Juha Plosila}, title = {A Virtualization Framework for IOMMU-less Many-Core Accelerators}, booktitle = {Proceedings of the 2nd International Workshop on Many-core Embedded Systems, MES'2014, in conjunction with the 41st International Symposium on Computer Architecture, ISCA'2014, Minneapolis, MN, USA, June 15, 2014}, pages = {33--40}, publisher = {{ACM}}, year = {2014}, url = {https://doi.org/10.1145/2613908.2613910}, doi = {10.1145/2613908.2613910}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isca/PintoMB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nocs/BalboniOCFGRVMB14, author = {Marco Balboni and Marta Ort{\'{\i}}n{-}Ob{\'{o}}n and Alessandro Capotondi and Herv{\'{e}} Tatenguem Fankem and Alberto Ghiribaldi and Luca Ramini and V{\'{\i}}ctor Vi{\~{n}}als and Andrea Marongiu and Davide Bertozzi}, editor = {Davide Bertozzi and Luca Benini and Sudhakar Yalamanchili and J{\"{o}}rg Henkel}, title = {Augmenting manycore programmable accelerators with photonic interconnect technology for the high-end embedded computing domain}, booktitle = {Eighth {IEEE/ACM} International Symposium on Networks-on-Chip, NoCS 2014, Ferrara, Italy, September 17-19, 2014}, pages = {72--79}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/NOCS.2014.7008764}, doi = {10.1109/NOCS.2014.7008764}, timestamp = {Wed, 16 Oct 2019 14:14:48 +0200}, biburl = {https://dblp.org/rec/conf/nocs/BalboniOCFGRVMB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/PapagiannopoulouMMBHB14, author = {Dimitra Papagiannopoulou and Tali Moreshet and Andrea Marongiu and Luca Benini and Maurice Herlihy and R. Iris Bahar}, title = {Speculative synchronization for coherence-free embedded {NUMA} architectures}, booktitle = {XIVth International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2014, Agios Konstantinos, Samos, Greece, July 14-17, 2014}, pages = {99--106}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/SAMOS.2014.6893200}, doi = {10.1109/SAMOS.2014.6893200}, timestamp = {Mon, 15 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/samos/PapagiannopoulouMMBHB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/wcet/NelisYPFBQVM14, author = {Vincent N{\'{e}}lis and Patrick Meumeu Yomsi and Lu{\'{\i}}s Miguel Pinho and Jos{\'{e}} Carlos Fonseca and Marko Bertogna and Eduardo Qui{\~{n}}ones and Roberto Vargas and Andrea Marongiu}, editor = {Heiko Falk}, title = {The Challenge of Time-Predictability in Modern Many-Core Architectures}, booktitle = {14th International Workshop on Worst-Case Execution Time Analysis, {WCET} 2014, July 8, 2014, Ulm, Germany}, series = {OASIcs}, volume = {39}, pages = {63--72}, publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik}, year = {2014}, url = {https://doi.org/10.4230/OASIcs.WCET.2014.63}, doi = {10.4230/OASICS.WCET.2014.63}, timestamp = {Tue, 15 Feb 2022 09:40:04 +0100}, biburl = {https://dblp.org/rec/conf/wcet/NelisYPFBQVM14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/concurrency/RaghavMPRAB13, author = {Shivani Raghav and Andrea Marongiu and Christian Pinto and Martino Ruggiero and David Atienza and Luca Benini}, title = {SIM\emph{in}G-1\emph{k}: {A} thousand-core simulator running on general-purpose graphical processing units}, journal = {Concurr. Comput. Pract. Exp.}, volume = {25}, number = {10}, pages = {1443--1461}, year = {2013}, url = {https://doi.org/10.1002/cpe.2940}, doi = {10.1002/CPE.2940}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/concurrency/RaghavMPRAB13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/pc/JovenMABM13, author = {Jaume Joven and Andrea Marongiu and Federico Angiolini and Luca Benini and Giovanni De Micheli}, title = {An integrated, programming model-driven framework for NoC-QoS support in cluster-based embedded many-cores}, journal = {Parallel Comput.}, volume = {39}, number = {10}, pages = {549--566}, year = {2013}, url = {https://doi.org/10.1016/j.parco.2013.06.002}, doi = {10.1016/J.PARCO.2013.06.002}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/pc/JovenMABM13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/codes/ContiMB13, author = {Francesco Conti and Andrea Marongiu and Luca Benini}, title = {Synthesis-friendly techniques for tightly-coupled integration of hardware accelerators into shared-memory multi-core clusters}, booktitle = {Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2013, Montreal, QC, Canada, September 29 - October 4, 2013}, pages = {5:1--5:10}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/CODES-ISSS.2013.6658992}, doi = {10.1109/CODES-ISSS.2013.6658992}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/codes/ContiMB13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/codes/RahimiMGB13, author = {Abbas Rahimi and Andrea Marongiu and Rajesh K. Gupta and Luca Benini}, title = {A variability-aware OpenMP environment for efficient execution of accuracy-configurable computation on shared-FPU processor clusters}, booktitle = {Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2013, Montreal, QC, Canada, September 29 - October 4, 2013}, pages = {35:1--35:10}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/CODES-ISSS.2013.6659022}, doi = {10.1109/CODES-ISSS.2013.6659022}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/codes/RahimiMGB13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dasip/BurgioMDCB13, author = {Paolo Burgio and Andrea Marongiu and Robin Danilo and Philippe Coussy and Luca Benini}, title = {Architecture and programming model support for efficient heterogeneous computing on tigthly-coupled shared-memory clusters}, booktitle = {2013 Conference on Design and Architectures for Signal and Image Processing, Cagliari, Italy, October 8-10, 2013}, pages = {22--29}, publisher = {{IEEE}}, year = {2013}, url = {https://ieeexplore.ieee.org/document/6661513/}, timestamp = {Mon, 09 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/dasip/BurgioMDCB13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/RahimiMBGB13, author = {Abbas Rahimi and Andrea Marongiu and Paolo Burgio and Rajesh K. Gupta and Luca Benini}, editor = {Enrico Macii}, title = {Variation-tolerant OpenMP tasking on tightly-coupled processor clusters}, booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France, March 18-22, 2013}, pages = {541--546}, publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}}, year = {2013}, url = {https://doi.org/10.7873/DATE.2013.121}, doi = {10.7873/DATE.2013.121}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/RahimiMBGB13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/BurgioTMB13, author = {Paolo Burgio and Giuseppe Tagliavini and Andrea Marongiu and Luca Benini}, editor = {Enrico Macii}, title = {Enabling fine-grained OpenMP tasking on tightly-coupled shared memory clusters}, booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France, March 18-22, 2013}, pages = {1504--1509}, publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}}, year = {2013}, url = {https://doi.org/10.7873/DATE.2013.306}, doi = {10.7873/DATE.2013.306}, timestamp = {Tue, 23 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/BurgioTMB13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ipps/BortolottiPMRB13, author = {Daniele Bortolotti and Christian Pinto and Andrea Marongiu and Martino Ruggiero and Luca Benini}, title = {VirtualSoC: {A} Full-System Simulation Environment for Massively Parallel Heterogeneous System-on-Chip}, booktitle = {2013 {IEEE} International Symposium on Parallel {\&} Distributed Processing, Workshops and Phd Forum, Cambridge, MA, USA, May 20-24, 2013}, pages = {2182--2187}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/IPDPSW.2013.177}, doi = {10.1109/IPDPSW.2013.177}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ipps/BortolottiPMRB13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/MarongiuCTB13, author = {Andrea Marongiu and Alessandro Capotondi and Giuseppe Tagliavini and Luca Benini}, editor = {Masoud Daneshtalab and Ahmed Hemani and Maurizio Palesi}, title = {Improving the programmability of STHORM-based heterogeneous systems with offload-enabled OpenMP}, booktitle = {Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, MES'2013, Held in conjunction with the 40th Annual {IEEE/ACM} International Symposium on Computer Architecture, {ISCA} 2013, June 24, 2013}, pages = {1--8}, publisher = {{ACM}}, year = {2013}, url = {https://doi.org/10.1145/2489068.2489069}, doi = {10.1145/2489068.2489069}, timestamp = {Fri, 09 Jul 2021 15:51:20 +0200}, biburl = {https://dblp.org/rec/conf/isca/MarongiuCTB13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/PapagiannopoulouBMHMB13, author = {Dimitra Papagiannopoulou and R. Iris Bahar and Tali Moreshet and Maurice Herlihy and Andrea Marongiu and Luca Benini}, editor = {Masoud Daneshtalab and Ahmed Hemani and Maurizio Palesi}, title = {Transparent and energy-efficient speculation on {NUMA} architectures for embedded MPSoCs}, booktitle = {Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, MES'2013, Held in conjunction with the 40th Annual {IEEE/ACM} International Symposium on Computer Architecture, {ISCA} 2013, June 24, 2013}, pages = {58--61}, publisher = {{ACM}}, year = {2013}, url = {https://doi.org/10.1145/2489068.2489078}, doi = {10.1145/2489068.2489078}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isca/PapagiannopoulouBMHMB13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/MarongiuB12, author = {Andrea Marongiu and Luca Benini}, title = {An OpenMP Compiler for Efficient Use of Distributed Scratchpad Memory in MPSoCs}, journal = {{IEEE} Trans. Computers}, volume = {61}, number = {2}, pages = {222--236}, year = {2012}, url = {https://doi.org/10.1109/TC.2010.199}, doi = {10.1109/TC.2010.199}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tc/MarongiuB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/asplos/RaghavMPARB12, author = {Shivani Raghav and Andrea Marongiu and Christian Pinto and David Atienza and Martino Ruggiero and Luca Benini}, editor = {David R. Kaeli and John Cavazos and Enqiang Sun}, title = {Full system simulation of many-core heterogeneous SoCs using {GPU} and {QEMU} semihosting}, booktitle = {The 5th Annual Workshop on General Purpose Processing with Graphics Processing Units, GPGPU-5, London, United Kingdom, March 3, 2012}, pages = {101--109}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2159430.2159442}, doi = {10.1145/2159430.2159442}, timestamp = {Thu, 11 Mar 2021 17:04:51 +0100}, biburl = {https://dblp.org/rec/conf/asplos/RaghavMPARB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/MarongiuBB12, author = {Andrea Marongiu and Paolo Burgio and Luca Benini}, editor = {Wolfgang Rosenstiel and Lothar Thiele}, title = {Fast and lightweight support for nested parallelism on cluster-based embedded many-cores}, booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012}, pages = {105--110}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/DATE.2012.6176441}, doi = {10.1109/DATE.2012.6176441}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/MarongiuBB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/AbellanPABBMB12, author = {Jos{\'{e}} L. Abell{\'{a}}n and Juan Fern{\'{a}}ndez Peinador and Manuel E. Acacio and Davide Bertozzi and Daniele Bortolotti and Andrea Marongiu and Luca Benini}, editor = {Wolfgang Rosenstiel and Lothar Thiele}, title = {Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs}, booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012}, pages = {491--496}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/DATE.2012.6176519}, doi = {10.1109/DATE.2012.6176519}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/AbellanPABBMB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/BurgioMHCCB12, author = {Paolo Burgio and Andrea Marongiu and Dominique Heller and Cyrille Chavet and Philippe Coussy and Luca Benini}, title = {OpenMP-based Synergistic Parallelization and {HW} Acceleration for On-Chip Shared-Memory Clusters}, booktitle = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme, Izmir, Turkey, September 5-8, 2012}, pages = {751--758}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/DSD.2012.97}, doi = {10.1109/DSD.2012.97}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/BurgioMHCCB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/marc/Al-KhalissiMB12, author = {Hayder Al{-}Khalissi and Andrea Marongiu and Mladen Berekovic}, editor = {Stefan Lankes and Carsten Clauss}, title = {Low-Overhead Barrier Synchronization for OpenMP-like Parallelism on the Single-Chip Cloud Computer}, booktitle = {Many-core Applications Research Community {(MARC)} Symposium at {RWTH} Aachen University, November 29th-30th 2012, Aachen, Germany}, pages = {26--31}, publisher = {{RWTH} Aachen University}, year = {2012}, timestamp = {Thu, 12 Mar 2020 11:37:09 +0100}, biburl = {https://dblp.org/rec/conf/marc/Al-KhalissiMB12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/DehyadegariMKBMY12, author = {Masoud Dehyadegari and Andrea Marongiu and Mohammad Reza Kakoee and Luca Benini and Siamak Mohammadi and Nasser Yazdani}, title = {A tightly-coupled multi-core cluster with shared-memory {HW} accelerators}, booktitle = {2012 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} XII, Samos, Greece, July 16-19, 2012}, pages = {96--103}, publisher = {{IEEE}}, year = {2012}, url = {https://doi.org/10.1109/SAMOS.2012.6404162}, doi = {10.1109/SAMOS.2012.6404162}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/samos/DehyadegariMKBMY12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/MarongiuBB11, author = {Andrea Marongiu and Paolo Burgio and Luca Benini}, title = {Supporting OpenMP on a multi-cluster embedded MPSoC}, journal = {Microprocess. Microsystems}, volume = {35}, number = {8}, pages = {668--682}, year = {2011}, url = {https://doi.org/10.1016/j.micpro.2011.08.010}, doi = {10.1016/J.MICPRO.2011.08.010}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/MarongiuBB11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ccgrid/PintoRMRAB11, author = {Christian Pinto and Shivani Raghav and Andrea Marongiu and Martino Ruggiero and David Atienza and Luca Benini}, title = {GPGPU-Accelerated Parallel and Fast Simulation of Thousand-Core Platforms}, booktitle = {11th {IEEE/ACM} International Symposium on Cluster, Cloud and Grid Computing, CCGrid 2011, Newport Beach, CA, USA, May 23-26, 2011}, pages = {53--62}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/CCGrid.2011.64}, doi = {10.1109/CCGRID.2011.64}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ccgrid/PintoRMRAB11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cf/FranceschelliBTMRLBMB11, author = {Alessio Franceschelli and Paolo Burgio and Giuseppe Tagliavini and Andrea Marongiu and Martino Ruggiero and Michele Lombardi and Alessio Bonfietti and Michela Milano and Luca Benini}, editor = {Calin Cascaval and Pedro Trancoso and Viktor K. Prasanna}, title = {MPOpt-Cell: a high-performance data-flow programming environment for the {CELL} {BE} processor}, booktitle = {Proceedings of the 8th Conference on Computing Frontiers, 2011, Ischia, Italy, May 3-5, 2011}, pages = {11}, publisher = {{ACM}}, year = {2011}, url = {https://doi.org/10.1145/2016604.2016618}, doi = {10.1145/2016604.2016618}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cf/FranceschelliBTMRLBMB11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/codes/FerriMLBMBH11, author = {Cesare Ferri and Andrea Marongiu and Benjamin Lipton and R. Iris Bahar and Tali Moreshet and Luca Benini and Maurice Herlihy}, editor = {Robert P. Dick and Jan Madsen}, title = {SoC-TM: integrated {HW/SW} support for transactional memory programming on embedded MPSoCs}, booktitle = {Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2011, part of ESWeek '11 Seventh Embedded Systems Week, Taipei, Taiwan, 9-14 October, 2011}, pages = {39--48}, publisher = {{ACM}}, year = {2011}, url = {https://doi.org/10.1145/2039370.2039380}, doi = {10.1145/2039370.2039380}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/codes/FerriMLBMBH11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/issoc/BortolottiPPMRB11, author = {Daniele Bortolotti and Francesco Paterna and Christian Pinto and Andrea Marongiu and Martino Ruggiero and Luca Benini}, title = {Exploring instruction caching strategies for tightly-coupled shared-memory clusters}, booktitle = {2011 International Symposium on System on Chip, SoC 2011, Tampere, Finland, October 31 - November 2, 2011}, pages = {34--41}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/ISSOC.2011.6089691}, doi = {10.1109/ISSOC.2011.6089691}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/issoc/BortolottiPPMRB11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/MarongiuBB10, author = {Andrea Marongiu and Paolo Burgio and Luca Benini}, editor = {Vinod Kathail and Reid Tatge and Rajeev Barua}, title = {Vertical stealing: robust, locality-aware do-all workload distribution for 3D MPSoCs}, booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ, USA, October 24-29, 2010}, pages = {207--216}, publisher = {{ACM}}, year = {2010}, url = {https://doi.org/10.1145/1878921.1878952}, doi = {10.1145/1878921.1878952}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/MarongiuBB10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/codes/JovenMABM10, author = {Jaume Joven and Andrea Marongiu and Federico Angiolini and Luca Benini and Giovanni De Micheli}, editor = {Tony Givargis and Adam Donlin}, title = {Exploring programming model-driven QoS support for NoC-based platforms}, booktitle = {Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2010, part of ESWeek '10 Sixth Embedded Systems Week, Scottsdale, AZ, USA, October 24-28, 2010}, pages = {65--74}, publisher = {{ACM}}, year = {2010}, url = {https://doi.org/10.1145/1878961.1878977}, doi = {10.1145/1878961.1878977}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/codes/JovenMABM10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/MarongiuRB10, author = {Andrea Marongiu and Martino Ruggiero and Luca Benini}, editor = {Giovanni De Micheli and Bashir M. Al{-}Hashimi and Wolfgang M{\"{u}}ller and Enrico Macii}, title = {Efficient OpenMP data mapping for multicore platforms with vertically stacked memory}, booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany, March 8-12, 2010}, pages = {105--110}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/DATE.2010.5457227}, doi = {10.1109/DATE.2010.5457227}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/date/MarongiuRB10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/MarongiuBB10, author = {Andrea Marongiu and Paolo Burgio and Luca Benini}, editor = {Sebasti{\'{a}}n L{\'{o}}pez}, title = {Evaluating OpenMP Support Costs on MPSoCs}, booktitle = {13th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, {DSD} 2010, 1-3 September 2010, Lille, France}, pages = {191--198}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/DSD.2010.99}, doi = {10.1109/DSD.2010.99}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/MarongiuBB10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ieeehpcs/RaghavRAPMB10, author = {Shivani Raghav and Martino Ruggiero and David Atienza and Christian Pinto and Andrea Marongiu and Luca Benini}, editor = {Waleed W. Smari and John P. McIntire}, title = {Scalable instruction set simulator for thousand-core architectures running on GPGPUs}, booktitle = {Proceedings of the 2010 International Conference on High Performance Computing {\&} Simulation, {HPCS} 2010, June 28 - July 2, 2010, Caen, France}, pages = {459--466}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/HPCS.2010.5547092}, doi = {10.1109/HPCS.2010.5547092}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ieeehpcs/RaghavRAPMB10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/MarongiuB09, author = {Andrea Marongiu and Luca Benini}, editor = {Luca Benini and Giovanni De Micheli and Bashir M. Al{-}Hashimi and Wolfgang M{\"{u}}ller}, title = {Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy}, booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France, April 20-24, 2009}, pages = {809--814}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/DATE.2009.5090774}, doi = {10.1109/DATE.2009.5090774}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/MarongiuB09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sss/MarongiuAB09, author = {Andrea Marongiu and Andrea Acquaviva and Luca Benini}, editor = {Rachid Guerraoui and Franck Petit}, title = {OpenMP Support for NBTI-Induced Aging Tolerance in MPSoCs}, booktitle = {Stabilization, Safety, and Security of Distributed Systems, 11th International Symposium, {SSS} 2009, Lyon, France, November 3-6, 2009. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {5873}, pages = {547--562}, publisher = {Springer}, year = {2009}, url = {https://doi.org/10.1007/978-3-642-05118-0\_38}, doi = {10.1007/978-3-642-05118-0\_38}, timestamp = {Wed, 07 Dec 2022 23:13:25 +0100}, biburl = {https://dblp.org/rec/conf/sss/MarongiuAB09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/MarongiuBAB08, author = {Andrea Marongiu and Luca Benini and Andrea Acquaviva and Andrea Bartolini}, editor = {Luca Fanucci}, title = {Analysis of Power Management Strategies for a Large-Scale SoC Platform in 65nm Technology}, booktitle = {11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, {DSD} 2008, Parma, Italy, September 3-5, 2008}, pages = {259--266}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/DSD.2008.100}, doi = {10.1109/DSD.2008.100}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/MarongiuBAB08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/MarongiuBK07, author = {Andrea Marongiu and Luca Benini and Mahmut T. Kandemir}, editor = {Taewhan Kim and Pascal Sainrat and Steven S. Lumetta and Nacho Navarro}, title = {Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms}, booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria, September 30 - October 3, 2007}, pages = {145--149}, publisher = {{ACM}}, year = {2007}, url = {https://doi.org/10.1145/1289881.1289908}, doi = {10.1145/1289881.1289908}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/MarongiuBK07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/BusoneraCMR06, author = {Giovanni Busonera and Salvatore Carta and Andrea Marongiu and Luigi Raffo}, title = {Automatic Application Partitioning on {FPGA/CPU} Systems Based on Detailed Low-Level Information}, booktitle = {Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools {(DSD} 2006), 30 August - 1 September 2006, Dubrovnik, Croatia}, pages = {265--268}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/DSD.2006.29}, doi = {10.1109/DSD.2006.29}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/BusoneraCMR06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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