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ORCIDBibTeX records: Tudor Murgan
@article{DBLP:journals/jolpe/OrtizIMG09,
author = {Alberto Garc{\'{\i}}a Ortiz and
Leandro Soares Indrusiak and
Tudor Murgan and
Manfred Glesner},
title = {Low-Power Coding for Networks-on-Chip with Virtual Channels},
journal = {J. Low Power Electron.},
volume = {5},
number = {1},
pages = {77--84},
year = {2009},
url = {https://doi.org/10.1166/jolpe.2009.1006},
doi = {10.1166/JOLPE.2009.1006},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/OrtizIMG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BacinschiMKG08,
author = {Petru Bogdan Bacinschi and
Tudor Murgan and
Klaus Koch and
Manfred Glesner},
editor = {Donatella Sciuto},
title = {An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches
in Transistor Pairs},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {698--703},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484760},
doi = {10.1109/DATE.2008.4484760},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/BacinschiMKG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PandeyDMG08,
author = {Sujan Pandey and
Rolf Drechsler and
Tudor Murgan and
Manfred Glesner},
title = {Process variations aware robust on-chip bus architecture synthesis
for MPSoCs},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
pages = {2989--2992},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISCAS.2008.4542086},
doi = {10.1109/ISCAS.2008.4542086},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PandeyDMG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/OrtizIMG08,
author = {Alberto Garc{\'{\i}}a Ortiz and
Leandro Soares Indrusiak and
Tudor Murgan and
Manfred Glesner},
editor = {Lars Svensson and
Jos{\'{e}} Monteiro},
title = {{PMD:} {A} Low-Power Code for Networks-on-Chip Based on Virtual Channels},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 18th International Workshop, {PATMOS} 2008, Lisbon,
Portugal, September 10-12, 2008. Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {5349},
pages = {219--228},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-95948-9\_22},
doi = {10.1007/978-3-540-95948-9\_22},
timestamp = {Wed, 23 Feb 2022 16:05:31 +0100},
biburl = {https://dblp.org/rec/conf/patmos/OrtizIMG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/wiley/GlesnerMH08,
author = {Manfred Glesner and
Tudor Murgan and
Thomas Hollstein},
editor = {Benjamin W. Wah},
title = {Hardware Based Rapid Prototyping},
booktitle = {Wiley Encyclopedia of Computer Science and Engineering},
publisher = {John Wiley {\&} Sons, Inc.},
year = {2008},
url = {https://doi.org/10.1002/9780470050118.ecse343},
doi = {10.1002/9780470050118.ECSE343},
timestamp = {Tue, 16 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/wiley/GlesnerMH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/OrtizMG07,
author = {Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Manfred Glesner},
title = {Signal Activity Analysis for High-Level Power Estimation in Time-Shared
Linear Systems},
journal = {J. Low Power Electron.},
volume = {3},
number = {2},
pages = {189--198},
year = {2007},
url = {https://doi.org/10.1166/jolpe.2007.133},
doi = {10.1166/JOLPE.2007.133},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/OrtizMG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/MurganBPOG07,
author = {Tudor Murgan and
Petru Bogdan Bacinschi and
Sujan Pandey and
Alberto Garc{\'{\i}}a Ortiz and
Manfred Glesner},
editor = {Nadine Az{\'{e}}mard and
Lars J. Svensson},
title = {On the Necessity of Combining Coding with Spacing and Shielding for
Improving Performance and Power in Very Deep Sub-micron Interconnects},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 17th International Workshop, {PATMOS} 2007, Gothenburg,
Sweden, September 3-5, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4644},
pages = {242--254},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-74442-9\_24},
doi = {10.1007/978-3-540-74442-9\_24},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/MurganBPOG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/MurganGHBG07,
author = {Tudor Murgan and
Andre Guntoro and
Heiko Hinkelmann and
Petru Bogdan Bacinschi and
Manfred Glesner},
editor = {Gilles Sassatelli and
Manfred Glesner and
Christophe Bobda and
Pascal Benoit},
title = {Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert
for Power Reduction in Buses Exhibiting Capacitive Coupling},
booktitle = {Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007},
pages = {7--14},
publisher = {Univ. Montpellier {II}},
year = {2007},
timestamp = {Tue, 05 Aug 2008 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/MurganGHBG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/HinkelmannMLZG07,
author = {Heiko Hinkelmann and
Tudor Murgan and
Guifang Liu and
Peter Zipf and
Manfred Glesner},
editor = {Gilles Sassatelli and
Manfred Glesner and
Christophe Bobda and
Pascal Benoit},
title = {On the Design of a Reconfigurable Multiplier for Integer and Galois
Field Multiplication},
booktitle = {Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007},
pages = {185--191},
publisher = {Univ. Montpellier {II}},
year = {2007},
timestamp = {Mon, 17 Aug 2009 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/HinkelmannMLZG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SoffkeZMG06,
author = {Oliver Soffke and
Peter Zipf and
Tudor Murgan and
Manfred Glesner},
editor = {Georges G. E. Gielen},
title = {A signal theory based approach to the statistical analysis of combinatorial
nanoelectronic circuits},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {632--637},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.244009},
doi = {10.1109/DATE.2006.244009},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SoffkeZMG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/MurganMOG06,
author = {Tudor Murgan and
Massoud Momeni and
Alberto Garc{\'{\i}}a Ortiz and
Manfred Glesner},
editor = {Soha Hassoun},
title = {A high-level compact pattern-dependent delay model for high-speed
point-to-point interconnects},
booktitle = {2006 International Conference on Computer-Aided Design, {ICCAD} 2006,
San Jose, CA, USA, November 5-9, 2006},
pages = {323--328},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1233501.1233565},
doi = {10.1145/1233501.1233565},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/MurganMOG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/MurganBOG06,
author = {Tudor Murgan and
Petru Bogdan Bacinschi and
Alberto Garc{\'{\i}}a Ortiz and
Manfred Glesner},
editor = {Johan Vounckx and
Nadine Az{\'{e}}mard and
Philippe Maurine},
title = {Partial Bus-Invert Bus Encoding Schemes for Low-Power {DSP} Systems
Considering Inter-wire Capacitance},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 16th International Workshop, {PATMOS} 2006, Montpellier,
France, September 13-15, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4148},
pages = {169--180},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11847083\_17},
doi = {10.1007/11847083\_17},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/MurganBOG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/PandeyMG06,
author = {Sujan Pandey and
Tudor Murgan and
Manfred Glesner},
title = {Energy Conscious Simultaneous Voltage Scaling and On-chip Communication
Bus Synthesis},
booktitle = {{IFIP} VLSI-SoC 2006, {IFIP} {WG} 10.5 International Conference on
Very Large Scale Integration of System-on-Chip, Nice, France, 16-18
October 2006},
pages = {296--301},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/VLSISOC.2006.313250},
doi = {10.1109/VLSISOC.2006.313250},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/PandeyMG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MurganMPBG06,
author = {Tudor Murgan and
Oliver Mitea and
Sujan Pandey and
Petru Bogdan Bacinschi and
Manfred Glesner},
title = {Simultaneous Placement and Buffer Planning for Reduction of Power
Consumption in Interconnects and Repeaters},
booktitle = {{IFIP} VLSI-SoC 2006, {IFIP} {WG} 10.5 International Conference on
Very Large Scale Integration of System-on-Chip, Nice, France, 16-18
October 2006},
pages = {302--307},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/VLSISOC.2006.313251},
doi = {10.1109/VLSISOC.2006.313251},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MurganMPBG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/ObeidMTG05,
author = {Abdulfattah Mohammad Obeid and
Tudor Murgan and
Abdelouahid Taadou and
Manfred Glesner},
title = {{HW/SW} design and realization of a size-reconfigurable {DCT} accelerator},
booktitle = {12th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2005, Gammarth, Tunisia, December 11-14, 2005},
pages = {1--4},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ICECS.2005.4633437},
doi = {10.1109/ICECS.2005.4633437},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/ObeidMTG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/OrtizMPG05,
author = {Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Mihail Petrov and
Manfred Glesner},
title = {A linear model for high-level delay estimation in {VDSM} on-chip interconnects},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {1078--1081},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1464779},
doi = {10.1109/ISCAS.2005.1464779},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/OrtizMPG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PetrovMZG05,
author = {A. Petrov and
Tudor Murgan and
Peter Zipf and
Manfred Glesner},
title = {Functional modeling techniques for a wireless {LAN} {OFDM} transceiver},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {3970--3973},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1465500},
doi = {10.1109/ISCAS.2005.1465500},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PetrovMZG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/MurganOGZGH05,
author = {Tudor Murgan and
Abdulfattah Mohammad Obeid and
Andre Guntoro and
Peter Zipf and
Manfred Glesner and
Ulrich Heinkel},
editor = {Gilles Sassatelli and
Manfred Glesner and
Lionel Torres and
Leandro Soares Indrusiak and
Thomas Hollstein},
title = {Design and Implementation of a Multi-Core Architecture for Overhead
Processing in Optical Transport Networks},
booktitle = {Proceedings of the 1st International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005},
pages = {151--156},
publisher = {Univ. Montpellier {II}},
year = {2005},
timestamp = {Thu, 28 Jun 2007 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/MurganOGZGH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/GlesnerHHIMOPPZ05,
author = {Manfred Glesner and
Heiko Hinkelmann and
Thomas Hollstein and
Leandro Soares Indrusiak and
Tudor Murgan and
Abdulfattah Mohammad Obeid and
Mihail Petrov and
Thilo Pionteck and
Peter Zipf},
editor = {Timo D. H{\"{a}}m{\"{a}}l{\"{a}}inen and
Andy D. Pimentel and
Jarmo Takala and
Stamatis Vassiliadis},
title = {Reconfigurable Embedded Systems: An Application-Oriented Perspective
on Architectures and Design Techniques},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
5th International Workshop, {SAMOS} 2005, Samos, Greece, July 18-20,
2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3553},
pages = {12--21},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11512622\_3},
doi = {10.1007/11512622\_3},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/GlesnerHHIMOPPZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/GlesnerHIZPPZM04,
author = {Manfred Glesner and
Thomas Hollstein and
Leandro Soares Indrusiak and
Peter Zipf and
Thilo Pionteck and
Mihail Petrov and
Heiko Zimmer and
Tudor Murgan},
editor = {Stamatis Vassiliadis and
Jean{-}Luc Gaudiot and
Vincenzo Piuri},
title = {Reconfigurable platforms for ubiquitous computing},
booktitle = {Proceedings of the First Conference on Computing Frontiers, 2004,
Ischia, Italy, April 14-16, 2004},
pages = {377--389},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/977091.977146},
doi = {10.1145/977091.977146},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cf/GlesnerHIZPPZM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/MurganPMZGHPB04,
author = {Tudor Murgan and
Mihail Petrov and
Mateusz Majer and
Peter Zipf and
Manfred Glesner and
Ulrich Heinkel and
J{\"{o}}rg Pleickhardt and
Bernd Bleisteiner},
editor = {Stamatis Vassiliadis and
Jean{-}Luc Gaudiot and
Vincenzo Piuri},
title = {Adaptive architectures for an {OTN} processor: reducing design costs
through reconfigurability and multiprocessing},
booktitle = {Proceedings of the First Conference on Computing Frontiers, 2004,
Ischia, Italy, April 14-16, 2004},
pages = {404--418},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/977091.977149},
doi = {10.1145/977091.977149},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cf/MurganPMZGHPB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PetrovMMVZG04,
author = {Mihail Petrov and
Tudor Murgan and
Frank May and
Martin Vorbach and
Peter Zipf and
Manfred Glesner},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {The {XPP} Architecture and Its Co-simulation Within the Simulink Environment},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {761--770},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_77},
doi = {10.1007/978-3-540-30117-2\_77},
timestamp = {Fri, 19 Jul 2019 13:02:47 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PetrovMMVZG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PetrovMOCZBG04,
author = {Mihail Petrov and
Tudor Murgan and
Abdulfattah Mohammad Obeid and
Cristian Chitu and
Peter Zipf and
J{\"{o}}rg Brakensiek and
Manfred Glesner},
title = {Dynamic power optimization of the trace-back process for the Viterbi
algorithm},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {721--724},
publisher = {{IEEE}},
year = {2004},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PetrovMOCZBG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/MurganPMZGH04,
author = {Tudor Murgan and
Mihail Petrov and
Mateusz Majer and
Peter Zipf and
Manfred Glesner and
Ulrich Heinkel},
editor = {Dominik Stoffel and
Wolfgang Kunz},
title = {Flexible Overhead Processing Architectures for {G.709} Optical Transport
Networks},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Kaiserslautern, Germany, February
24-25, 2004},
pages = {156--164},
publisher = {Shaker},
year = {2004},
timestamp = {Thu, 28 Jun 2012 09:44:44 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/MurganPMZGH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/MurganOSZPG04,
author = {Tudor Murgan and
Alberto Garc{\'{\i}}a Ortiz and
Clemens Schlachta and
Heiko Zimmer and
Mihail Petrov and
Manfred Glesner},
editor = {Enrico Macii and
Odysseas G. Koufopavlou and
Vassilis Paliouras},
title = {On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation; 14th International Workshop, {PATMOS} 2004, Santorini,
Greece, September 15-17, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3254},
pages = {819--828},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30205-6\_84},
doi = {10.1007/978-3-540-30205-6\_84},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/MurganOSZPG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/OrtizMG04,
author = {Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Manfred Glesner},
editor = {Enrico Macii and
Odysseas G. Koufopavlou and
Vassilis Paliouras},
title = {Moment-Based Estimation of Switching Activity for Correlated Distributions},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation; 14th International Workshop, {PATMOS} 2004, Santorini,
Greece, September 15-17, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3254},
pages = {859--868},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30205-6\_88},
doi = {10.1007/978-3-540-30205-6\_88},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/OrtizMG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/MurganSPIOGR04,
author = {Tudor Murgan and
Clemens Schlachta and
Mihail Petrov and
Leandro Soares Indrusiak and
Alberto Garc{\'{\i}}a Ortiz and
Manfred Glesner and
Ricardo A. L. Reis},
editor = {Edna Natividade da Silva Barros and
Fl{\'{a}}vio Rech Wagner and
Luigi Carro and
Franz{-}Josef Rammig},
title = {Accurate capture of timing parameters in inductively-coupled on-chip
interconnects},
booktitle = {Proceedings of the 17th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2004, Pernambuco, Brazil, September 7-11,
2004},
pages = {117--122},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1016568.1016604},
doi = {10.1145/1016568.1016604},
timestamp = {Fri, 03 Jun 2022 10:53:26 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/MurganSPIOGR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/LudewigOMG03,
author = {Ralf Ludewig and
Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Manfred Glesner},
title = {Hardware-Assisted Signal Activity Analysis for Power Estimation in
Rapid Prototyped Systems},
journal = {Des. Autom. Embed. Syst.},
volume = {8},
number = {4},
pages = {297--308},
year = {2003},
url = {https://doi.org/10.1023/B:DAEM.0000013064.89918.69},
doi = {10.1023/B:DAEM.0000013064.89918.69},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dafes/LudewigOMG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MurganPOLZHGOB03,
author = {Tudor Murgan and
Mihail Petrov and
Alberto Garc{\'{\i}}a Ortiz and
Ralf Ludewig and
Peter Zipf and
Thomas Hollstein and
Manfred Glesner and
Bernard {\"{O}}lkrug and
J{\"{o}}rg Brakensiek},
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {Evaluation and Run-Time Optimization of On-chip Communication Structures
in Reconfigurable Architectures},
booktitle = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
pages = {1111--1114},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45234-8\_132},
doi = {10.1007/978-3-540-45234-8\_132},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MurganPOLZHGOB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/OrtizKMG03,
author = {Alberto Garc{\'{\i}}a Ortiz and
Lukusa D. Kabulepa and
Tudor Murgan and
Manfred Glesner},
title = {Moment-Based Power Estimation in Very Deep Submicron Technologies},
booktitle = {2003 International Conference on Computer-Aided Design, {ICCAD} 2003,
San Jose, CA, USA, November 9-13, 2003},
pages = {107--112},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/ICCAD.2003.1257599},
doi = {10.1109/ICCAD.2003.1257599},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/OrtizKMG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LudewigOMJHG03,
author = {Ralf Ludewig and
Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Juan Jes{\'{u}}s Ocampo Hidalgo and
Manfred Glesner},
title = {Emulation of Analog Components for the Rapid Prototyping of Wireless
Baseband Systems},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {172--178},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207045},
doi = {10.1109/IWRSP.2003.1207045},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LudewigOMJHG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/PetrovOMZBOG03,
author = {Mihail Petrov and
Abdulfattah Mohammad Obeid and
Tudor Murgan and
Peter Zipf and
J{\"{o}}rg Brakensiek and
Bernard {\"{O}}lkrug and
Manfred Glesner},
editor = {Manfred Glesner and
Ricardo Augusto da Luz Reis and
Hans Eveking and
Vincent John Mooney III and
Leandro Soares Indrusiak and
Peter Zipf},
title = {An Adaptive Trace-Back Solution for State-Parallel Viterbi Decoders},
booktitle = {{IFIP} VLSI-SoC 2003, {IFIP} {WG} 10.5 International Conference on
Very Large Scale Integration of System-on-Chip, Darmstadt, Germany,
1-3 December 2003},
pages = {167},
publisher = {Technische Universit{\"{a}}t Darmstadt, Insitute of Microelectronic
Systems},
year = {2003},
timestamp = {Thu, 07 Oct 2004 09:29:26 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/PetrovOMZBOG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/OrtizMG03,
author = {Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Manfred Glesner},
title = {Transition Activity Estimation for General Correlated Data Distributions},
booktitle = {16th International Conference on {VLSI} Design {(VLSI} Design 2003),
4-8 January 2003, New Delhi, India},
pages = {440--445},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ICVD.2003.1183174},
doi = {10.1109/ICVD.2003.1183174},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/OrtizMG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LudewigOMG02,
author = {Ralf Ludewig and
Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Manfred Glesner},
title = {Power Estimation Based on Transition Activity Analysis with an Architecture
Precise Rapid Prototyping System},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {138},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029749},
doi = {10.1109/IWRSP.2002.1029749},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LudewigOMG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/OrtizMIG02,
author = {Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Leandro Soares Indrusiak and
Manfred Glesner},
title = {Power Consumption in Point-to-Point Interconnect Architectures},
booktitle = {Proceedings of the 15th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2002, Porto Alegre, Brazil, September 9-14,
2002},
pages = {155--162},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://dl.acm.org/doi/10.5555/827246.827349},
doi = {10.5555/827246.827349},
timestamp = {Fri, 10 Jun 2022 11:12:41 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/OrtizMIG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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