BibTeX records: Jani Paakkulainen

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@inproceedings{DBLP:conf/compsystech/PaakkulainenMLF09,
  author       = {Jani Paakkulainen and
                  Jari{-}Matti M{\"{a}}kel{\"{a}} and
                  Ville Lepp{\"{a}}nen and
                  Martti Forsell},
  editor       = {Boris Rachev and
                  Angel Smrikarov},
  title        = {Outline of RISC-based core for multiprocessor on chip architecture
                  supporting moving threads},
  booktitle    = {Proceedings of the 2009 International Conference on Computer Systems
                  and Technologies and Workshop for PhD Students in Computing, CompSysTech
                  2009, Rousse, Bulgaria, June 18-19, 2009},
  pages        = {11},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1731740.1731753},
  doi          = {10.1145/1731740.1731753},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/compsystech/PaakkulainenMLF09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/compsystech/MakelaPL09,
  author       = {Jari{-}Matti M{\"{a}}kel{\"{a}} and
                  Jani Paakkulainen and
                  Ville Lepp{\"{a}}nen},
  editor       = {Boris Rachev and
                  Angel Smrikarov},
  title        = {MVTsim: software simulator for multicore on chip parallel computer
                  architectures},
  booktitle    = {Proceedings of the 2009 International Conference on Computer Systems
                  and Technologies and Workshop for PhD Students in Computing, CompSysTech
                  2009, Rousse, Bulgaria, June 18-19, 2009},
  pages        = {15},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1731740.1731758},
  doi          = {10.1145/1731740.1731758},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/compsystech/MakelaPL09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijes/VirtanenNPL05,
  author       = {Seppo Virtanen and
                  Tero Nurmi and
                  Jani Paakkulainen and
                  Johan Lilius},
  title        = {A system-level framework for designing and evaluating protocol processor
                  architectures},
  journal      = {Int. J. Embed. Syst.},
  volume       = {1},
  number       = {1/2},
  pages        = {78--90},
  year         = {2005},
  url          = {https://doi.org/10.1504/IJES.2005.008810},
  doi          = {10.1504/IJES.2005.008810},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijes/VirtanenNPL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsd/VirtanenPN05,
  author       = {Seppo Virtanen and
                  Jani Paakkulainen and
                  Tero Nurmi},
  title        = {Capturing Processor Architectures from Protocol Processing Applications:
                  a Case Study},
  booktitle    = {Eighth Euromicro Symposium on Digital Systems Design {(DSD} 2005),
                  30 August - 3 September 2005, Porto, Portugal},
  pages        = {243--246},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/DSD.2005.23},
  doi          = {10.1109/DSD.2005.23},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/VirtanenPN05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpl/VirtanenTPIL05,
  author       = {Seppo Virtanen and
                  Dragos Truscan and
                  Jani Paakkulainen and
                  Jouni Isoaho and
                  Johan Lilius},
  editor       = {Tero Rissa and
                  Steven J. E. Wilton and
                  Philip Heng Wai Leong},
  title        = {Highly Automated {FPGA} Synthesis of Application-Specific Protocol
                  Processors},
  booktitle    = {Proceedings of the 2005 International Conference on Field Programmable
                  Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
  pages        = {269--274},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/FPL.2005.1515733},
  doi          = {10.1109/FPL.2005.1515733},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpl/VirtanenTPIL05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/samos/PaakkulainenVI05,
  author       = {Jani Paakkulainen and
                  Seppo Virtanen and
                  Jouni Isoaho},
  editor       = {Timo D. H{\"{a}}m{\"{a}}l{\"{a}}inen and
                  Andy D. Pimentel and
                  Jarmo Takala and
                  Stamatis Vassiliadis},
  title        = {Tuning a Protocol Processor Architecture Towards {DSP} Operations},
  booktitle    = {Embedded Computer Systems: Architectures, Modeling, and Simulation
                  5th International Workshop, {SAMOS} 2005, Samos, Greece, July 18-20,
                  2005, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3553},
  pages        = {132--141},
  publisher    = {Springer},
  year         = {2005},
  url          = {https://doi.org/10.1007/11512622\_15},
  doi          = {10.1007/11512622\_15},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/PaakkulainenVI05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/PaasioPI00,
  author       = {Ari Paasio and
                  Jani Paakkulainen and
                  Jouni Isoaho},
  title        = {A multiplier-free fixed-task digital {CNN} array for video segmentation
                  system},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
                  Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
                  May 2000, Proceedings},
  pages        = {710--713},
  publisher    = {{IEEE}},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISCAS.2000.856159},
  doi          = {10.1109/ISCAS.2000.856159},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/PaasioPI00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}