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ORCIDBibTeX records: Daniel Sánchez 0003
@inproceedings{DBLP:conf/hpca/YangES23,
author = {Yifan Yang and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {ISOSceles: Accelerating Sparse CNNs through Inter-Layer Pipelining},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2023, Montreal, QC, Canada, February 25 - March 1, 2023},
pages = {598--610},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/HPCA56546.2023.10071080},
doi = {10.1109/HPCA56546.2023.10071080},
timestamp = {Wed, 29 Mar 2023 11:07:46 +0200},
biburl = {https://dblp.org/rec/conf/hpca/YangES23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/NguyenS23,
author = {Quan M. Nguyen and
Daniel S{\'{a}}nchez},
title = {Phloem: Automatic Acceleration of Irregular Applications with Fine-Grain
Pipeline Parallelism},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2023, Montreal, QC, Canada, February 25 - March 1, 2023},
pages = {1262--1274},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/HPCA56546.2023.10071026},
doi = {10.1109/HPCA56546.2023.10071026},
timestamp = {Wed, 29 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/NguyenS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/Feldmann023,
author = {Axel Feldmann and
Daniel S{\'{a}}nchez},
title = {Spatula: {A} Hardware Accelerator for Sparse Matrix Factorization},
booktitle = {Proceedings of the 56th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2023, Toronto, ON, Canada, 28 October
2023 - 1 November 2023},
pages = {91--104},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3613424.3623783},
doi = {10.1145/3613424.3623783},
timestamp = {Sun, 31 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/Feldmann023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ElsabbaghSYNE023,
author = {Fares Elsabbagh and
Shabnam Sheikhha and
Victor A. Ying and
Quan M. Nguyen and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {Accelerating {RTL} Simulation with Hardware-Software Co-Design},
booktitle = {Proceedings of the 56th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2023, Toronto, ON, Canada, 28 October
2023 - 1 November 2023},
pages = {153--166},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3613424.3614257},
doi = {10.1145/3613424.3614257},
timestamp = {Sun, 31 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/ElsabbaghSYNE023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/FeldmannSKDDPS22,
author = {Axel Feldmann and
Nikola Samardzic and
Aleksandar Krastev and
Srinivas Devadas and
Ronald G. Dreslinski and
Chris Peikert and
Daniel S{\'{a}}nchez},
title = {An Architecture to Accelerate Computation on Encrypted Data},
journal = {{IEEE} Micro},
volume = {42},
number = {4},
pages = {59--68},
year = {2022},
url = {https://doi.org/10.1109/MM.2022.3170792},
doi = {10.1109/MM.2022.3170792},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/FeldmannSKDDPS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccs/DevadasLSS022,
author = {Srinivas Devadas and
Simon Langowski and
Nikola Samardzic and
Sacha Servan{-}Schreiber and
Daniel S{\'{a}}nchez},
editor = {Heng Yin and
Angelos Stavrou and
Cas Cremers and
Elaine Shi},
title = {Designing Hardware for Cryptography and Cryptography for Hardware},
booktitle = {Proceedings of the 2022 {ACM} {SIGSAC} Conference on Computer and
Communications Security, {CCS} 2022, Los Angeles, CA, USA, November
7-11, 2022},
pages = {1--4},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3548606.3559393},
doi = {10.1145/3548606.3559393},
timestamp = {Sat, 17 Dec 2022 01:15:29 +0100},
biburl = {https://dblp.org/rec/conf/ccs/DevadasLSS022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SamardzicFKMGDE22,
author = {Nikola Samardzic and
Axel Feldmann and
Aleksandar Krastev and
Nathan Manohar and
Nicholas Genise and
Srinivas Devadas and
Karim Eldefrawy and
Chris Peikert and
Daniel S{\'{a}}nchez},
editor = {Valentina Salapura and
Mohamed Zahran and
Fred Chong and
Lingjia Tang},
title = {CraterLake: a hardware accelerator for efficient unbounded computation
on encrypted data},
booktitle = {{ISCA} '22: The 49th Annual International Symposium on Computer Architecture,
New York, New York, USA, June 18 - 22, 2022},
pages = {173--187},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3470496.3527393},
doi = {10.1145/3470496.3527393},
timestamp = {Wed, 01 Jun 2022 14:28:13 +0200},
biburl = {https://dblp.org/rec/conf/isca/SamardzicFKMGDE22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/Lee022,
author = {Hyun Ryong Lee and
Daniel S{\'{a}}nchez},
title = {Datamime: Generating Representative Benchmarks by Automatically Synthesizing
Datasets},
booktitle = {55th {IEEE/ACM} International Symposium on Microarchitecture, {MICRO}
2022, Chicago, IL, USA, October 1-5, 2022},
pages = {1144--1159},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/MICRO56248.2022.00082},
doi = {10.1109/MICRO56248.2022.00082},
timestamp = {Fri, 04 Nov 2022 09:24:05 +0100},
biburl = {https://dblp.org/rec/conf/micro/Lee022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/TsaiSFS21,
author = {Po{-}An Tsai and
Andr{\'{e}}s S{\'{a}}nchez and
Christopher W. Fletcher and
Daniel S{\'{a}}nchez},
title = {Leaking Secrets Through Compressed Caches},
journal = {{IEEE} Micro},
volume = {41},
number = {3},
pages = {27--33},
year = {2021},
url = {https://doi.org/10.1109/MM.2021.3069158},
doi = {10.1109/MM.2021.3069158},
timestamp = {Sat, 11 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/TsaiSFS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/0002AE021,
author = {Guowei Zhang and
Nithya Attaluri and
Joel S. Emer and
Daniel S{\'{a}}nchez},
editor = {Tim Sherwood and
Emery D. Berger and
Christos Kozyrakis},
title = {Gamma: leveraging Gustavson's algorithm to accelerate sparse matrix
multiplication},
booktitle = {{ASPLOS} '21: 26th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Virtual Event,
USA, April 19-23, 2021},
pages = {687--701},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3445814.3446702},
doi = {10.1145/3445814.3446702},
timestamp = {Sat, 30 Sep 2023 09:34:47 +0200},
biburl = {https://dblp.org/rec/conf/asplos/0002AE021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Brahmakshatriya21,
author = {Ajay Brahmakshatriya and
Emily Furst and
Victor A. Ying and
Claire Hsu and
Changwan Hong and
Max Ruttenberg and
Yunming Zhang and
Dai Cheol Jung and
Dustin Richmond and
Michael B. Taylor and
Julian Shun and
Mark Oskin and
Daniel S{\'{a}}nchez and
Saman P. Amarasinghe},
title = {Taming the Zoo: The Unified GraphIt Compiler Framework for Novel Architectures},
booktitle = {48th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2021, Virtual Event / Valencia, Spain, June 14-18, 2021},
pages = {429--442},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCA52012.2021.00041},
doi = {10.1109/ISCA52012.2021.00041},
timestamp = {Mon, 19 Feb 2024 07:32:07 +0100},
biburl = {https://dblp.org/rec/conf/isca/Brahmakshatriya21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/YangE021,
author = {Yifan Yang and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {SpZip: Architectural Support for Effective Data Compression In Irregular
Applications},
booktitle = {48th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2021, Virtual Event / Valencia, Spain, June 14-18, 2021},
pages = {1069--1082},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCA52012.2021.00087},
doi = {10.1109/ISCA52012.2021.00087},
timestamp = {Fri, 06 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/YangE021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SamardzicFKDDP021,
author = {Nikola Samardzic and
Axel Feldmann and
Aleksandar Krastev and
Srinivas Devadas and
Ronald G. Dreslinski and
Christopher Peikert and
Daniel S{\'{a}}nchez},
title = {{F1:} {A} Fast and Programmable Accelerator for Fully Homomorphic
Encryption},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {238--252},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480070},
doi = {10.1145/3466752.3480070},
timestamp = {Tue, 19 Oct 2021 15:51:04 +0200},
biburl = {https://dblp.org/rec/conf/micro/SamardzicFKDDP021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/Nguyen021,
author = {Quan M. Nguyen and
Daniel S{\'{a}}nchez},
title = {Fifer: Practical Acceleration of Irregular Applications on Reconfigurable
Architectures},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {1064--1077},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480048},
doi = {10.1145/3466752.3480048},
timestamp = {Tue, 19 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/Nguyen021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2109-05371,
author = {Axel Feldmann and
Nikola Samardzic and
Aleksandar Krastev and
Srini Devadas and
Ronald G. Dreslinski and
Karim Eldefrawy and
Nicholas Genise and
Chris Peikert and
Daniel S{\'{a}}nchez},
title = {{F1:} {A} Fast and Programmable Accelerator for Fully Homomorphic
Encryption (Extended Version)},
journal = {CoRR},
volume = {abs/2109.05371},
year = {2021},
url = {https://arxiv.org/abs/2109.05371},
eprinttype = {arXiv},
eprint = {2109.05371},
timestamp = {Tue, 19 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2109-05371.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/LockermanFBSG0B20,
author = {Elliot Lockerman and
Axel Feldmann and
Mohammad Bakhshalipour and
Alexandru Stanescu and
Shashwat Gupta and
Daniel S{\'{a}}nchez and
Nathan Beckmann},
editor = {James R. Larus and
Luis Ceze and
Karin Strauss},
title = {Livia: Data-Centric Computing Throughout the Memory Hierarchy},
booktitle = {{ASPLOS} '20: Architectural Support for Programming Languages and
Operating Systems, Lausanne, Switzerland, March 16-20, 2020},
pages = {417--433},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3373376.3378497},
doi = {10.1145/3373376.3378497},
timestamp = {Mon, 13 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/LockermanFBSG0B20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/TsaiSFS20,
author = {Po{-}An Tsai and
Andr{\'{e}}s S{\'{a}}nchez and
Christopher W. Fletcher and
Daniel S{\'{a}}nchez},
editor = {James R. Larus and
Luis Ceze and
Karin Strauss},
title = {Safecracker: Leaking Secrets through Compressed Caches},
booktitle = {{ASPLOS} '20: Architectural Support for Programming Languages and
Operating Systems, Lausanne, Switzerland, March 16-20, 2020},
pages = {1125--1140},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3373376.3378453},
doi = {10.1145/3373376.3378453},
timestamp = {Sat, 11 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/TsaiSFS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/AbeydeeraS20,
author = {Maleen Abeydeera and
Daniel S{\'{a}}nchez},
editor = {James R. Larus and
Luis Ceze and
Karin Strauss},
title = {Chronos: Efficient Speculative Parallelism for Accelerators},
booktitle = {{ASPLOS} '20: Architectural Support for Programming Languages and
Operating Systems, Lausanne, Switzerland, March 16-20, 2020},
pages = {1247--1262},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3373376.3378454},
doi = {10.1145/3373376.3378454},
timestamp = {Tue, 17 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/AbeydeeraS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/YingJ020,
author = {Victor A. Ying and
Mark C. Jeffrey and
Daniel S{\'{a}}nchez},
title = {{T4:} Compiling Sequential Code for Effective Speculative Parallelization
in Hardware},
booktitle = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020},
pages = {159--172},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCA45697.2020.00024},
doi = {10.1109/ISCA45697.2020.00024},
timestamp = {Mon, 19 Feb 2024 07:32:24 +0100},
biburl = {https://dblp.org/rec/conf/isca/YingJ020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/NguyenS20,
author = {Quan M. Nguyen and
Daniel S{\'{a}}nchez},
title = {Pipette: Improving Core Utilization on Irregular Applications through
Intra-Core Pipeline Parallelism},
booktitle = {53rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2020, Athens, Greece, October 17-21, 2020},
pages = {596--608},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/MICRO50266.2020.00056},
doi = {10.1109/MICRO50266.2020.00056},
timestamp = {Mon, 13 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/NguyenS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/Tsai019,
author = {Po{-}An Tsai and
Daniel S{\'{a}}nchez},
editor = {Iris Bahar and
Maurice Herlihy and
Emmett Witchel and
Alvin R. Lebeck},
title = {Compress Objects, Not Cache Lines: An Object-Based Compressed Memory
Hierarchy},
booktitle = {Proceedings of the Twenty-Fourth International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2019, Providence, RI, USA, April 13-17, 2019},
pages = {229--242},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3297858.3304006},
doi = {10.1145/3297858.3304006},
timestamp = {Sun, 07 Apr 2019 16:01:58 +0200},
biburl = {https://dblp.org/rec/conf/asplos/Tsai019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/Zhang019,
author = {Guowei Zhang and
Daniel S{\'{a}}nchez},
title = {Leveraging Caches to Accelerate Hash Tables and Memoization},
booktitle = {Proceedings of the 52nd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2019, Columbus, OH, USA, October 12-16,
2019},
pages = {440--452},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3352460.3358272},
doi = {10.1145/3352460.3358272},
timestamp = {Tue, 11 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/Zhang019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/MukkaraB019,
author = {Anurag Mukkara and
Nathan Beckmann and
Daniel S{\'{a}}nchez},
title = {{PHI:} Architectural Support for Synchronization- and Bandwidth-Efficient
Commutative Scatter Updates},
booktitle = {Proceedings of the 52nd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2019, Columbus, OH, USA, October 12-16,
2019},
pages = {1009--1022},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3352460.3358254},
doi = {10.1145/3352460.3358254},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/MukkaraB019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangS18,
author = {Guowei Zhang and
Daniel S{\'{a}}nchez},
title = {Leveraging Hardware Caches for Memoization},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {17},
number = {1},
pages = {59--63},
year = {2018},
url = {https://doi.org/10.1109/LCA.2017.2762308},
doi = {10.1109/LCA.2017.2762308},
timestamp = {Tue, 11 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/ZhangS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pvldb/YuXPSRD18,
author = {Xiangyao Yu and
Yu Xia and
Andrew Pavlo and
Daniel S{\'{a}}nchez and
Larry Rudolph and
Srinivas Devadas},
title = {Sundial: Harmonizing Concurrency Control and Caching in a Distributed
{OLTP} Database Management System},
journal = {Proc. {VLDB} Endow.},
volume = {11},
number = {10},
pages = {1289--1302},
year = {2018},
url = {http://www.vldb.org/pvldb/vol11/p1289-yu.pdf},
doi = {10.14778/3231751.3231763},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pvldb/YuXPSRD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/KimACSYR18,
author = {Namhyung Kim and
Junwhan Ahn and
Kiyoung Choi and
Daniel S{\'{a}}nchez and
Donghoon Yoo and
Soojung Ryu},
title = {Benzene: An Energy-Efficient Distributed Hybrid Cache Architecture
for Manycore Systems},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {15},
number = {1},
pages = {10:1--10:23},
year = {2018},
url = {https://doi.org/10.1145/3177963},
doi = {10.1145/3177963},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/KimACSYR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/El-SayedMTKMS18,
author = {Nosayba El{-}Sayed and
Anurag Mukkara and
Po{-}An Tsai and
Harshad Kasture and
Xiaosong Ma and
Daniel S{\'{a}}nchez},
title = {KPart: {A} Hybrid Cache Partitioning-Sharing Technique for Commodity
Multicores},
booktitle = {{IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2018, Vienna, Austria, February 24-28, 2018},
pages = {104--117},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/HPCA.2018.00019},
doi = {10.1109/HPCA.2018.00019},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/El-SayedMTKMS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/MukkaraBAM018,
author = {Anurag Mukkara and
Nathan Beckmann and
Maleen Abeydeera and
Xiaosong Ma and
Daniel S{\'{a}}nchez},
title = {Exploiting Locality in Graph Analytics through Hardware-Accelerated
Traversal Scheduling},
booktitle = {51st Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2018, Fukuoka, Japan, October 20-24, 2018},
pages = {1--14},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MICRO.2018.00010},
doi = {10.1109/MICRO.2018.00010},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/MukkaraBAM018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/TsaiG018,
author = {Po{-}An Tsai and
Yee Ling Gan and
Daniel S{\'{a}}nchez},
title = {Rethinking the Memory Hierarchy for Modern Languages},
booktitle = {51st Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2018, Fukuoka, Japan, October 20-24, 2018},
pages = {203--216},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MICRO.2018.00025},
doi = {10.1109/MICRO.2018.00025},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/TsaiG018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/JeffreyYSLE018,
author = {Mark C. Jeffrey and
Victor A. Ying and
Suvinay Subramanian and
Hyun Ryong Lee and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {Harmonizing Speculative and Non-Speculative Execution in Architectures
for Ordered Parallelism},
booktitle = {51st Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2018, Fukuoka, Japan, October 20-24, 2018},
pages = {217--230},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MICRO.2018.00026},
doi = {10.1109/MICRO.2018.00026},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/JeffreyYSLE018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/TsaiCS18,
author = {Po{-}An Tsai and
Changping Chen and
Daniel S{\'{a}}nchez},
title = {Adaptive Scheduling for Systems with Asymmetric Memory Hierarchies},
booktitle = {51st Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2018, Fukuoka, Japan, October 20-24, 2018},
pages = {641--654},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MICRO.2018.00058},
doi = {10.1109/MICRO.2018.00058},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/TsaiCS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BeckmannS17,
author = {Nathan Beckmann and
Daniel S{\'{a}}nchez},
title = {Cache Calculus: Modeling Caches through Differential Equations},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {1},
pages = {1--5},
year = {2017},
url = {https://doi.org/10.1109/LCA.2015.2512873},
doi = {10.1109/LCA.2015.2512873},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/BeckmannS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/AbeydeeraSJE017,
author = {Maleen Abeydeera and
Suvinay Subramanian and
Mark C. Jeffrey and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {{SAM:} Optimizing Multithreaded Cores for Speculative Parallelism},
booktitle = {26th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2017, Portland, OR, USA, September 9-13, 2017},
pages = {64--78},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/PACT.2017.37},
doi = {10.1109/PACT.2017.37},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/AbeydeeraSJE017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/KastureJEBM017,
author = {Harshad Kasture and
Xu Ji and
Nosayba El{-}Sayed and
Nathan Beckmann and
Xiaosong Ma and
Daniel S{\'{a}}nchez},
title = {{POSTER:} Improving Datacenter Efficiency Through Partitioning-Aware
Scheduling},
booktitle = {26th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2017, Portland, OR, USA, September 9-13, 2017},
pages = {134--135},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/PACT.2017.43},
doi = {10.1109/PACT.2017.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/KastureJEBM017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/TsaiB017,
author = {Po{-}An Tsai and
Nathan Beckmann and
Daniel S{\'{a}}nchez},
title = {Nexus: {A} New Approach to Replication in Distributed Shared Caches},
booktitle = {26th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2017, Portland, OR, USA, September 9-13, 2017},
pages = {166--179},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/PACT.2017.42},
doi = {10.1109/PACT.2017.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/TsaiB017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/BeckmannS17,
author = {Nathan Beckmann and
Daniel S{\'{a}}nchez},
title = {Maximizing Cache Performance Under Uncertainty},
booktitle = {2017 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2017, Austin, TX, USA, February 4-8, 2017},
pages = {109--120},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/HPCA.2017.43},
doi = {10.1109/HPCA.2017.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/BeckmannS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/NeumanM0D17,
author = {Sabrina M. Neuman and
Jason E. Miller and
Daniel S{\'{a}}nchez and
Srinivas Devadas},
title = {Using Application-Level Thread Progress Information to Manage Power
and Performance},
booktitle = {2017 {IEEE} International Conference on Computer Design, {ICCD} 2017,
Boston, MA, USA, November 5-8, 2017},
pages = {501--508},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICCD.2017.87},
doi = {10.1109/ICCD.2017.87},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/NeumanM0D17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SubramanianJALY17,
author = {Suvinay Subramanian and
Mark C. Jeffrey and
Maleen Abeydeera and
Hyun Ryong Lee and
Victor A. Ying and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {Fractal: An Execution Model for Fine-Grain Nested Speculative Parallelism},
booktitle = {Proceedings of the 44th Annual International Symposium on Computer
Architecture, {ISCA} 2017, Toronto, ON, Canada, June 24-28, 2017},
pages = {587--599},
publisher = {{ACM}},
year = {2017},
url = {https://dl.acm.org/citation.cfm?id=3080218},
timestamp = {Mon, 26 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/SubramanianJALY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/TsaiBS17,
author = {Po{-}An Tsai and
Nathan Beckmann and
Daniel S{\'{a}}nchez},
title = {Jenga: Software-Defined Cache Hierarchies},
booktitle = {Proceedings of the 44th Annual International Symposium on Computer
Architecture, {ISCA} 2017, Toronto, ON, Canada, June 24-28, 2017},
pages = {652--665},
publisher = {{ACM}},
year = {2017},
url = {https://dl.acm.org/citation.cfm?id=3080214},
timestamp = {Mon, 26 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/TsaiBS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/JiWEMKVXS17,
author = {Xu Ji and
Chao Wang and
Nosayba El{-}Sayed and
Xiaosong Ma and
Youngjae Kim and
Sudharshan S. Vazhkudai and
Wei Xue and
Daniel S{\'{a}}nchez},
editor = {Bernd Mohr and
Padma Raghavan},
title = {Understanding object-level memory access patterns across the spectrum},
booktitle = {Proceedings of the International Conference for High Performance Computing,
Networking, Storage and Analysis, {SC} 2017, Denver, CO, USA, November
12 - 17, 2017},
pages = {25},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3126908.3126917},
doi = {10.1145/3126908.3126917},
timestamp = {Tue, 08 Nov 2022 16:03:02 +0100},
biburl = {https://dblp.org/rec/conf/sc/JiWEMKVXS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/micro/2017,
editor = {Hillery C. Hunter and
Jaime Moreno and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {Proceedings of the 50th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2017, Cambridge, MA, USA, October 14-18,
2017},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3123939},
doi = {10.1145/3123939},
isbn = {978-1-4503-4952-9},
timestamp = {Mon, 16 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/2017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/JeffreySYES16,
author = {Mark C. Jeffrey and
Suvinay Subramanian and
Cong Yan and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {Unlocking Ordered Parallelism with the Swarm Architecture},
journal = {{IEEE} Micro},
volume = {36},
number = {3},
pages = {105--117},
year = {2016},
url = {https://doi.org/10.1109/MM.2016.12},
doi = {10.1109/MM.2016.12},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/JeffreySYES16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/MukkaraBS16,
author = {Anurag Mukkara and
Nathan Beckmann and
Daniel S{\'{a}}nchez},
editor = {Tom Conte and
Yuanyuan Zhou},
title = {Whirlpool: Improving Dynamic Cache Management with Static Data Classification},
booktitle = {Proceedings of the Twenty-First International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2016, Atlanta, GA, USA, April 2-6, 2016},
pages = {113--127},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2872362.2872363},
doi = {10.1145/2872362.2872363},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/MukkaraBS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/BeckmannS16,
author = {Nathan Beckmann and
Daniel S{\'{a}}nchez},
title = {Modeling cache performance beyond {LRU}},
booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
pages = {225--236},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/HPCA.2016.7446067},
doi = {10.1109/HPCA.2016.7446067},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/BeckmannS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/KastureS16,
author = {Harshad Kasture and
Daniel S{\'{a}}nchez},
title = {Tailbench: a benchmark suite and evaluation methodology for latency-critical
applications},
booktitle = {2016 {IEEE} International Symposium on Workload Characterization,
{IISWC} 2016, Providence, RI, USA, September 25-27, 2016},
pages = {3--12},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/IISWC.2016.7581261},
doi = {10.1109/IISWC.2016.7581261},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/KastureS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/JeffreySAES16,
author = {Mark C. Jeffrey and
Suvinay Subramanian and
Maleen Abeydeera and
Joel S. Emer and
Daniel S{\'{a}}nchez},
title = {Data-centric execution of speculative parallel programs},
booktitle = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
pages = {5:1--5:13},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MICRO.2016.7783708},
doi = {10.1109/MICRO.2016.7783708},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/JeffreySAES16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ZhangCS16,
author = {Guowei Zhang and
Virginia Chiu and
Daniel S{\'{a}}nchez},
title = {Exploiting semantic commutativity in hardware speculation},
booktitle = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
pages = {34:1--34:12},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MICRO.2016.7783737},
doi = {10.1109/MICRO.2016.7783737},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/ZhangCS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigmod/YuPSD16,
author = {Xiangyao Yu and
Andrew Pavlo and
Daniel S{\'{a}}nchez and
Srinivas Devadas},
editor = {Fatma {\"{O}}zcan and
Georgia Koutrika and
Sam Madden},
title = {TicToc: Time Traveling Optimistic Concurrency Control},
booktitle = {Proceedings of the 2016 International Conference on Management of
Data, {SIGMOD} Conference 2016, San Francisco, CA, USA, June 26 -
July 01, 2016},
pages = {1629--1642},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2882903.2882935},
doi = {10.1145/2882903.2882935},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sigmod/YuPSD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/ZhangWSA16,
author = {Sizhuo Zhang and
Andrew Wright and
Daniel S{\'{a}}nchez and
Arvind},
title = {Validating Simplified Processor Models in Architectural Studies},
journal = {CoRR},
volume = {abs/1610.02094},
year = {2016},
url = {http://arxiv.org/abs/1610.02094},
eprinttype = {arXiv},
eprint = {1610.02094},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/ZhangWSA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cloud/DelimitrouSK15,
author = {Christina Delimitrou and
Daniel S{\'{a}}nchez and
Christos Kozyrakis},
editor = {Shahram Ghandeharizadeh and
Sumita Barahmand and
Magdalena Balazinska and
Michael J. Freedman},
title = {Tarcil: reconciling scheduling speed and quality in large shared clusters},
booktitle = {Proceedings of the Sixth {ACM} Symposium on Cloud Computing, SoCC
2015, Kohala Coast, Hawaii, USA, August 27-29, 2015},
pages = {97--110},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2806777.2806779},
doi = {10.1145/2806777.2806779},
timestamp = {Tue, 06 Nov 2018 11:07:34 +0100},
biburl = {https://dblp.org/rec/conf/cloud/DelimitrouSK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/BeckmannS15,
author = {Nathan Beckmann and
Daniel S{\'{a}}nchez},
title = {Talus: {A} simple way to remove cliffs in cache performance},
booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
pages = {64--75},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HPCA.2015.7056022},
doi = {10.1109/HPCA.2015.7056022},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/BeckmannS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/BeckmannTS15,
author = {Nathan Beckmann and
Po{-}An Tsai and
Daniel S{\'{a}}nchez},
title = {Scaling distributed cache hierarchies through computation and data
co-scheduling},
booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
pages = {538--550},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HPCA.2015.7056061},
doi = {10.1109/HPCA.2015.7056061},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/BeckmannTS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ZhangHS15,
author = {Guowei Zhang and
Webb Horn and
Daniel S{\'{a}}nchez},
editor = {Milos Prvulovic},
title = {Exploiting commutativity to reduce the cost of updates to shared data
in cache-coherent systems},
booktitle = {Proceedings of the 48th International Symposium on Microarchitecture,
{MICRO} 2015, Waikiki, HI, USA, December 5-9, 2015},
pages = {13--25},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2830772.2830774},
doi = {10.1145/2830772.2830774},
timestamp = {Wed, 11 Aug 2021 11:51:26 +0200},
biburl = {https://dblp.org/rec/conf/micro/ZhangHS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/JeffreySYES15,
author = {Mark C. Jeffrey and
Suvinay Subramanian and
Cong Yan and
Joel S. Emer and
Daniel S{\'{a}}nchez},
editor = {Milos Prvulovic},
title = {A scalable architecture for ordered parallelism},
booktitle = {Proceedings of the 48th International Symposium on Microarchitecture,
{MICRO} 2015, Waikiki, HI, USA, December 5-9, 2015},
pages = {228--241},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2830772.2830777},
doi = {10.1145/2830772.2830777},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/JeffreySYES15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KastureBBS15,
author = {Harshad Kasture and
Davide B. Bartolini and
Nathan Beckmann and
Daniel S{\'{a}}nchez},
editor = {Milos Prvulovic},
title = {Rubik: fast analytical power management for latency-critical systems},
booktitle = {Proceedings of the 48th International Symposium on Microarchitecture,
{MICRO} 2015, Waikiki, HI, USA, December 5-9, 2015},
pages = {598--610},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2830772.2830797},
doi = {10.1145/2830772.2830797},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KastureBBS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/Sanchez15,
author = {Daniel S{\'{a}}nchez},
editor = {Antonino Tumeo and
John Feo and
Oreste Villa},
title = {A scalable architecture for ordered irregular parallelism},
booktitle = {Proceedings of the 5th Workshop on Irregular Applications - Architectures
and Algorithms, {IA3} 2015, Austin, Texas, USA, November 15, 2015},
pages = {2:1},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2833179.2833193},
doi = {10.1145/2833179.2833193},
timestamp = {Tue, 06 Nov 2018 16:59:28 +0100},
biburl = {https://dblp.org/rec/conf/sc/Sanchez15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/KastureS14,
author = {Harshad Kasture and
Daniel S{\'{a}}nchez},
editor = {Rajeev Balasubramonian and
Al Davis and
Sarita V. Adve},
title = {Ubik: efficient cache sharing with strict qos for latency-critical
workloads},
booktitle = {Architectural Support for Programming Languages and Operating Systems,
{ASPLOS} 2014, Salt Lake City, UT, USA, March 1-5, 2014},
pages = {729--742},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2541940.2541944},
doi = {10.1145/2541940.2541944},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/KastureS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/BeckmannS13,
author = {Nathan Beckmann and
Daniel S{\'{a}}nchez},
editor = {Christian Fensch and
Michael F. P. O'Boyle and
Andr{\'{e}} Seznec and
Fran{\c{c}}ois Bodin},
title = {Jigsaw: Scalable software-defined caches},
booktitle = {Proceedings of the 22nd International Conference on Parallel Architectures
and Compilation Techniques, Edinburgh, United Kingdom, September 7-11,
2013},
pages = {213--224},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/PACT.2013.6618818},
doi = {10.1109/PACT.2013.6618818},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/BeckmannS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SanchezK13,
author = {Daniel S{\'{a}}nchez and
Christos Kozyrakis},
editor = {Avi Mendelson},
title = {ZSim: fast and accurate microarchitectural simulation of thousand-core
systems},
booktitle = {The 40th Annual International Symposium on Computer Architecture,
ISCA'13, Tel-Aviv, Israel, June 23-27, 2013},
pages = {475--486},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2485922.2485963},
doi = {10.1145/2485922.2485963},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/SanchezK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/SanchezK12,
author = {Daniel S{\'{a}}nchez and
Christos Kozyrakis},
title = {Scalable and Efficient Fine-Grained Cache Partitioning with Vantage},
journal = {{IEEE} Micro},
volume = {32},
number = {3},
pages = {26--37},
year = {2012},
url = {https://doi.org/10.1109/MM.2012.19},
doi = {10.1109/MM.2012.19},
timestamp = {Thu, 20 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/SanchezK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SanchezK12,
author = {Daniel S{\'{a}}nchez and
Christos Kozyrakis},
title = {{SCD:} {A} scalable coherence directory with flexible sharer set encoding},
booktitle = {18th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2012, New Orleans, LA, USA, 25-29 February, 2012},
pages = {129--140},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/HPCA.2012.6168950},
doi = {10.1109/HPCA.2012.6168950},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SanchezK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/SanchezLYSK11,
author = {Daniel S{\'{a}}nchez and
David Lo and
Richard M. Yoo and
Jeremy Sugerman and
Christos Kozyrakis},
editor = {Lawrence Rauchwerger and
Vivek Sarkar},
title = {Dynamic Fine-Grain Scheduling of Pipeline Parallelism},
booktitle = {2011 International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
pages = {22--32},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/PACT.2011.9},
doi = {10.1109/PACT.2011.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/SanchezLYSK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/0003K11,
author = {Daniel S{\'{a}}nchez and
Christos Kozyrakis},
title = {A few ways can take you a long way: Efficient and highly associative
caches with scalable partitioning for many-core CMPs},
booktitle = {2011 {IEEE} Hot Chips 23 Symposium (HCS), Stanford, CA, USA, August
17-19, 2011},
pages = {1},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2011.7477514},
doi = {10.1109/HOTCHIPS.2011.7477514},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/0003K11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SanchezK11,
author = {Daniel S{\'{a}}nchez and
Christos Kozyrakis},
editor = {Ravi R. Iyer and
Qing Yang and
Antonio Gonz{\'{a}}lez},
title = {Vantage: scalable and efficient fine-grain cache partitioning},
booktitle = {38th International Symposium on Computer Architecture {(ISCA} 2011),
June 4-8, 2011, San Jose, CA, {USA}},
pages = {57--68},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2000064.2000073},
doi = {10.1145/2000064.2000073},
timestamp = {Mon, 15 May 2023 22:11:15 +0200},
biburl = {https://dblp.org/rec/conf/isca/SanchezK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/SanchezMK10,
author = {Daniel S{\'{a}}nchez and
George Michelogiannakis and
Christos Kozyrakis},
title = {An analysis of on-chip interconnection networks for large-scale chip
multiprocessors},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {7},
number = {1},
pages = {4:1--4:28},
year = {2010},
url = {https://doi.org/10.1145/1736065.1736069},
doi = {10.1145/1736065.1736069},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/SanchezMK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/SanchezYK10,
author = {Daniel S{\'{a}}nchez and
Richard M. Yoo and
Christos Kozyrakis},
editor = {James C. Hoe and
Vikram S. Adve},
title = {Flexible architectural support for fine-grain scheduling},
booktitle = {Proceedings of the 15th International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2010, Pittsburgh, Pennsylvania, USA, March 13-17, 2010},
pages = {311--322},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1736020.1736055},
doi = {10.1145/1736020.1736055},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/SanchezYK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SanchezK10,
author = {Daniel S{\'{a}}nchez and
Christos Kozyrakis},
title = {The ZCache: Decoupling Ways and Associativity},
booktitle = {43rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2010, 4-8 December 2010, Atlanta, Georgia, {USA}},
pages = {187--198},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/MICRO.2010.20},
doi = {10.1109/MICRO.2010.20},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/SanchezK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/MichelogiannakisSDK10,
author = {George Michelogiannakis and
Daniel S{\'{a}}nchez and
William J. Dally and
Christos Kozyrakis},
title = {Evaluating Bufferless Flow Control for On-chip Networks},
booktitle = {{NOCS} 2010, Fourth {ACM/IEEE} International Symposium on Networks-on-Chip,
Grenoble, France, May 3-6, 2010},
pages = {9--16},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NOCS.2010.10},
doi = {10.1109/NOCS.2010.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nocs/MichelogiannakisSDK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SanchezYHS07,
author = {Daniel S{\'{a}}nchez and
Luke Yen and
Mark D. Hill and
Karthikeyan Sankaralingam},
title = {Implementing Signatures for Transactional Memory},
booktitle = {40th Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-40} 2007), 1-5 December 2007, Chicago, Illinois, {USA}},
pages = {123--133},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/MICRO.2007.24},
doi = {10.1109/MICRO.2007.24},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/SanchezYHS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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