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Nithin Kumar Yernad Balachandra

◀ ▶ joint publications with Pranose J. Edavoor

> Home > Persons > Nithin Kumar Yernad Balachandra

Publications

2022
[c46]
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Sithara Raveendran, Pranose J. Edavoor, Y. B. Nithin Kumar, M. H. Vasantha:
On The Design Of Rationalised Bi-orthogonal Wavelet Using Reversible Logic. ISCAS 2022: 3428-3432
2021
[j17]
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Sithara Raveendran, Pranose J. Edavoor, Nithin Kumar Yernad Balachandra, M. H. Vasantha:
Inexact Signed Wallace Tree Multiplier Design Using Reversible Logic. IEEE Access 9: 108119-108130 (2021)
2020
[j13]
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Sithara Raveendran, Pranose J. Edavoor, Nithin Y. B. Kumar, M. H. Vasantha:
An Approximate Low-Power Lifting Scheme Using Reversible Logic. IEEE Access 8: 183367-183377 (2020)
[j10]
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Sithara Raveendran, Pranose J. Edavoor, Nithin Kumar Yernad Balachandra, Vasantha Moodabettu Harishchandra:
Design and implementation of image kernels using reversible logic gates. IET Image Process. 14(16): 4110-4121 (2020)
[c37]
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Sithara Raveendran, Pranose J. Edavoor, Nithin Kumar Y. B., M. H. Vasantha:
Reversible Logic Implementation of Image Denoising for Grayscale Images. MWSCAS 2020: 138-141
2018
[c19]
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  - conf/tencon/RaveendranEKV18
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Sithara Raveendran, Pranose J. Edavoor, Nithin Y. B. Kumar, M. H. Vasantha:
Design and Implementation of Reversible Logic based RGB to Gray scale Color Space Converter. TENCON 2018: 1813-1817
2016
[c13]
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Pranose J. Edavoor, Sithara Raveendran, Arjun T. V., Sumesh K. P., Kumar Y. B. Nithin, M. H. Vasantha:
FPGA realisation of PSNR and BPP driven Adaptive Compression and Encryption Algorithm for RGB Images. ICCCNT 2016: 35:1-35:6

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