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Muhammad Yasir Qadri

◀ ▶ joint publications with Klaus D. McDonald-Maier

> Home > Persons > Muhammad Yasir Qadri

Publications

2017
[j8]
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  - https://dblp.org/rec/journals/mj/QadriQFM17
Muhammad Yasir Qadri, Nadia N. Qadri, Martin Fleury, Klaus D. McDonald-Maier:
Energy-efficient data prefetch buffering for low-end embedded processors. Microelectron. J. 62: 57-64 (2017)
2016
[j5]
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Muhammad Yasir Qadri, Nadia N. Qadri, Klaus D. McDonald-Maier:
Fuzzy logic based energy and throughput aware design space exploration for MPSoCs. Microprocess. Microsystems 40: 113-123 (2016)
2015
[j4]
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  - journals/jcsc/QadriQFM15
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Muhammad Yasir Qadri, Nadia N. Qadri, Martin Fleury, Klaus D. McDonald-Maier:
Software-Controlled Instruction Prefetch Buffering for Low-End Processors. J. Circuits Syst. Comput. 24(10): 1550161:1-1550161:17 (2015)
2014
[j3]
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  - journals/jifs/QadriMQ14
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Muhammad Yasir Qadri, Klaus D. McDonald-Maier, Nadia N. Qadri:
Energy and throughput aware fuzzy logic based reconfiguration for MPSoCs. J. Intell. Fuzzy Syst. 26(1): 101-113 (2014)
2010
[c4]
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  - conf/ahs/QadriM10
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Muhammad Yasir Qadri, Klaus D. McDonald-Maier:
A fuzzy logic based dynamic reconfiguration scheme for optimal energy and throughput in symmetric chip multiprocessors. AHS 2010: 333-339
[c3]
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  - conf/arcs/QadriMM10
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Muhammad Yasir Qadri, Dorian Matichard, Klaus D. McDonald-Maier:
JetBench: An Open Source Real-time Multiprocessor Benchmark. ARCS 2010: 211-221
[c2]
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  - conf/cisis/QadriM10
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Muhammad Yasir Qadri, Klaus D. McDonald-Maier:
A Fuzzy Logic Reconfiguration Engine for Symmetric Chip Multiprocessors. CISIS 2010: 937-943
[c1]
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  - conf/uksim/QadriM10
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Muhammad Yasir Qadri, Klaus D. McDonald-Maier:
Analytical Evaluation of Energy and Throughput for Multilevel Caches. UKSim 2010: 598-603
2009
[j2]
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  - journals/ejes/QadriM09
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Muhammad Yasir Qadri, Klaus D. McDonald-Maier:
Data Cache-Energy and Throughput Models: Design Exploration for Embedded Processors. EURASIP J. Embed. Syst. 2009 (2009)
[j1]
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Muhammad Yasir Qadri, Hemal S. Gujarathi, Klaus D. McDonald-Maier:
Low Power Processor Architectures and Contemporary Techniques for Power Optimization - A Review. J. Comput. 4(10): 927-942 (2009)

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