Tuan Thanh Ta

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Hiroshi Kubota

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Publications

2022
[c10]
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Toshiki Sugimoto, Tuan Thanh Ta, Koichi Kokubun, Satoshi Kondo, Tetsuro Itakura, Hisaaki Katagiri, Yutaka Ota, Mitsuhiro Sengoku, Honam Kwon, Keita Sasaki, Hiroshi Kubota, Kazuhiro Suzuki, Katsuyuki Kimura, Akihide Sai:
1200x84-pixels 30fps 64cc Solid-State LiDAR RX with an HV/LV transistors Hybrid Active-Quenching-SPAD Array and Background Digital PT Compensation. VLSI Technology and Circuits 2022: 80-81
2020
[j9]
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  - journals/jssc/KondoKKOHTOOOSI20
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Satoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto:
An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm² Voltage/Time Dual-Data-Converter-Based AFE. IEEE J. Solid State Circuits 55(11): 2866-2877 (2020)
[c8]
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Satoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto:
5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm² Voltage/Time Dual-Data-Converter-Based AFE. ISSCC 2020: 94-96
[c7]
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Tuan Thanh Ta, Hiroshi Kubota, Koichi Kokubun, Toshiki Sugimoto, Masatoshi Hirono, Mitsuhiro Sengoku, Hisaaki Katagiri, Hidenori Okuni, Satoshi Kondo, Shinichi Ohtsuka, Honam Kwon, Keita Sasaki, Yutaka Ota, Kazuhiro Suzuki, Katsuyuki Kimura, Kentaro Yoshioka, Akihide Sai, Nobu Matsumoto:
A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDAR. VLSI Circuits 2020: 1-2
2018
[j8]
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Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Masatoshi Hirono, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiko Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto:
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC. IEEE J. Solid State Circuits 53(11): 3026-3038 (2018)
[c5]
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Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiro Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto:
A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique. ISSCC 2018: 92-94

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