Francisco Rodríguez-Henríquez

◀ ▶ joint publications with Arturo Diaz-Perez

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Publications

2005
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Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez:
A reconfigurable processor for high speed point multiplication in elliptic curves. Int. J. Embed. Syst. 1(3/4): 237-249 (2005)
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Emmanuel López-Trejo, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez:
An FPGA Implementation of CCM Mode Using AES. ICISC 2005: 322-334
2004
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Francisco Rodríguez-Henríquez, Nazar Abbas Saqib, Arturo Díaz-Pérez:
A fast parallel implementation of elliptic curve point multiplication over GF(2^m). Microprocess. Microsystems 28(5-6): 329-339 (2004)
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Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez:
A Parallel Architecture for Fast Computation of Elliptic Curve Scalar Multiplication over GF(2^m). IPDPS 2004
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Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez:
A Parallel Architecture for Computing Scalar Multiplication on Hessian Elliptic Curves. ITCC (2) 2004: 493-497
2003
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Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez:
AES Algorithm Implementation-An efficient approach for Sequential and Pipeline Architectures. ENC 2003: 126-130
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Nazar Abbas Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez:
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core. FPL 2003: 303-312

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