Byeong Cheol Na

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Clement Szeto

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Publications

2014
[c2]
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Bendik Kleveland, Jeong Choi, Jeff Kumala, Pascal Adam, Patrick Chen, Rajesh Chopra, Antonio Cruz, Ronald B. David, Ashish Dixit, Sinan Doluca, Mark Hendrickson, Ben Lee, Ming Liu, Michael John Miller, Mike Morrison, Byeong Cheol Na, Jay Patel, Dipak K. Sikdar, Michael Sporer, Clement Szeto, Anju Tsao, Jianguang Wang, Daniel Yau, Wesley Yu:
Early detection and repair of VRT and aging DRAM bits by margined in-field BIST. VLSIC 2014: 1-2
2012
[c1]
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  - conf/esscirc/VamvakosKSALBBBCCCCCDDDDGHHCKKLLMMNPPRRRSSSSWY12
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  - https://dblp.org/rec/conf/esscirc/VamvakosKSALBBBCCCCCDDDDGHHCKKLLMMNPPRRRSSSSWY12
Socrates D. Vamvakos, Bendik Kleveland, Dipak K. Sikdar, B. K. Ahuja, Haidang Lin, Jayaprakash Balachandran, Wignes Balakrishnan, Aldo Bottelli, Jawji Chen, Xiaole Chen, Jae Choi, Jeong Choi, Rajesh Chopra, Sanjay Dabral, Kalyan Dasari, Ronald B. David, Shaishav Desai, Claude R. Gauthier, Mahmudul Hassan, Kuo-Chiang Hsieh, Ramosan Canagasaby, Jeff Kumala, E. P. Kwon, Ben Lee, Ming Liu, Gurupada Mandal, Sundari Mitra, Byeong Cheol Na, Siddharth Panwar, Jay Patel, Chethan Rao, Vithal Rao, Richard Rouse, Ritesh Saraf, Subramanian Seshadri, Jae-K. Sim, Clement Szeto, Alvin Wang, Jason Yeung:
A 576 Mb DRAM with 16-channel 10.3125Gbps serial I/O and 14.5 ns latency. ESSCIRC 2012: 458-461

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