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Luis Entrena

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Emilio Olías

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Publications

2001
[c12]
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  - conf/aspdac/EspejoEMO01
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  - https://dblp.org/rec/conf/aspdac/EspejoEMO01
José Alberto Espejo, Luis Entrena, Enrique San Millán, Emilio Olías:
Functional extension of structural logic optimization techniques. ASP-DAC 2001: 467-472
[c11]
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  - conf/date/EspejoEMO01
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José Alberto Espejo, Luis Entrena, Enrique San Millán, Emilio Olías:
Generalized reasoning scheme for redundancy addition and removal logic optimization. DATE 2001: 391-397
[c8]
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  - conf/iolts/EntrenaLOME01
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Luis Entrena, Celia López, Emilio Olías, Enrique San Millán, José Alberto Espejo:
Logic Optimization of Unidirectional Circuits with Structural Methods. IOLTW 2001: 43-47
[c7]
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Luis Entrena, Celia López, Emilio Olías:
Automatic Insertion of Fault-Tolerant Structures at the RT Level. IOLTW 2001: 48-50
1999
[c5]
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  dblp key:
  - conf/euromicro/EspejoEMO99
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José Alberto Espejo, Luis Entrena, Enrique San Millán, Emilio Olías:
Logic Restructuring for MUX-Based FPGAs. EUROMICRO 1999: 1161-
1996
[c4]
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  - conf/eurodac/EntrenaOUE96
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  - https://dblp.org/rec/conf/eurodac/EntrenaOUE96
Luis Entrena, Emilio Olías, Javier Uceda, José Alberto Espejo:
Timing optimization by an improved redundancy addition and removal technique. EURO-DAC 1996: 342-347

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