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Seng-Pan U
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Publications
- 2018
- [j41]Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
An Analog-Assisted Tri-Loop Digital Low-Dropout Regulator. IEEE J. Solid State Circuits 53(1): 20-34 (2018) - [c91]Junmin Jiang, Yan Lu, Xun Liu, Wing-Hung Ki, Philip K. T. Mok, Seng-Pan U, Rui Paulo Martins:
A dual-output SC converter with dynamic power allocation for multicore application processors. ASP-DAC 2018: 285-286 - [c89]Fangyu Mao, Yan Lu, Jie Lin, Chenchang Zhan, Seng-Pan U, Rui Paulo Martins:
A Single-Stage Current-Mode Active Rectifier with Accurate Output-Current Regulation for IoT. ISCAS 2018: 1-4 - [c88]Fangyu Mao, Yan Lu, Seng-Pan U., Rui Paulo Martins:
A reconfigurable cross-connected wireless-power transceiver for bidirectional device-to-device charging with 78.1% total efficiency. ISSCC 2018: 140-142 - [c87]Fangyu Mao, Yan Lu, Seng-Pan U, Rui Paulo Martins:
A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems. VLSI-DAT 2018: 1-4 - 2017
- [j33]Ziyang Luo, Yan Lu, Mo Huang, Junmin Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A sub-1V 78-nA bandgap reference with curvature compensation. Microelectron. J. 63: 35-40 (2017) - [j31]Yan Lu, Haojuan Dai, Mo Huang, Man-Kay Law, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A Wide Input Range Dual-Path CMOS Rectifier for RF Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 166-170 (2017) - [c79]Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
20.4 An output-capacitor-free analog-assisted digital low-dropout regulator with tri-loop control. ISSCC 2017: 342-343 - [c78]Junmin Jiang, Yan Lu, Wing-Hung Ki, Seng-Pan U, Rui Paulo Martins:
20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS. ISSCC 2017: 344-345 - [c77]Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
22.4 A reconfigurable bidirectional wireless power transceiver with maximum-current charging mode and 58.6% battery-to-battery efficiency. ISSCC 2017: 376-377 - 2016
- [j22]Mo Huang, Yan Lu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A Fully Integrated Digital LDO With Coarse-Fine-Tuning and Burst-Mode Operation. IEEE Trans. Circuits Syst. II Express Briefs 63-II(7): 683-687 (2016) - [j21]Mo Huang, Yan Lu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Wing-Hung Ki:
Limit Cycle Oscillation Reduction for Digital Low Dropout Regulators. IEEE Trans. Circuits Syst. II Express Briefs 63-II(9): 903-907 (2016) - [c75]Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
A digital LDO with transient enhancement and limit cycle oscillation reduction. APCCAS 2016: 25-28 - 2015
- [c67]Yan Lu, Junmin Jiang, Wing-Hung Ki, C. Patrick Yue, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
20.4 A 123-phase DC-DC converter-ring with fast-DVS for microprocessors. ISSCC 2015: 1-3
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