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ORCIDGuido Bertoni
- > Home > Persons > Guido Bertoni
Publications
- 2016
[j9]Alessandro Barenghi
, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi, Stefano Sanfilippo, Ruggero Susella:
A Fault-Based Secret Key Retrieval Method for ECDSA: Analysis and Countermeasure. ACM J. Emerg. Technol. Comput. Syst. 13(1): 8:1-8:26 (2016)- 2013
- [j5]Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi:
A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA. J. Syst. Softw. 86(7): 1864-1878 (2013) - 2012
- [p2]Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi:
Injection Technologies for Fault Attacks on Microprocessors. Fault Analysis in Cryptography 2012: 275-293 - 2011
- [c29]Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi, Andrea Palomba:
Fault attack to the elliptic curve digital signature algorithm with multiple bit faults. SIN 2011: 63-72 - 2010
- [c28]Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi:
Fault attack on AES with single-bit induced faults. IAS 2010: 167-172 - [c26]Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi:
Low Voltage Fault Attacks to AES. HOST 2010: 7-12 - [i6]Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi:
Low Voltage Fault Attacks to AES and RSA on General Purpose Processors. IACR Cryptol. ePrint Arch. 2010: 130 (2010) - 2009
- [c24]Guido Marco Bertoni, Luca Breveglieri, Alessandro Cominola, Filippo Melzani, Ruggero Susella:
Practical Power Analysis Attacks to RSA on a Large IP Portfolio SoC. ITNG 2009: 455-460 - 2008
- [j4]Guido Marco Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi:
Parallel Hardware Architectures for the Cryptographic Tate Pairing. Int. J. Netw. Secur. 7(1): 31-37 (2008) - [j3]Guido Bertoni, Luca Breveglieri, Liqun Chen, Pasqualina Fragneto, Keith A. Harrison, Gerardo Pelosi:
A pairing SW implementation for Smart-Cards. J. Syst. Softw. 81(7): 1240-1247 (2008) - [c22]Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Gerardo Pelosi:
A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp. ITNG 2008: 112-119 - [c21]Guido Marco Bertoni, Luca Breveglieri, Roberto Farina, Francesco Regazzoni:
A 640 Mbit/S 32-Bit Pipelined Implementation of the AES Algorithm. SECRYPT 2008: 453-459 - 2006
- [c20]Guido Bertoni, Luca Breveglieri, Roberto Farina, Francesco Regazzoni:
Speeding Up AES By Extending a 32 bit Processor Instruction Set. ASAP 2006: 275-282 - [c19]Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi, Luigi Sportiello:
Software implementation of Tate pairing over GF(2m). DATE Designers' Forum 2006: 7-11 - [c18]Thomas J. Wollinger, Guido Bertoni, Luca Breveglieri, Christof Paar:
Performance of HECC Coprocessors Using Inversion-Free Formulae. ICCSA (3) 2006: 1004-1012 - [c17]Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi:
Parallel Hardware Architectures for the Cryptographic Tate Pairing. ITNG 2006: 186-191 - [c16]Guido Bertoni, Luca Breveglieri, Matteo Venturi:
ECC Hardware Coprocessors for 8-bit Systems and Power Consumption Considerations. ITNG 2006: 573-574 - [c15]Guido Bertoni, Luca Breveglieri, Matteo Venturi:
Power Aware Design of an Elliptic Curve Coprocessor for 8 bit Platforms. PerCom Workshops 2006: 337-341 - 2005
- [c14]Guido Bertoni, Vittorio Zaccaria, Luca Breveglieri, Matteo Monchiero, Gianluca Palermo:
AES Power Attack Based on Induced Cache Miss and Countermeasure. ITCC (1) 2005: 586-591 - [c13]Fabio Sozzani, Guido Bertoni, Stefano Turcato, Luca Breveglieri:
A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor. ITCC (1) 2005: 626-630 - 2004
- [c12]Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri:
An Efficient Hardware-Based Fault Diagnosis Scheme for AES: Performances and Cost. DFT 2004: 130-138 - [c10]Guido Bertoni, Luca Breveglieri, Thomas J. Wollinger, Christof Paar:
Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. ITCC (2) 2004: 538- - [i1]Guido Bertoni, Luca Breveglieri, Thomas J. Wollinger, Christof Paar:
Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. IACR Cryptol. ePrint Arch. 2004: 29 (2004) - 2003
- [j1]Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri:
Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard. IEEE Trans. Computers 52(4): 492-505 (2003) - [c9]Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri:
Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm. ASAP 2003: 423-432 - [c7]Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri:
Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard. DFT 2003: 105- - [c5]Guido Bertoni, A. Bircan, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Vittorio Zaccaria:
About the performances of the Advanced Encryption Standard in embedded systems with cache memory. ISCAS (5) 2003: 145-148 - 2002
- [c4]Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri:
On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard. ASAP 2002: 303- - [c3]Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Stefano Marchesin:
Efficient Software Implementation of AES on 32-Bit Platforms. CHES 2002: 159-171 - [c2]Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri:
A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard. DFT 2002: 51-59 - 2001
- [c1]Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto:
Efficient finite field digital-serial multiplier architecture for cryptography applications. DATE 2001: 812
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