BibTeX record conf/dac/RajaVBG08

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@inproceedings{DBLP:conf/dac/RajaVBG08,
  author       = {S. Raja and
                  F. Varadi and
                  Murat R. Becer and
                  Joao Geada},
  editor       = {Limor Fix},
  title        = {Transistor level gate modeling for accurate and fast timing, noise,
                  and power analysis},
  booktitle    = {Proceedings of the 45th Design Automation Conference, {DAC} 2008,
                  Anaheim, CA, USA, June 8-13, 2008},
  pages        = {456--461},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1145/1391469.1391588},
  doi          = {10.1145/1391469.1391588},
  timestamp    = {Tue, 06 Nov 2018 16:58:15 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/RajaVBG08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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