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BibTeX record conf/isscc/BarthRPFGSMHTHKKGHYKI07
@inproceedings{DBLP:conf/isscc/BarthRPFGSMHTHKKGHYKI07, author = {John Barth and William R. Reohr and Paul C. Parries and Gregory Fredeman and John Golz and Stanley Schuster and Richard E. Matick and Hillery C. Hunter and Charles Tanner and Joseph Harig and Hoki Kim and Babar A. Khan and John Griesemer and Robert Havreluk and Kenji Yanagisawa and Toshiaki Kirihata and Subramanian S. Iyer}, title = {A 500MHz Random Cycle 1.5ns-Latency, {SOI} Embedded {DRAM} Macro Featuring a 3T Micro Sense Amplifier}, booktitle = {2007 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007}, pages = {486--617}, publisher = {{IEEE}}, year = {2007}, url = {https://doi.org/10.1109/ISSCC.2007.373506}, doi = {10.1109/ISSCC.2007.373506}, timestamp = {Wed, 02 Mar 2022 21:39:38 +0100}, biburl = {https://dblp.org/rec/conf/isscc/BarthRPFGSMHTHKKGHYKI07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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