BibTeX record conf/micro/HajisheykhiEK13

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@inproceedings{DBLP:conf/micro/HajisheykhiEK13,
  author       = {Reza Hajisheykhi and
                  Ali Ebnenasir and
                  Sandeep S. Kulkarni},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak and
                  Masoud Daneshtalab},
  title        = {Modeling and analyzing timing faults in transaction level SystemC
                  programs},
  booktitle    = {Network on Chip Architectures, NoCArc '13, in conjunction with the
                  46th Annual {IEEE/ACM} International Symposium on Microarchitecture,
                  MICRO-46, Davis, CA, USA, December 7, 2013},
  pages        = {65--68},
  publisher    = {{ACM}},
  year         = {2013},
  url          = {https://doi.org/10.1145/2536522.2536533},
  doi          = {10.1145/2536522.2536533},
  timestamp    = {Tue, 06 Nov 2018 16:58:27 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/HajisheykhiEK13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}