BibTeX record conf/patmos/2008

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@proceedings{DBLP:conf/patmos/2008,
  editor       = {Lars Svensson and
                  Jos{\'{e}} Monteiro},
  title        = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
                  and Simulation, 18th International Workshop, {PATMOS} 2008, Lisbon,
                  Portugal, September 10-12, 2008. Revised Selected Papers},
  series       = {Lecture Notes in Computer Science},
  volume       = {5349},
  publisher    = {Springer},
  year         = {2009},
  url          = {https://doi.org/10.1007/978-3-540-95948-9},
  doi          = {10.1007/978-3-540-95948-9},
  isbn         = {978-3-540-95947-2},
  timestamp    = {Wed, 23 Feb 2022 16:05:31 +0100},
  biburl       = {https://dblp.org/rec/conf/patmos/2008.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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