BibTeX record conf/vlsid/RajanSS97

download as .bib file

@inproceedings{DBLP:conf/vlsid/RajanSS97,
  author       = {Sreeranga P. Rajan and
                  Natarajan Shankar and
                  Mandayam K. Srivas},
  title        = {Industrial Strength Formal Verification Techniques for Hardware Designs},
  booktitle    = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
                  4-7 January 1997, Hyderabad, India},
  pages        = {208--212},
  publisher    = {{IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ICVD.1997.568077},
  doi          = {10.1109/ICVD.1997.568077},
  timestamp    = {Sun, 03 Sep 2023 17:22:40 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsid/RajanSS97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.