BibTeX record journals/integration/MakSCL10

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@article{DBLP:journals/integration/MakSCL10,
  author       = {Terrence S. T. Mak and
                  N. Pete Sedcole and
                  Peter Y. K. Cheung and
                  Wayne Luk},
  title        = {Wave-pipelined intra-chip signaling for on-FPGA communications},
  journal      = {Integr.},
  volume       = {43},
  number       = {2},
  pages        = {188--201},
  year         = {2010},
  url          = {https://doi.org/10.1016/j.vlsi.2010.01.002},
  doi          = {10.1016/J.VLSI.2010.01.002},
  timestamp    = {Thu, 20 Feb 2020 13:21:38 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/MakSCL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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