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BibTeX record journals/jssc/HsiehCLC16
@article{DBLP:journals/jssc/HsiehCLC16, author = {Min{-}Han Hsieh and Liang{-}Hsin Chen and Shen{-}Iuan Liu and Charlie Chung{-}Ping Chen}, title = {A 6.7 MHz to 1.24 GHz 0.0318 mm \({}^{\mbox{2}}\) Fast-Locking All-Digital {DLL} Using Phase-Tracing Delay Unit in 90 nm {CMOS}}, journal = {{IEEE} J. Solid State Circuits}, volume = {51}, number = {2}, pages = {412--427}, year = {2016}, url = {https://doi.org/10.1109/JSSC.2015.2494603}, doi = {10.1109/JSSC.2015.2494603}, timestamp = {Sun, 30 Aug 2020 00:13:06 +0200}, biburl = {https://dblp.org/rec/journals/jssc/HsiehCLC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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