"Circuit recognition and verification based on layout information."

I. Ablasser, U. Jäger (1981)

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DOI: —

access: closed

type: Conference or Workshop Paper

metadata version: 2012-03-01

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  dblp key:
  - conf/dac/AblasserJ81
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  persistent URL:
  - https://dblp.org/rec/conf/dac/AblasserJ81
I. Ablasser, U. Jäger:
Circuit recognition and verification based on layout information. DAC 1981: 684-689

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