"Low-power architectural trade-offs in a VLSI implementation of an adaptive ..."

Felix Bürgin et al. (2006)

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DOI: 10.1145/1146909.1147054

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/dac/BurginCHMMSKFF06
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  - https://dblp.org/rec/conf/dac/BurginCHMMSKFF06
Felix Bürgin, Flavio Carbognani, Martin Hediger, Hektor Meier, Robert Meyer-Piening, Rafael Santschi, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner:
Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm. DAC 2006: 558-561

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