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"Device and architecture co-optimization for FPGA power reduction."

Lerong Cheng et al. (2005)

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DOI: 10.1145/1065579.1065819

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/dac/ChengWLLH05
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  - https://dblp.org/rec/conf/dac/ChengWLLH05
Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He:
Device and architecture co-optimization for FPGA power reduction. DAC 2005: 915-920

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