"A Task-Level Hierarchical Memory Model for System Synthesis of ..."

Yanbing Li, Wayne H. Wolf (1997)

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DOI: 10.1145/266021.266053

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Yanbing Li, Wayne H. Wolf:
A Task-Level Hierarchical Memory Model for System Synthesis of Multiprocessors. DAC 1997: 153-156

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