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"Hierarchical design verification for large digital systems."
Tohru Sasaki et al. (1981)
- Tohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato:

Hierarchical design verification for large digital systems. DAC 1981: 105-112

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