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@inproceedings{DBLP:conf/hpca/ChungCMMCKO06,
author = {JaeWoong Chung and
Hassan Chafi and
Chi Cao Minh and
Austen McDonald and
Brian D. Carlstrom and
Christos Kozyrakis and
Kunle Olukotun},
title = {The common case transactional behavior of multithreaded programs},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {266--277},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598135},
doi = {10.1109/HPCA.2006.1598135},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ChungCMMCKO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ConstantinidesPBZBMAO06,
author = {Kypros Constantinides and
Stephen Plaza and
Jason A. Blome and
Bin Zhang and
Valeria Bertacco and
Scott A. Mahlke and
Todd M. Austin and
Michael Orshansky},
title = {BulletProof: a defect-tolerant {CMP} switch architecture},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {5--16},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598108},
doi = {10.1109/HPCA.2006.1598108},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ConstantinidesPBZBMAO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Emma06,
author = {Philip G. Emma},
title = {Industrial Perspectives: The Next Roadblocks in {SOC} Evolution: On-Chip
Storage Capacity and Off-Chip Bandwidth},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {201--201},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598128},
doi = {10.1109/HPCA.2006.1598128},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Emma06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/GontmakherMSS06,
author = {Alex Gontmakher and
Avi Mendelson and
Assaf Schuster and
Gregory Shklover},
title = {Speculative synchronization and thread management for fine granularity
threads},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {278--287},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598136},
doi = {10.1109/HPCA.2006.1598136},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/GontmakherMSS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HuKLS06,
author = {Shiliang Hu and
Ilhyun Kim and
Mikko H. Lipasti and
James E. Smith},
title = {An approach for implementing efficient superscalar {CISC} processors},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {41--52},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598111},
doi = {10.1109/HPCA.2006.1598111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/HuKLS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HuangGH06,
author = {Ruke Huang and
Alok Garg and
Michael C. Huang},
title = {Software-hardware cooperative memory disambiguation},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {244--253},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598133},
doi = {10.1109/HPCA.2006.1598133},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/HuangGH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/IsciM06,
author = {Canturk Isci and
Margaret Martonosi},
title = {Phase characterization for power: evaluating control-flow-based and
event-counter-based techniques},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {121--132},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598119},
doi = {10.1109/HPCA.2006.1598119},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/IsciM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/JaleelMJ06,
author = {Aamer Jaleel and
Matthew Mattina and
Bruce L. Jacob},
title = {Last level cache {(LLC)} performance of data mining workloads on a
{CMP} - a case study of parallel bioinformatics workloads},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {88--98},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598115},
doi = {10.1109/HPCA.2006.1598115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/JaleelMJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/JosephVT06,
author = {P. J. Joseph and
Kapil Vaswani and
Matthew J. Thazhuthaveetil},
title = {Construction and use of linear regression models for processor performance
analysis},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {99--108},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598116},
doi = {10.1109/HPCA.2006.1598116},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/JosephVT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KimGS06,
author = {Youngjae Kim and
Sudhanva Gurumurthi and
Anand Sivasubramaniam},
title = {Understanding the performance-temperature interactions in disk {I/O}
of server workloads},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {176--186},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598124},
doi = {10.1109/HPCA.2006.1598124},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KimGS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KumarA06,
author = {Sumeet Kumar and
Aneesh Aggarwal},
title = {Reducing resource redundancy for concurrent error detection techniques
in high performance microprocessors},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {212--221},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598130},
doi = {10.1109/HPCA.2006.1598130},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KumarA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LiLBHS06,
author = {Yingmin Li and
Benjamin C. Lee and
David M. Brooks and
Zhigang Hu and
Kevin Skadron},
title = {{CMP} design space exploration subject to physical constraints},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {17--28},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598109},
doi = {10.1109/HPCA.2006.1598109},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/LiLBHS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LiM06,
author = {Jian Li and
Jos{\'{e}} F. Mart{\'{\i}}nez},
title = {Dynamic power-performance adaptation of parallel computation on chip
multiprocessors},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {77--87},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598114},
doi = {10.1109/HPCA.2006.1598114},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/LiM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ManovitH06,
author = {Chaiyasit Manovit and
Sudheendra Hangal},
title = {Completely verifying memory consistency of test program executions},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {166--175},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598123},
doi = {10.1109/HPCA.2006.1598123},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ManovitH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/MooreBMHW06,
author = {Kevin E. Moore and
Jayaram Bobba and
Michelle J. Moravan and
Mark D. Hill and
David A. Wood},
title = {LogTM: log-based transactional memory},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {254--265},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598134},
doi = {10.1109/HPCA.2006.1598134},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/MooreBMHW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/NakanoMGT06,
author = {Jun Nakano and
Pablo Montesinos and
Kourosh Gharachorloo and
Josep Torrellas},
title = {ReViveI/O: efficient handling of {I/O} in highly-available rollback-recovery
servers},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {200--211},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598129},
doi = {10.1109/HPCA.2006.1598129},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/NakanoMGT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PandeyJZB06,
author = {Vivek Pandey and
Weihang Jiang and
Yuanyuan Zhou and
Ricardo Bianchini},
title = {DMA-aware memory energy management},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {133--144},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598120},
doi = {10.1109/HPCA.2006.1598120},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/PandeyJZB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PenryFHWSAC06,
author = {David A. Penry and
Daniel Fay and
David Hodgdon and
Ryan Wells and
Graham Schelle and
David I. August and
Dan Connors},
title = {Exploiting parallelism and structure to accelerate the simulation
of chip multi-processors},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {29--40},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598110},
doi = {10.1109/HPCA.2006.1598110},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/PenryFHWSAC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PericasCGJV06,
author = {Miquel Peric{\`{a}}s and
Adri{\'{a}}n Cristal and
Rub{\'{e}}n Gonz{\'{a}}lez and
Daniel A. Jim{\'{e}}nez and
Mateo Valero},
title = {A decoupled KILO-instruction processor},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {53--64},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598112},
doi = {10.1109/HPCA.2006.1598112},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/PericasCGJV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Prvulovic06,
author = {Milos Prvulovic},
title = {{CORD:} cost-effective (and nearly overhead-free) order-recording
and data race detection},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {232--243},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598132},
doi = {10.1109/HPCA.2006.1598132},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Prvulovic06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PujaraA06,
author = {Prateek Pujara and
Aneesh Aggarwal},
title = {Increasing the cache efficiency by eliminating noise},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {145--154},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598121},
doi = {10.1109/HPCA.2006.1598121},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/PujaraA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Recio06,
author = {Renato Recio},
title = {Industrial Perspectives: System {IO} Network Evolution - Closing Requirement
Gaps},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {201--201},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598127},
doi = {10.1109/HPCA.2006.1598127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Recio06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RileyZ06,
author = {Nicholas Riley and
Craig B. Zilles},
title = {Probabilistic counter updates for predictor hysteresis and stratification},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {110--120},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598118},
doi = {10.1109/HPCA.2006.1598118},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/RileyZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SharkeyP06,
author = {Joseph J. Sharkey and
Dmitry V. Ponomarev},
title = {Efficient instruction schedulers for {SMT} processors},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {288--298},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598137},
doi = {10.1109/HPCA.2006.1598137},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SharkeyP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Shaw06,
author = {Doug E. Shaw},
title = {New architectures for a new biology},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {4},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598107},
doi = {10.1109/HPCA.2006.1598107},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Shaw06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ShiFGLZY06,
author = {Weidong Shi and
Joshua B. Fryman and
Guofei Gu and
Hsien{-}Hsin S. Lee and
Youtao Zhang and
Jun Yang},
title = {InfoShield: a security architecture for protecting information usage
in memory},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {222--231},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598131},
doi = {10.1109/HPCA.2006.1598131},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/ShiFGLZY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Stenstrom06,
author = {Per Stenstr{\"{o}}m},
title = {Chip-multiprocessing and beyond},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {109},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598117},
doi = {10.1109/HPCA.2006.1598117},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Stenstrom06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SubramaniamL06,
author = {Samantika Subramaniam and
Gabriel H. Loh},
title = {Store vectors for scalable memory dependence prediction and scheduling},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {65--76},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598113},
doi = {10.1109/HPCA.2006.1598113},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SubramaniamL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/VenkatesanHR06,
author = {Ravi K. Venkatesan and
Stephen Herr and
Eric Rotenberg},
title = {Retention-aware placement in {DRAM} {(RAPID):} software methods for
quasi-non-volatile {DRAM}},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {155--165},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598122},
doi = {10.1109/HPCA.2006.1598122},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/VenkatesanHR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Yavatkar06,
author = {Raj Yavatkar},
title = {Industrial Perspectives: Platform Design Challenges with Many cores},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {201--201},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598126},
doi = {10.1109/HPCA.2006.1598126},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Yavatkar06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/YuSHACGMPERTLG06,
author = {Hao Yu and
Ramendra K. Sahoo and
C. Howson and
George Alm{\'{a}}si and
Jos{\'{e}} G. Casta{\~{n}}os and
Manish Gupta and
Jos{\'{e}} E. Moreira and
Jeffrey J. Parker and
Thomas Engelsiepen and
Robert B. Ross and
Rajeev Thakur and
Robert Latham and
William D. Gropp},
title = {High performance file {I/O} for the Blue Gene/L supercomputer},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {187--196},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598125},
doi = {10.1109/HPCA.2006.1598125},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/YuSHACGMPERTLG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2006,
title = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://ieeexplore.ieee.org/xpl/conhome/10647/proceeding},
isbn = {0-7803-9368-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/2006.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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