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ORCIDAPCCAS 2006: Singapore
- IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006. IEEE 2006, ISBN 1-4244-0387-1
- Santanu Sarkar, Arindrajit Ghosh, Swapna Banerjee:
A Fully Differential 11mW 10-bit 200MS/s Sample and Hold in 0.25µm BiCMOS Technology. 1-4 - Vipul Katyal, Randall L. Geiger, Degang Chen:
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs. 5-8 - Xin Zhang, Dunshan Yu, Shimin Sheng:
A CMOS Differential Difference Amplifier with Reduced Nonlinearity Error of Interpolation for Interpolating ADCs. 9-12 - Gholamreza Nikandish
, Behnam Sedighi, Mehrdad Sharif Bakhtiar:
INL Prediction Method in Pipeline ADCs. 13-16 - Franz Schlögl, Horst Dietrich, Horst Zimmermann:
Differential OPAMP with Inherent Common-Mode Control and Self-Biased Cascodes in 120nm CMOS. 17-20 - Xian Ping Fan, Pak Kwong Chan:
Improving Source-Follower Buffer for High-Speed ADC Testing. 21-24 - Wang-Chi Cheng, Cheong-Fat Chan, Suyi Tao, King-Keung Mok:
0.7 V Monolithic CMOS LNA for 802.11 A/B WLAN Application. 25-28 - Amit Gopal M. Purohit, Sanjeev Gupta:
A New Linearity Enhancing Technique for Low Noise Amplifiers. 29-32 - Sang-Sun Yoo, Seok-Oh Yun, Soo-Hwan Shin, Hyung-Joun Yoo:
A CMOS Current-Reused Transceiver with Stacked LNA and Mixer for WPAN. 33-36 - Jun-Da Chen, Zhi-Ming Lin:
2.4 GHz High IIP3 and Low-Noise Down-conversion Mixer. 37-40 - Zhi-Qiang Lu, Feng-Chang Lai:
Compact Modeling of MOSFETs Channel Noise for Low-Noise RF ICs Design. 41-44 - Lini Lee, S. S. Jamuar, Roslina Mohd Sidek, S. Khatun:
An 8 GHz Variable Gain Low Noise Amplifier (VGLNA) Utilizing Parallel Inter-Stage Resonance. 45-48 - Wu-Sheng Lu:
Digital Filter Design: Global Solutions via Polynomial Optimization. 49-52 - Yongzhi Liu, Zhiping Lin:
Design of Arbitrary FIR Digital Filters with Group Delay Constraint. 53-56 - Tian-Bo Deng:
Symmetry Development for Implementing Odd-Order Lagrange-Type Variable Fractional-Delay Filters. 57-60 - Shing-Chow Chan, Kai Man Tsui, S. H. Zhao:
A Methodology for Automatic Hardware Synthesis of Multiplier-less Digital Filters with Prescribed Output Accuracy. 61-64 - Shing-Chow Chan, Kai Man Tsui, Hon Keung Kwan:
A New Method for Designing Constrained Causal Stable IIR Variable Digital Filters. 65-68 - Chun Zhu Yang, Yong Lian:
New Structures for Single Filter Based Frequency-Response Masking Approach. 69-72 - Katsuya Kondo, Asumi Yamachika, Syoji Kobashi, Yutaka Hata:
3D Shape Acquisition and Arbitrary View Image Generation from Monocular Image Based on Primitive Decomposition. 73-76 - Nongluk Eiamjumrus, Supavadee Aramvith:
Cauchy based Rate-Distortion Optimization Model for H.264 Rate Control. 77-80 - Cong-Van Nguyen, David B. H. Tay, Guang Deng:
A Fast Watermarking System for H.264/AVC Video. 81-84 - Yasuhide Wakabayashi, Akira Taguchi:
A New Efficient Approach for Removal of Impulse Noise for Color Images. 85-88 - Risanuri Hidayat, Kobchai Dejhan, P. Moungnoul, Yoshikazu Miyanaga:
A 0.18µm CMOS Gaussian Monocycle Pulse Circuit Design for UWB. 89-92 - Shingo Yoshizawa, Yoshikazu Miyanaga:
VLSI Implementation of a 600-Mbps MIMO-OFDM Wireless Communication System. 93-96 - Terence Chan:
RaceCheck: A Race Logic Audit Program For SoC Designs. 97-100 - Yuchen Sun, ChingYao Huang:
A Development and Validation Platform for Communication SOC Design. 101-104 - Duo Sheng, Ching-Che Chung, Chen-Yi Lee:
A Fast-Lock-In ADPLL with High-Resolution and Low-Power DCO for SoC Applications. 105-108 - Kun Yang, Chun Zhang, Zhihua Wang:
Design of Adaptive Deblocking Filter for H.264/AVC Decoder SOC. 109-112 - Chun-Lung Hsu, Chang-Hsin Cheng, Yu-Sheng Huang, Chih-Jung Chen:
An Adaptive Low-Power Control Scheme for On-Chip Network Applications. 113-118 - Mahdi Nazm Bojnordi, Nariman Moezzi Madani, Mehdi Semsarzadeh, Ali Afzali-Kusha:
An Efficient Clocking Scheme for On-Chip Communications. 119-122 - Shaodan Ma, Tung-Sang Ng:
Semi-Blind Time Domain Equalization for MIMO-OFDM Systems. 123-126 - Yonghong Zeng, Abdul Rahim Leyman:
Linear Precoding For MIMO STC-OFDM And Blind Channel Estimation. 127-130 - Zhengang Pan, Jingxiu Liu, Lan Chen, Kenichi Higuchi, Mamoru Sawahashi:
Multi-degree Random Cyclic Delay Diversity in MISO Systems with Frequency-Domain Scheduling. 131-134 - Gan Zheng, Kai-Kit Wong, Tung-Sang Ng:
Throughput Maximization in Multiuser MIMO Downlink with Individual QoS Constraints. 135-138 - Huan Xuan Nguyen, Jinho Choi:
Iterative Symbol-by-symbol Decision Feedback Detection for MIMO-ISI Channels. 139-142 - The-Hanh Pham, Arumugam Nallanathan, Ying-Chang Liang:
An EM-Based Joint Channel Estimation and Data Detection for SIMO Systems. 143-146 - Jamil Y. Khan, D. F. Hall, P. D. Turner:
Development of a Wireless Sensor Network System for Power Constrained Applications. 147-150 - Simon Willis, Cornelis Jan Kikkert:
Design of a Long-Range Wireless Sensor Node. 151-154 - Liang Wei, Li Yinhua, Li Jie:
Hierarchical Decision-making of Multi-sensor System for State Estimation of Machining Process. 155-158 - Wei Jing, Xu Pingping:
An Optimized Scheme of Energy Consumption in Wireless Sensor MAC Protocol. 159-162 - Tao Yin, Haigang Yang, Quan Yuan, Guoping Cui:
Noise Analysis and Simulation of Chopper Amplifier. 167-170 - Guo-Ming Sung, Jyi-Hrong Tzeng, Chen-Shen Liao, Shih-Chieh Shu:
A Low-power 7-b 33-Msamples/s Switched-current Pipelined ADC for Motor Control. 171-174 - S. Chuenarom, S. Maitreechit, P. Roengruen, V. Tipsuwarnpron:
Low Power Current-Mode Algorithmic ADC in Half Flash (BCD). 175-178 - Kenji Ohno, Hiroki Matsumoto, Kenji Murao:
A Switched-Voltage High-Accuracy Sample/Hold Circuit. 179-182 - Ka-Hou Ao Ieong, Seng-Pan U., Rui Paulo Martins:
A 1-V 2.5-mW Transient-Improved Current-Steering DAC using Charge-Removal-Replacement Technique. 183-186 - Hossein Shamsi, Omid Shoaei:
Continuous Time Delta-Sigma Modulators with Arbitrary DAC Waveforms. 187-190 - Hossein Shamsi, Omid Shoaei:
A New Approach for DAC Non-linearity Compensation in Continuous Time Delta Sigma Modulators. 191-194 - Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy:
Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System. 195-198 - Yu-Chun Huang, Zhi-Ming Lin:
High Power CMOS Power Amplifier for WCDMA. 199-202 - Shuilong Huang, Zhihua Wang, Huainan Ma:
A Fast 1.9 GHz Fractional-N/Integer Frequency Synthesizer with a Self-tuning Algorithm. 203-206 - Ro-Min Weng, Bing-Hung Chen:
A CMOS Digitally Controlled RF Variable Gain Amplifier. 207-209 - Hsin-Ming Wu, Ching-Yuan Yang:
A 3.125-GHz Limiting Amplifier for Optical Receiver System. 210-213 - Ko-Chi Kuo, Feng-Ji Wu:
A 2.4-GHz/5-GHz Low Power Pulse Swallow Counter in 0.18-µm CMOS Technology. 214-217 - Yuan-Pei Lin, Chien-Chang Li, See-May Phoong:
Filterbank Framework for Multicarrier Systems with Improved Subcarrier Separation. 218-221 - Zhongkai Zhang, Tamal Bose, Li Xiao, R. Thamvichai:
Performance Analysis of the Deficient Length EDS Adaptive Algorithm. 222-226 - Saad Bouguezel, M. Omair Ahmad, M. N. S. Swamy:
An Alternate Approach for Developing Higher Radix FFT Algorithms. 227-230 - M. Khalid Khan, Muhammad Aurangzeb Khan, Mohammad A. U. Khan, Sungyoung Lee:
Signature Verification using Velocity-based Directional Filter Bank. 231-234 - Weimin Jia, Minli Yao, Jianshe Song:
Multidimensional Parameters Estimation of Array Signal Based on Steering Vector. 235-238 - Sheau-Fang Lei, Hsi-Fu Lee:
Wavelet Packet Transform for Scalable Audio Encoder. 239-242 - Chien-Chung Kuo, Sheau-Fang Lei:
Design of a Low Power Architecture for CABAC Encoder in H.264. 243-246 - Hsin-Ju Feng, Chih-Hung Kuo:
Frame Based Error Concealment in H.264/AVC by Refined Motion Prediction. 247-250 - Ji-Kun Lin, Hung-Ming Wang, Jar-Ferr Yang:
Matched Block Detection and Motion Vector Salvage Methods for Fast H.264/AVC Inter Mode Decision. 251-254 - Heng-Yao Lin, Hui-Hsien Tsai, Bin-Da Liu, Jar-Ferr Yang, Soon-Jyh Chang:
An Efficient Design-for-testability Scheme for 2-D Transform in H.264 Advanced Video Coders. 255-258 - Yi-Chih Chao, Shih-Tse Wei, Jar-Ferr Yang, Bin-Da Liu:
Combined CAVLC Decoder and Inverse Quantizer for Efficient H.264/AVC Decoding. 259-262 - Ping-Yu Chen, Pau-Choo Chung:
Modified MMSE DMC and Edge Reserving Concealment for Improving H.264 Error Resilience. 263-266 - Chua-Chin Wang, Tzung-Je Lee, Chih-Chen Li, Ron Hu:
An All-MOS High Linearity Voltage-to-Frequency Converter Chip with 520 KHz/V Sensitivity. 267-270 - Leibo Liu, Hongying Meng, Milin Zhang:
An ASIC Implementation of Lifting-Based 2-D Discrete Wavelet Transform. 271-274 - Korrai Deergha Rao, Ch. Gangadhar:
VLSI Realization of Adaptive Equalizers of SIMO FIR Second Order Volterra Channels. 275-278 - Kuan Jen Lin, Chuang Hsiang Huang, Cheng Chia Lo:
Design and Implementation of a Schedulable DMAC on an AMBA-Based SOPC Platform. 279-282 - Wonwoo Jang, Hyunsik Kim, Sungmok Lee, Jooyoung Ha, Bongsoon Kang:
Implementation of the Gamma Line System Similar to Non-linear Gamma Curve with 2bit Error(LSB). 283-286 - King-Keung Mok, Ka-Hung Tsang, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun:
Adiabatic Smart Card. 287-290 - Won Cheol Lee, Jun Su Rark, Hyung Min Chang:
Space-Time Decision-Directed Equalizer for SIMO Systems based on Affine Projection Algorithm. 291-294 - Jong Yoon Hwang, Dongkyoon Cho, Kwang Soon Kim, Keum-Chan Whang:
A Turbo-BLAST method with Non-Linear MMSE Detector for MIMO-OFDM systems. 295-297 - Seungwoo Han:
An Effective SLM-PRSC Hybrid Scheme for OFDM PAPR Reduction Based on Repeated Utilization of Identical PRSC Sequences in Time Domain. 298-301 - Chungwon Park, Hee Yong Youn, Youngmin Kwon:
Efficient Buffer Management for Retry Mechanism in InfiniBand. 302-304 - Jang Woong Park, Jae Hyun Baek, Myung Hoon Sunwoo:
Enhanced Degree Computationless Modified Euclid's Algorithm. 305-308 - Min Woo Kim, Jun Dong Cho:
A VLSI Design of High Speed Bit-level Viterbi Decoder. 309-312 - Ruya Samli, Sabri Arik:
Global Convergence Analysis of Delayed Bidirectional Associative Memory Neural Networks. 313-316 - A. B. Aljunaid, I. AbuElMaaly, Assim Sagahyroon:
Using ANN To Predict The Best HUB Location. 317-320 - Keerthi Laal Kala, M. B. Srinivas:
A Generic Architecture for Intelligent System Hardware. 321-326 - Harya Wicaksana, Hartono Septian, Say Wei Foo:
Recognition of Musical Instruments. 327-330 - Wenbiao Zhou, Yan Zhang, Zhigang Mao:
Pareto based Multi-objective Mapping IP Cores onto NoC Architectures. 331-334 - Mineo Kaneko:
Minimal Set of Essential Resource Disjoint Pairs for Exploring Feasible 3D Schedules. 335-338 - Young-Jae Cho, Kyung-Hoon Lee, Hee-Cheol Choi, Young-Ju Kim, Kyoung-Jun Moon, Seung-Hoon Lee, Seok-Bong Hyun, Seong-Su Park:
A Dual-Channel 6b 1GS/s 0.18um CMOS ADC for Ultra Wide-Band Communication Systems. 339-342 - Ja-Hyun Koo, Yun-Jeong Kim, Bong-Hyuck Park, Sang-Seong Choi, Shin-Il Lim, Suki Kim:
A 4-bit 1.356 Gsps ADC Using Current Processing Method. 343-346 - Jae-Jin Jung, Bong-Hyuck Park, Sang-Seong Choi, Shin-Il Lim, Suki Kim:
A 6-bit 2.704Gsps DAC for DS-CDMA UWB. 347-350 - Kyung-Hoon Lee, Young-Jae Cho, Hee-Cheol Choi, Yong-Hyun Park, Doo-Hwan Sa, Young-Lok Kim, Seung-Hoon Lee:
A 14b 100MS/s 3.4mm2 145mW 0.18um CMOS Pipeline A/D Converter. 351-354 - Seong-Min Ha, Tae-Kyu Nam, Kwang S. Yoon:
An I/Q channel 12 bit 120MS/s CMOS DAC with three stage thermometer decoders for WLAN. 355-358 - Tian Tong, Jian Liu, Jan H. Mikkelsen, Torben Larsen:
A 0.18µm CMOS Fully Differential RF Demodulator for FM-UWB Based P-PAN Receivers. 359-362 - Ruey-Lue Wang, Shih-Chih Chen, Hsiang-Chen Kuo, Chien-Hsuan Liu:
A 0.18-µm CMOS UWB Low Noise Amplifier for Full-Band (3.1-10.6GHz) Application. 363-366 - Ruey-Lue Wang, Yan-Kuin Su, Chien-Hsuan Liu:
3~5 GHz Cascoded UWB Power Amplifier. 367-369 - De-Mao Chen, Zhi-Ming Lin:
A Fully Integrated 3 to 5 GHz CMOS Mixer with Active Balun for UWB Receiver. 370-373 - Zhongjun Wang, Lee Guek Yeo, Wenzhen Li, Yanxin Yan, Yujing Ting, Masayuki Tomisawa:
A Novel FFT Processor for OFDM UWB Systems. 374-377 - Wu-Sheng Lu, Ana-Maria Sevcenco:
Design of Optimal Decimation and Interpolation Filters for Low Bit-Rate Image Coding. 378-381 - Zhiming Xu, Zhiping Lin, Anamitra Makur:
Multiple Description Image Coding With Hybrid Redundancy. 382-385 - Chao-Hui Huang, Chin-Teng Lin:
Image Enhancement Algorithm for Hexagonal Cellular Neural Networks. 386-389 - Takao Hinamoto, Yukihiro Shibata, Wu-Sheng Lu:
Minimization of L2-Sensitivity for 2-D Separable-Denominator State-Space Digital Filters Subject to L2-Scaling Constraints. 390-393 - I-Hung Khoo, Hari C. Reddy, P. Karivaratha Rajan:
Design of Delta Operator Based 2-D IIR Filters Using Symmetrical Decomposition. 394-397 - Ching-Lung Su, Wei-Sen Yang, Ya-Li Chen, Yao-Chang Yang, Ching-Wen Chen, Jiun-In Guo, Shau-Yin Tseng:
A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC. 398-401 - Bin Li, Kai-Kuang Ma:
Unequal-arm Adaptive Rood Pattern Search with Early Terminations For Fast Block-matching Motion Estimation on H.264. 402-405 - Seung-Kyun Oh, HyunWook Park:
Motion Vector Estimation and Adatptive Refinement for the MPEG-4 to H.264/AVC Video Transcoder. 406-409 - Anjali K. Mahajan, Sandhya Kondayya, Xiao Su:
Exploiting Reference Frame History in H.264/AVC Motion Estimation. 410-413 - Gwo-Long Li, Mei-Juan Chen:
Fast Motion Estimation Algorithm by Finite-State Side Match for H.264 Video Coding Standard. 414-417 - Himanshu Thapliyal, A. Prasad Vinod:
Transistor Realization of Reversible TSG Gate and Reversible Adder Architectures. 418-421 - Kavallur Gopi Smitha, Hossam A. H. Fahmy, A. Prasad Vinod:
Redundant Adders Consume Less Energy. 422-425 - Ruei-Jhe Tsai, Hsin-Wen Ting, Chi-Sheng Lin, Bin-Da Liu:
A CAM/WTA-Based High Speed and Low Power Longest Prefix Matching Circuit Design. 426-429 - Wang Pengjun, Yu Junjun, Xu Jian:
Design of Clocked Transmission Gate Adiabatic Logic Circuit Based on the 3ECEAC. 430-433 - Behnam Sedighi, Mehrdad Sharif Bakhtiar:
A New Class AB Current-Mode Circuit for Low-Voltage Applications. 434-437 - Anton Blad, Håkan Johansson, Per Löwenborg:
A General Formulation of Analog-to-Digital Converters Using Parallel Sigma-Delta Modulators and Modulation Sequences. 438-441 - Jiangling Guo, Sunanda Mitra, Tanja Karp, Brian Nutter:
A Resolution- and Rate- Scalable Image Subband Coding Scheme with Backward Coding of Wavelet Trees. 442-445 - Ya-Wen Wu, Yuan-Pei Lin, Chien-Chang Li, See-May Phoong:
Design of Time Domain Equalizers Incorporating Radio Frequency Interference Suppression. 446-449 - Ari Viholainen, Tero Ihalainen, Tobias Hidalgo Stitz, Yuan Yang, Markku Renfors:
Flexible Filter Bank Dimensioning for Multicarrier Modulation and Frequency Domain Equalization. 450-453 - Dah-Chung Chang, Da-Long Lee:
Prototype Filter Design for a Cosine-Modulated Filterbank Transmultiplexer. 454-457 - Basant K. Mohanty, Pramod Kumar Meher:
VLSI Architecture for High-Speed / Low-Power Implementation of Multilevel Lifting DWT. 458-461 - Basant K. Mohanty, Pramod Kumar Meher:
Merged-Cascaded Systolic Array for VLSI Implementation of Discrete Wavelet Transform. 462-465 - Fitri Arnia, Ikue Iizuka, Hiroyuki Kobayashi, Masaaki Fujiyoshi, Hitoshi Kiya:
DCT Sign Only Correlation and Its Application to Image Registration. 466-469 - Kamalesh Kumar Sharma, Shiv Dutt Joshi:
Image Registration using Fractional Fourier Transform. 470-473 - S. Raghunath, Syed Mahfuzul Aziz:
Design of an Area Efficient High-Speed Color FDWT Processor. 474-477 - Shou-Jung Chang, Wen-Yaw Chung, Chiung-Cheng Chuang:
System Design of Implantable Micro-stimulator for Medical Treatments. 478-481 - Wen-Yaw Chung, Chiung-Cheng Chuang, Ji-Ting Chen:
A Wide-Range and High PSRR CMOS Voltage Reference for Implantable Device. 482-485 - John Taylor, Delia Masanotti, Vipin Seetohul, Shiying Hao:
Some Recent Developments in the Design of Biopotential Amplifiers for ENG Recording Systems. 486-489 - Pak Kwong Chan, Grani Adiwena Hanasusanto, Hendrata B. Tan, Vincent Keng Sian Ong:
A Micropower CMOS Amplifier for Portable Surface EMG Recording. 490-493 - Louis-François Tanguay, Mohamad Sawan:
Low Power SAW-Based Oscillator for an Implantable Multisensor Microsystem. 494-497 - Xiao Liu, Andreas Demosthenous, Nick Donaldson:
A Miniaturized, Power-Efficent Stimulator Output Stage Based on the Bridge Rectifier Circuit. 498-501 - Gin Kooi Lim, Tee Hui Teo:
A Low-Power Low-Voltage Amplifier for Heart Rate Sensor. 502-505 - Harikrishnan Ramiah, Tun Zainal Azni Zulkifli:
Design of 3-4GHz Tunable Low Noise LC-QVCO for IEEE 802.11a WLAN Application. 506-509 - Chia-Chieh Tu, Ching-Yuan Yang:
A 6.5-GHz LC VCO with Integrated-Transformer Tuning. 510-513 - S.-L. Jang, Y.-H. Chuang, C.-C. Chen, S.-H. Lee, J.-F. Lee:
A CMOS Dual-Band Voltage Controlled Oscillator. 514-517 - Shao-Hua Lee, Yun-Hsueh Chuang, Li-Ren Chi, Sheng-Lyang Jang, Jian-Feng Lee:
A Low-Voltage 2.4GHz VCO with 3D Helical Inductors. 518-521 - Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy:
0.8 V GPS band CMOS VCO with 29% Tuning Range. 522-525 - S. M. Rezaul Hasan:
A Novel 16-bit CMOS Digitally Controlled Oscillator. 526-529 - Yao-Huang Kao, Yi-Bin Hsieh:
A Wide Input-Range Sigma Delta Modulator for Applications to Spread-Spectrum Clock Generator. 530-533 - Dan Cyca, Laurence E. Turner:
Bit-Serial Digital Filter Implementation using a Custom C Compiler. 534-537 - Mathieu Dubois, El Mostapha Aboulhamid, Frédéric Rousseau:
Towards an Efficient Simulation of Multi-Language Descriptions of Heterogeneous Systems. 538-541 - Arjuna Madanayake, Leonard T. Bruton:
FPGA Prototyping of Spatio-temporal 2D IIR Broadband Beam Plane-wave Filters. 542-545 - Thushara K. Gunaratne, Leonard T. Bruton:
Broadband Beamforming of Bandpass Plane Waves using 2D FIR Trapezoidal Filters at Baseband. 546-549 - Jun Wei Lee, Yong Ching Lim:
Efficient Implementation of the Fast Filter Bank For Critically Decimated Systems. 550-553 - Lihong Zhou, Wenjiang Pei, Pengcheng Xi, Zhenya He:
Optimized Design of Extrapolated Impulse Response FIR Filters with Raised-Cosine Windows. 558-561 - Yu-Chien Kao, Huang-Chih Kuo, Yin-Tzu Lin, Chia-Wen Hou, Yi-Hsien Li, Hao-Tin Huang, Youn-Long Lin:
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding. 562-565 - Guang-Huei Lin, Sao-Jie Chen, R. B. Lee, Yu Hen Hu:
Memory Access Optimization of Motion Estimation Algorithms on a Native SIMD PLX Processor. 566-569 - Sang-yong Yoon, Sanggyu Park, Soolk Chae:
Implementation of a H.264 decoder with Template-based Communication Refinement. 570-573 - Shen Li, Lingfeng Li, Takeshi Ikenaga, Shunichi Ishiwata, Masataka Matsui, Satoshi Goto:
Complexity Based Fast Coding Mode Decision for MPEG-2 / H.264 Video Transcoding. 574-577 - Ching-Lung Su, Wei-Sen Yang, Ya-Li Chen, Yao Li, Ching-Wen Chen, Jiun-In Guo, Shau-Yin Tseng:
Low Complexity High Quality Fractional Motion Estimation Algorithm and Architecture Design for H.264/AVC. 578-581 - Tsu-Ming Liu, Chen-Yi Lee:
An Improved Soft-Input CAVLC Decoder for Mobile Communication Applications. 582-585 - Min-Chi Tsai, Tian-Sheuan Chang:
High Performance Context Adaptive Variable Length Coding Encoder for MPEG-4 AVC/H.264 Video Coding. 586-589 - Palanichamy Manikandan, B. D. Liu, L. Y. Chiou, G. Sundar, Chittaranjan R. Mandal:
Asynchronous Design Methodology for an Efficient Implementation of Low power ALU. 590-593 - Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu, Chia-Jen Sheu:
Low Power Multiplier Designs Based on Improved Column Bypassing Schemes. 594-597 - Steve Hung-Lung Tu, Chih-Hung Yen:
A High-Speed Baugh-Wooley Multiplier Design Using Skew-Tolerant Domino Techniques. 598-601 - Ko-Chi Kuo, Chi-Wen Chou:
Low Power Multiplier with Bypassing and Tree Strucuture. 602-605 - Jun-Hong Chen, Ming-Der Shieh, Haw-Shiuan Wu, Wen-Ching Lin:
Asynchronous Design of Modular Multiplication Using Adaptive Radix Computation. 606-609 - Chiou-Yng Lee, Yu-Hsin Chiu, Che Wun Chiou:
New Bit-Parallel Systolic Multiplier over GF(2m) Using The Modified Booth's Algorithm. 610-613 - Chiou-Kou Tung, Shao-Hui Shieh, Yu-Cherng Hung, Ming-Chien Tsai:
High-Performance Low-Power Full-Swing Full Adder Cores with Output Driving Capability. 614-617 - Lian-Sheng Zhang:
Advances in Global Optimization: Novel Function Transformation Approaches. 618-621 - Zhi-You Wu, Musa Mammadov, Fu-Sheng Bai:
A Filled Function Method for Box-constrained System of Nonlinear Equations. 622-625 - Quanle Chen, Xiaoqiang Cai, Yanhong Gu:
An Optimization Problem on Two-Partition of Jobs for Profit Allocation. 626-629 - Zhiyou Wu, Yanhong Gu:
A Recursive Digital Filter Design using Global Optimization Technique. 630-633 - Shanliang Li, Chunhua Wang:
Linear Incentive Contract for Principal-agent Problem with Asymmetric Information and Moral Hazard. 634-637 - Xuewu Du:
Results on Exactness Properties of the HP-ALF for Inequality Constraints. 638-641 - Jun Wang, Mei Long, Duan Li:
A Total Unimodularity Based Branch-and-Bound Method for Integer Programming. 642-645 - Siew-Chong Tan, Yuk-Ming Lai:
Hybrid Dual-Operating-Mode PWM Based Sliding Mode Controllers for DC-DC Converters. 646-649 - Devarakonda Seshachalam, R. K. Tripathi, Dinesh Chandra:
Practical Implementation of Sliding Mode Control for Boost Converter. 650-653 - Cheng-Chung Yang, Chen-Yu Wang, Tai-Haur Kuo:
Current-Mode Converters with Adjustable-Slope Compensating Ramp. 654-657 - Miao Zhu, Fang Lin Luo:
Steady-State Performance Analysis of Cascade Boost Converters. 658-661 - Hou-Ming Chen, Ding-Da Jiang, Robert Chen-Hao Chang:
A Monolithic Boost Converter with an Adaptable Current-Limited PFM Scheme. 662-665 - Jen-Wei Yang, Po-Tsang Huang, Wei Hwang:
On-Chip DC-DC Converter with Frequency Detector for Dynamic Voltage Scaling Technology. 666-669 - Qianneng Zhou, Fengchang Lai, Mingyan Yu:
Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip. 670-673 - Noorul A. Samad, Tharshan Vaithianathan, Syed Mahfuzul Aziz, Christopher E. Brander:
Design of a Wireless Power Supply Receiver for Biomedical Applications. 674-677 - Morris Ming-Hui Chiu, Steve Hung-Lung Tu:
A Novel DPWM Based on Fully Table Look-Up for High-Frequency Power Conversion. 678-681 - Chua-Chin Wang, Chi-Chun Huang, Tzung-Je Lee, Cheng-Mu Wu, Gang-Neng Sung, Kuan-Wen Fang, Sheng-Lun Tseng, Jia-Jin Chen:
An Implantable SOC Chip for Micro-stimulating and Neural Signal Recording. 682-685 - S. M. Rezaul Hasan, Nazmul Ula:
A Novel Current Feed-back Sub-Nano-Siemen Transconductance Circuit Suitable for Large Time-Constant Bio-medical Applications. 686-689 - Chun-Lung Hsu, Mean-Hom Ho, Yu-Kuan Wu, Ting-Hsuan Chen:
Design of Low-Frequency Low-Pass Filters for Biomedical Applications. 690-695 - Chua-Chin Wang, Chi-Chun Huang, Jian-Sing Liou, Kuan-Wen Fang:
A 140-dB CMRR Low-noise Instrumentation Amplifier for Neural Signal Sensing. 696-699 - Adrianto Wirawan, Bertil Schmidt:
Parallel Discovery of Transcription Factor Binding Sites. 700-703 - José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi:
Low Power Bootstrapped CMOS Differential Cross Coupled Driver. 704-707 - Zhangcai Huang, Yasuaki Inoue, Hong Yu, Quan Zhang:
A Wide Dynamic Range Four-Quadrant CMOS Analog Multiplier Using Active Feedback. 708-711 - Cornelis Jan Kikkert:
Two Novel Phase-Frequency Detectors. 712-715 - Chenhui Jiang, Pietro Andreani, U. D. Keil:
Detailed Behavioral Modeling of Bang-Bang Phase Detectors. 716-719 - Wei Shu, Joseph Sylvester Chang, Tong Ge, Meng Tong Tan:
Fourier Series Analysis for Nonlinearities Due to the Power Supply Noise in Open-Loop Class D Amplifiers. 720-723 - Huey Chian Foong, Meng Tong Tan:
An Analysis of THD in Class D Amplifiers. 724-727 - Hai Chen, Xiaobo Wu, Xiaolang Yan:
A BiCMOS Low Voltage Low Distortion Class AB Amplifier. 728-731 - Sai Mohan Kilambi, Behrouz Nowrouzian:
A Genetic Algorithm Employing Correlative Roulette Selection for Optimization of FRM Digital Filters over CSD Multiplier Coefficient Space. 732-735 - Lihong Zhou, Wenjiang Pei, Pengcheng Xi, Zhenya He:
Frequency-Response Masking Approach for Design of Intermediate Frequency Filters in CDMA and Wideband GSM Modules. 736-739 - Yue-Dar Jou, Fu-Kun Chen:
On the Use of Lyapunov Functions for the Design of Complex FIR Digital Filters. 740-743 - Valentina I. Anzova, Juha Yli-Kaakinen, Tapio Saramäki:
An Algorithm for the Design of Multiplierless IIR Filters as a Parallel Connection of Two All-Pass Filters. 744-747 - Yuan Yang, Tobias Hidalgo Stitz, Mika Rinne, Markku Renfors:
Mitigation of Narrowband Interference in SC Transmission with Filter Bank Equalization. 748-751 - Zhiming Xu, Anamitra Makur:
Theory, Lattice Structure and Design of Unequal Length Linear Phase Perfect Reconstruction Filter Banks with More Flexible Length Profile. 752-755 - Jiajia Chen, Chip-Hong Chang, A. Prasad Vinod:
Design of High-speed, Low-power FIR Filters with Fine-grained Cost Metrics. 756-759 - Lingfeng Li, Yang Song, Takeshi Ikenaga, Satoshi Goto:
A CABAC Encoding Core with Dynamic Pipeline for H.264/AVC Main Profile. 760-763 - Ming-Shuan Lee, Jui-Chin Chu, Jiun-In Guo:
Predictive Mode Searching Policy for H.264/AVC Intra Prediction. 764-767 - Lejun Yu, Jintao Li, Yongdong Zhang:
Fast Picture and Macroblock Level Adaptive Frame/Field Coding for H.264. 768-771 - Zhenyu Wei, King Ngi Ngan:
A Fast Macroblock Mode Decision Algorithm for H.264. 772-775 - Chih-Peng Fan:
Cost-Effective Hardware Sharing Architectures of Fast 8×8 and 4×4 Integer Transforms for H.264/AVC. 776-779 - Khan Wahid, Vassil S. Dimitrov, Graham A. Jullien:
New Encoding of 8×8 DCT to make H.264 Lossless. 780-783 - Qing Wu, Shing-Chow Chan, Heung-Yeung Shum:
A Convex Optimization-Based Object-Level Rate Control Algorithm for MPEG-4 Video Object Coding. 784-787 - Dong Qing Wang, M. Toyonaga:
A Certain SA Solver TOSA for Global Placement. 788-791 - Liu Yang, Sheqin Dong, Xianlong Hong, Yuchun Ma:
A Two-stage Incremental Floorplanning Algorithm with Boundary Constraints. 792-795 - Sachin Shrivastava, Harindranath Parameswaran, Rajendra Pratap:
Design Partitioning for Reducing Crosstalk Analysis Time. 796-800 - Bakhtiar Affendi Rosdi, Atsushi Takahashi:
Replacement of Register with Delay Element for Reducing the Area of Pipelined Circuits. 801-804 - Ravi Arora, Sachin Shrivastava:
Area Recovery by Abutted Cell Placement: Can Fillers be Killers? An Eye-opening Viewpoint! 805-807 - Jing Li, Hiroshi Miyashita:
Post-placement Thermal Via Planning for 3D Integrated Circuit. 808-811 - Chia-Chun Tsai, Jan-Ou Wu, Yu-Ting Shieh, Chung-Chieh Kuo, Trong-Yen Lee:
Tapping Point Numerical-Based Search for Exact Zero-Skew RLC Clock Tree Construction. 812-815 - Hai Huyen Dam, Sven Nordholm, Kok Lay Teo:
Uniform DFT Filter Bank with Finite Precision Prototype Filters. 816-819 - Y. Zhu, Said F. Al-Sarawi, Cheng-Chew Lim, Michael J. Liebelt:
Fourth-Order Discrete-Time Variable Centre Frequency Bandpass Sigma-Delta Modulator. 820-823 - Hai Quang Dam, Sven Nordholm, Hai Huyen Dam, Siow Yong Low:
Post-Filtering Techniques For Directive Non-Stationary Source Combined With Stationary Noise Utilizing Spatial Spectral Processing. 824-827 - Zohra Yermeche, Nedelko Grbic, Ingvar Claesson:
Blind Subband Beamforming for Speech Enhancement of Multiple Speakers. 828-831 - Duc Son Pham, Yee Hong Leung, Kok Lay Teo, Abdelhak M. Zoubir:
An Optimisation Approach to Robust Estimation of Multicomponent Polynomial Phase Signals in Non-Gaussian Noise. 832-835 - Justin Xu, Cheng-Chew Lim:
Exploiting Concurrency in System-on-Chip Verification. 836-839 - M. H. Sargazi Moghadam, Amir Jafargholi, M. Emadi, Mohammad Mahdi Nayebi:
Bistatic Ambiguity Function and DOA Estimation for PCL Radar. 840-843 - Shih-Ming Chen, Tsorng-Juu Liang, Jiann-Fuh Chen:
Single DC/AC CCFL Inverter for Large Size LCD TV with Burst Control. 844-847 - Qi Wang, Xiaohu Chen, Yanchao Ji:
Fuzzy-based Active and Reactive Control for Brushless Doubly-fed Wind Power Generation System. 848-851 - N. Srisaen, A. Sangswang:
Effects of PV Grid-Connected System Location on a Distribution System. 852-855 - Zhongyuan Zhang, Shuguo Gao, Fangcheng Lü, Yunpeng Liu:
The Calculation of the Voltage Distribution in Transformer Windings under VFTO Based on FDTD Method. 856-859 - Zhongyuan Zhang, Fangcheng Lu, Yutong Chen:
A High Frequency Circuit Model for Current Transformer Based on the Scattering Parameter. 860-863 - Zhen Zhao, Jinian Bian, Zhipeng Liu, Yunfeng Wang, Kang Zhao:
High Level Synthesis with Multiple supply Voltages for Energy and Combined Peak Power Minimization. 864-867 - Shih-Hsu Huang, Chun-Hua Cheng, Chung-Hsin Chiang, Chia-Ming Chang:
Peak Power Minimization through Power Management Scheduling. 868-871 - David C. Ng, Takahashi Tokuda, Takuma Nakagawa, Hideki Tamura, Masahiro Nunoshita, Yasuyuki Ishikawa, Sadao Shiosaka, Jun Ohta:
Development of a CMOS Imaging Device for Functional Imaging Inside the Mouse Brain. 872-875 - S. M. Rezaul Hasan:
Stability and Compensation Technique for a CMOS Amperometric Potentiostat Circuit for Redox Sensors. 876-879 - Chua-Chin Wang, Chi-Chun Huang, Tzung-Je Lee, U. Fat Chio:
A Linear LDO Regulator with Modified NMCF Frequency Compensation Independent of Off-chip Capacitor and ESR. 880-883 - Muhammad Aurangzeb Khan, M. Khalid Khan, Mohammad A. U. Khan, Sungyoung Lee:
Endothelial Cell Image Enhancement using Decimation-Free Directional Filter Banks. 884-887 - Eva Gescheidtova, Radek Kubasek, Karel Bartusek:
Testing the Quality of Magnetic Gradient Fields for Studying Self-Diffusion Processes in Biological Specimens by Magnetic Resonance Methods. 888-891 - Teerasilapa Dumawipata, Worapong Tangsrirat, Wanlop Surakampontorn:
Current-mode Universal Filter with Four Inputs and One Output using CDTAs. 892-895 - Pipat Prommee, Montree Kumngern, Kobchai Dejhan:
Current-mode Active-only Universal Filter. 896-899 - Pipat Prommee, Montri Somdunyakanok, Kobchai Dejhan:
Independent Tunable-Q Current-mode OTA-C Universal Filter. 900-903 - Masood ul-Hasan, Yichuang Sun:
Oscillation-based Test Method for Continuous-time OTA-C Filters. 904-907 - Roman Kaszynski, Jacek Piskorowski:
Synthesis of Delay Equalized Time-Varying Butterworth Filters. 908-911 - Ljiljana D. Milic, Tapio Saramäki, Robert Bregovic:
Multirate Filters: An Overview. 912-915 - Gordana Jovanovic-Dolecek, Sanjit K. Mitra:
Stepped Triangular CIC Filter for Rational Sample Rate Conversion. 916-919 - Tapio Saramäki, Juha Yli-Kaakinen:
A Novel Systematic Approach for Synthesizing Multiplication-Free Highly-Selective FIR Half-Band Decimators and Interpolators. 920-923 - Oscar Gustafsson, Kenny Johansson, Håkan Johansson, Lars Wanhammar:
Implementation of Polyphase Decomposed FIR Filters for Interpolation and Decimation Using Multiple Constant Multiplication Techniques. 924-927 - Luiz C. R. de Barcellos, Paulo S. R. Diniz, Sergio L. Netto:
On the Design of Cosine-Modulated Filter Banks Using Recurrent Frequency-Response Masking. 928-931 - Marjan Sedighi Anaraki, Kaoru Hirota, Hajime Nobuhara:
The Dyadic Curvelet Transform for Multiscale Topological Complex Networks. 932-935 - Wei-Kai Chan, Shao-Yi Chien:
Subword Parallel Architecture for Connected Component Labeling and Morphological Operations. 936-939 - Jing Tian, Kai-Kuang Ma:
Markov Chain Monte Carlo Super-resolution Image Reconstruction With Artifacts Suppression. 940-943 - Takashi Morimoto, Hidekazu Adachi, Kousuke Yamaoka, Kazutoshi Awane, Tetsushi Koide, Hans Jürgen Mattausch:
An FPGA-Based Region-Growing Video Segmentation System with Boundary-Scan-Only LSI Architecture. 944-947 - Kaliappan Gopalan:
A One-Dimensional Technique for Embedding Data in A JPEG Color Image. 948-951 - Changbo Long, Jinjun Xiong, Yongpan Liu:
Techniques of Power-gating to Kill Sub-Threshold Leakage. 952-955 - Hong Luo, Huazhong Yang, Rong Luo:
Accurate and Fast Estimation of Junction Band-to-Band Leakage in Nanometer-Scale MOSFET. 956-959 - Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, Narayanan Vijaykrishnan, Rong Luo:
Leakage Optimized DECAP Design for FPGAs. 960-963 - Yu Wang, Hui Wang, Huazhong Yang:
Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate. 964-967 - Yongpan Liu, Yu Wang, Feng Zhang, Rong Luo, Hui Wang:
A New Thermal-Conscious System-Level Methodology for Energy-Efficient Processor Voltage Selection. 968-971 - Guilherme Pinto, Paulo S. R. Diniz, Are Hjørungnes:
Jointly Optimized Modulated-Transmitter and Receiver FIR MIMO Filters. 972-975 - Dirk S. Waldhauser, Leonardo Gomes Baltar, Josef A. Nossek:
Comparison of Filter Bank Based Multicarrier Systems with OFDM. 976-979 - Byung Moo Lee, Rui J. P. de Figueiredo:
Nonlinear and Decision-Oriented Signal Processing for OFDM-Based Wireless Communications. 980-983 - Chih-Cheng Fu, To-Ping Wang, Kang-Chuan Chang, Chun-Hao Liao, Tzi-Dar Chiueh:
A Real-Time Digital Baseband Channel Emulation System for OFDM Communications. 984-987 - Hao Zhou, Amaresh V. Malipatil, Yih-Fang Huang:
Synchronization Issues in OFDM Systems. 988-991 - Akitoshi Itai, Hiroshi Yasukawa:
Footstep Recognition with Psyco-acoustics Parameter. 992-995 - Jie Yang, Xiaoxia Xu:
A Robust Anti-collusion Coding in Digital Fingerprinting System. 996-999 - W. Jirattitichareon, Thanarat H. Chalidabhongse:
Automatic Detection and Segmentation of Text in Low Quality Thai Sign Images. 1000-1003 - Anders M. Johansson, Eric A. Lehmann, Sven Nordholm:
Real-Time Implementation of a Particle Filter with Integrated Voice Activity Detector for Acoustic Speaker Tracking. 1004-1007 - (Withdrawn) Early Detection on the Condition of Pancreas Organ as the Cause of Diabetes Mellitus by Real Time Iris Image Processing. 1008-1010
- Toshinori Yamada, Kazuhiro Karasawa:
On Finding a Solution in the Core of a Multicommodity Flow Game on a Spider. 1011-1014 - Keiji Kida, Takehiko Matsuo, Tetsuya Tashiro, Shigetoshi Nakatake:
Sequence-Pair Based Compaction under Equi-Length Constraint. 1015-1018 - Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura:
Realizability of Score Sequence Pair of an (r1l, r12, r22)-Tournament. 1019-1022 - Aijiao Cui, Chip-Hong Chang:
Kernel Extraction for Watermarking Combinational Logic Networks. 1023-1026 - Guangzhao Cui, Xianghong Cao, Yanfeng Wang, Lingzhi Cao, Bu-Yi Huang, Cunxiang Yang:
Wavelet Packet Decomposition-Based Fuzzy Clustering Algorithm for Gene Expression Data. 1027-1030 - Dingkun Du, Yongming Li, Zhihua Wang, Seeteck Tan:
An Active-RC Complex Filter with Mixed Signal Tuning System for Low-IF Receiver. 1031-1034 - Yi-Ran Sun, Svante Signell:
Generalized Bandpass Sampling with Complex FIR Filtering. 1035-1038 - Miao Li, Tad A. Kwasniewski, Shoujun Wang:
A 0.18µm CMOS Receiver with Decision-feedback Equalization for Backplane Applications. 1039-1042 - Chia-Yu Yao, Chun-Te Hsu, Chin-Chih Yeh:
The Analysis of Phase-jitter Variance in the Third-order CPPLL Frequency Synthesizer. 1043-1046 - Rafiahamed Shaik, Mrityunjoy Chakraborty:
An Efficient Realization of the Decision Feedback Equalizer using Block Floating Point Arithmetic. 1047-1050 - Ljiljana D. Milic, Sanja Damjanovic, Marko Nikolic:
Frequency Transformations of IIR Filters with Filter Bank Applications. 1051-1054 - Håkan Johansson, Oscar Gustafsson, J. Johansson, Lars Wanhammar:
Adjustable Fractional-Delay FIR Filters Using the Farrow Structure and Multirate Techniques. 1055-1058 - Heinz G. Göckler, Alexandra Groth, Mohammed N. Abdulazim:
Parallelisation of Digital Signal Processing in Uniform and Reconfigurable Filter Banks for Satellite Communications. 1059-1062 - Alfonso Fernández-Vázquez, Gordana Jovanovic-Dolecek:
Design of Real and Complex Linear-Phase IIR Modified QMF Banks. 1063-1066 - Kaset Sirisantisamrid, Takenobu Matsuura, Kitti Tirasesth:
A Determination Method for Initial Values of Coplanar Camera Calibration Parameters. 1067-1070 - Seonyoung Lee, Kyeongsoon Cho:
Implementation of an AMBA-Compliant IP for H.264 Transform and Quantization. 1071-1074 - Sung Dae Kim, Choong Jin Hyun, Myung Hoon Sunwoo:
VSIP : Implementation of Video Specific Instruction-set Processor. 1075-1078 - Kisub Lee, Hyoungjoon Kim, Byoungjo Choi, Joonghwee Cho:
An Implementation of H.264 Intra Predictor Based on Sub-sampling. 1079-1082 - Moonvin Song, Yunmo Chung:
SoC Design of Speaker Connection System by Efficient Cosimulation. 1083-1086 - Byung-Joo Hong, Koon-Shik Cho, Seung-Hyun Kang, Suk-Yoon Lee, Jun Dong Cho:
On the Configurable Multiprocessor SoC Platform with Crossbar Switch. 1087-1090 - Xianlong Hong, Yici Cai, Hailong Yao, Duo Li:
DFM-aware Routing for Yield Enhancement. 1091-1094 - Hengliang Zhu, Xuan Zeng, Wei Cai, Dian Zhou:
A Spectral Stochastic Collocation Method for Capacitance Extraction of Interconnects with Process Variations. 1095-1098 - Charles C. Chiang, Jamil Kawa:
Three DFM Challenges: Random Defects, Thickness Variation, and Printability Variation. 1099-1102 - Vijay Pitchumani:
A Hitchhiker's Guide to the DFM Universe. 1103-1106 - Pervez Khaled, Masud H. Chowdhury:
Prospects and Challenges of Handling Power Bus Modeling and Supply Noise in Package-Chip C0-design Approach. 1107-1111 - Chua-Chin Wang, Gang-Neng Sung, Ming-Kai Chang, Ching-Li Lee, Cheng-Mu Wu, Ju-Ya Chen:
A Low-power 4-T SAM Design for OFDM Demodulators in DVB Receiversers. 1112-1115 - Xizhong Lou, Yanmin Chen:
Pipelined Parallel Architectures for High Throughput Turbo Decoding. 1116-1119 - Korrai Deergha Rao:
Linear Adaptive Blind Equalizers of Non Linear SIMO FIR Channels. 1120-1123 - Liang-Bi Chen, Ing-Jer Huang, Yuan-Long Jeang:
Design of a Dynamic PCM Selector for Non-deterministic Environment. 1124-1127 - Kai-Chuan Chang, Gerald E. Sobelman:
FPGA-Based Design of a Pulsed-OFDM System. 1128-1131 - Chia-Hsiung Chen, Sao-Jie Chen, Pei-Yung Hsiao:
Edge Detection on the Bayer Pattern. 1132-1135 - T. H. Chalidabhongs, P. Rattanathammawat:
License Plate Localization of Moving Vehicles in Complex Scene. 1136-1139 - Zhang Qingnian, Zhou Zhizhong, Yin Daquan, Yang Jie:
Study of Real-Time Detecting System for Driver's Safety. 1140-1143 - Shisong Zhu, Toshio Koga:
Feature Point Tracking for Car Speed Measurement. 1144-1147 - Anan Liu:
Video Vehicle Detection Algorithm based on Virtual-Line Group. 1148-1151 - Wu Jigang, Thambipillai Srikanthan, Xiaodong Wang:
New Reconfiguration Algorithm for Degradable VLSI Arrays. 1152-1155 - Xiaoyong Chen, Douglas L. Maskell, Yang Sun:
Automatic Identification of Custom Functions for Embedded Processors with MIMO Extensions. 1156-1159 - Kang Zhao, Jinian Bian:
A Clustering ILP Model for Fast Instruction Selection in Embedded Applicated Specific Processor Design. 1160-1163 - Minoru Watanabe, Fuminori Kobayashi:
Optically Reconfigurable Gate Arrays vs. ASICs. 1164-1167 - Shibu Menon, Chip-Hong Chang:
A Reconfigurable Multi-Modulus Modulo Multiplier. 1168-1171 - Muhammad Taher Abuelma'atti, Abdullah Shwehneh:
A Reconfigurable Satlin/Sigmoid/Gaussian/Triangular Basis Functions Computation Circuit. 1172-1175 - Luo Jianwen, Jong Ching Chuen:
Matrix Inversion on Reconfigurable Hardware using Binary-coded z-path CORDIC. 1176-1179 - Korrai Deergha Rao, T. Anil Kumar:
A New Choice of Influence Function for Robust Multiuser Detection in Non-Gaussian Channels. 1180-1183 - Dan Wang, Aiqun Hu:
A Combined Residual Frequency and Sampling Clock Offset Estimation for OFDM Systems. 1184-1187 - Kannan Govindan, Mohit Garg, S. N. Merchant, Uday B. Desai:
MPOE Based Prefiltering and MRT Beamforming for DS-CDMA Systems. 1188-1191 - Yongmei Wei, Guoan Bi:
Interference Suppression in DS-SS Systems with Modified Discrete Fourier Transform. 1192-1195 - Jun Seok Yang, Yongsup Kim, A. S. Kim:
Even-order Distortion Rejection Technique for Self-homodyne OFDM Systems. 1196-1199 - Kuang-Hao Lin, Hsin-Lei Lin, Robert Chen-Hao Chang, Ching-Fen Wu:
Hardware Architecture of Improved Tomlinson-Harashima Precoding for Downlink MC-CDMA. 1200-1203 - Hung Dau Hsieh, Wen Rong Wu:
Maximum Likelihood Timing and Carrier Frequency Offset Estimation for OFDM systems with Periodic Preambles. 1204-1207 - R. Punchalard, Jeerasuda Koseeyaporn, Paramote Wardkein:
Inverse Tangent Based Adaptive IIR Notch Filter. 1208-1211 - Ze Tao, Svante Signell:
Multi-Standard Delta-Sigma Decimation Filter Design. 1212-1215 - Shunsuke Yamaki, Masahide Abe, Masayuki Kawamata:
A Closed Form Solution to L2-Sensitivity Minimization of Second-Order Digital Filters Subject to L2-Scaling Constraints. 1216-1219 - Shunsuke Koshita, Masahide Abe, Masayuki Kawamata:
Gramian-Preserving Frequency Transformation for State-Space Digital Filters. 1220-1223 - Arjuna Madanayake, Leonard T. Bruton:
Fully-multiplexed First-order 3D IIR Frequency-Planar Filter Module. 1224-1227 - Christian S. Gargour, Venkat Ramachandran, Ravi Prakash Ramachandran:
On the Properties And Design of Stable IIR Transfer Functions Generated Using Fibonnaci Numbers. 1228-1231 - Fumio Itami, Eiji Watanabe, Akinori Nishihara:
Multirate Filter Bank-based Conversion of Image Resolution. 1232-1235 - Yang Song, Takeshi Ikenaga, Satoshi Goto, Zhenyu Liu:
Enhanced Partial Distortion Sorting Fast Motion Estimation Algorithm for Low-Power Applications. 1236-1239 - Ya-Nan Wen, Guan-Lin Wu, Sao-Jie Chen, Yu Hen Hu:
Multiple-Symbol Parallel CAVLC Decoder for H.264/AVC. 1240-1243 - Tzu-Yun Kuo, Yu-Kun Lin, Tian-Sheuan Chang:
A Memory Bandwidth Optimized Interpolator for Motion Compensation in the H.264 Video Decoding. 1244-1247 - Chia-Chun Lin, Yu-Kun Lin, Tian-Sheuan Chang:
A Fast Algorithm and Its Architecture for Motion Estimation in MPEG-4 AVC/H.264 Video Coding. 1248-1251 - Chao-Cing Yang, Gwo-Long Li, Mei-Juan Chen:
Priority-Based Normalized Partial Distortion Search Algorithm for Fast Motion Estimation. 1252-1255 - Meng-Chun Lin, Lan-Rong Dung, Hsuan-Po Lin:
A Subsample-based Motion Estimation for Quality-Stationary Video Coding. 1256-1259 - Yi-Chih Chao, Ji-Kun Lin, Jar-Ferr Yang, Bin-Da Liu:
A High Throughput and Data Reuse Architecture for H.264/AVC Deblocking Filter. 1260-1263 - W. H. Muthumala, Masanori Hariyama, Michitaka Kameyama:
GA-Based Assignment of Supply and Threshold Voltages and Interconnection Simplification for Low Power VLSI Design. 1264-1267 - Ming-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng:
The Multiple Point Global Lanczos Method for MIMO Interconnect Model-Order Reductions. 1268-1271 - Fakhrul Zaman Rokhani, Gerald E. Sobelman:
Low-Power Bus Transform Coding for Multilevel Signals. 1272-1275 - Jin-Tai Yan, Bo-Yi Chiang, Shi-Qin Huang:
Width and Timing-Constrained Wire Sizing for Critical Area Minimization. 1276-1279 - Dharin Shah, Kothamasu Siva, G. Girishankar, N. S. Nagaraj:
Optimizing Interconnect for Performance in Standard Cell Library. 1280-1284 - Chia-Chun Tsai, Jan-Ou Wu, Trong-Yen Lee, Rong-Shue Hsiao:
Propagation Delay Minimization on RLC-Based Bus with Repeater Insertion. 1285-1288 - Jin-Tai Yan, Zhi-Wei Chen, Chia-Wei Wu, Ming-Yuen Wu:
Optimal Network Analysis in Hierarchical Power Quad-Grids. 1289-1292 - Jianwei Zhang, Yizheng Ye, Bin-Da Liu:
A Low-Power Technique Based on Charge Injection and Current-Saving Methods for Match-Line Sensing in Content-Addressable Memories. 1293-1296 - Koh Johguchi, Zhaomin Zhu, Hans Jürgen Mattausch, Tetsushi Koide, Tetsuo Hironaka, Kazuya Tanigawa:
Unified Data/Instruction Cache with Hierarchical Multi-Port Architecture and Hidden Precharge Pipeline. 1297-1300 - Po-Tsang Huang, Wei-Keng Chang, Wei Hwang:
Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory. 1301-1304 - H. Kondou, Sumio Fukai, Yohei Ishikawa:
Multiple-valued SRAM with FG-MOSFETs. 1305-1308 - Md. Anwarul Abedin, Yuki Tanaka, Ali Ahmadi, Tetsushi Koide, Hans Jürgen Mattausch:
Fully Parallel Associative Memory Architecture with Mixed Digital-Analog Match Circuit for Nearest Euclidean Distance Search. 1309-1312 - Shen-Fu Hsiao, Sze-Yun Lin, Tze-Chong Cheng, Ming-Yu Tsai:
An Automatic Cache Generator Based on Content-Addressable Memory. 1313-1316 - Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto:
Memory-Efficient Accelerating Schedule for LDPC Decoder. 1317-1320 - Soontorn Chantanetra, Manas Sangworasil, Pattarapong Phasukkit:
WLAN Location Determination Systems. 1321-1324 - Dong-Shong Liang, Cheng-Chi Tai, Kwang-Jow Gan, Cher-Shiung Tsai, Yaw-Hwang Chen:
Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process. 1325-1328 - Po-Hao Chang, Jia-Ming Chen, Chao-Ying Shen:
On an Efficient Closed Form Expression to Estimate the Crosstalk Noise in the Circuit with Multiple Wires. 1329-1332 - Rongde Lu, An Lu:
Applications of the Superposition Theorem to Nonlinear Resistive Circuits. 1333-1336 - Josef Dobes:
New Criteria Enhancing Robustness and Efficiency of Solving Systems of Circuit Equations. 1337-1341 - Ulrich L. Rohde, Ajay K. Poddar:
Phase Hits Insensitive CSRO. 1342-1345 - Donghai Li, Guang-Sheng Ma, Gang Feng:
Design of Interconnected Bus for Low Power Based on Boolean Process. 1346-1349 - Changming Ma, Chun Zhang, Zhihua Wang:
Power Analysis for the MOS AC/DC Rectifier of Passive RFID Transponders. 1350-1353 - P. Sritakaew, A. Sangswang:
Reliability Improvement of a Distribution System Using PV Grid Connected System with Tie Switch. 1354-1357 - Cuong Vu The, Khanh La Minh, Tuan Quoc Tran, Nguyen Boi Khue, Lam Du Son:
FACTS Devices Applications on Power System to Improve the Angle Stability. 1358-1363 - Miao Zhu, Fang Lin Luo:
Generalized Steady-State Analysis on Developed Series of Cascade Boost Converters. 1364-1367 - Weiwei Chen, Guoyong Shi:
Implementation of a Symbolic Circuit Simulator for Topological Network Analysis. 1368-1372 - Dang Toan Nguyen, Didier Georges:
Controllability Gramian for Optimal Placement of Power System Stabilizers in Power Systems. 1373-1378 - Danyan Zhang, Xiaobo Wu, Menglian Zhao, Hai Chen, Xiaolang Yan:
Load Share Controller IC and Its Control Strategy Design. 1379-1382 - Fatemeh Aezinia, S. Najafzadeh, Ali Afzali-Kusha:
Novel High Speed and Low Power Single and Double Edge-Triggered Flip-Flops. 1383-1386 - Zhanfeng Zhao, Zhiquan Zhou, Haiyan Yu, Xiaolin Qiao:
New Methods for QDDFS with Millions' Compression Ratio. 1387-1390 - Ming-Haw Jing, Jyun-Min Wang, Zih-Heng Chen, Yan-Haw Chen:
The Inverse Matrix for the Conversion Between Standard and Normal Bases. 1391-1393 - M. Emadi, Amir Jafargholi, M. H. Sargazi Moghadam, Mohammad Mahdi Nayebi:
Optimum Supply and Threshold Voltages and Transistor Sizing Effects on Low Power SOI Circuit Design. 1394-1398 - Jiann-Chyi Rau, Chien-Shiun Chen, Po-Han Wu:
Design of Dynamically Assignmentable TAM Width for Testing Core-Based SOCs. 1399-1402 - Fatemeh Aezinia, Behjat Forouzandeh:
A Novel Low Power NOR gate in SOI CMOS Technology. 1403-1405 - Koji Hashimoto, Vasily G. Moshnyaga, Kazuaki J. Murakami:
Circuit Area-latency Optimization Technique for High-precision Elementary Functions. 1406-1409 - Jung-Lin Yang, Hsu-Ching Tien, Chia-Ming Hsu, Sung-Min Lin:
High-Level Synthesis for Self-Timed Systems. 1410-1413 - Cicilia C. Lozano, Bogdan J. Falkowski:
Generation of Fixed Polarity Arithmetic Spectra for Ternary Functions. 1414-1417 - Yu-Jung Huang, Yang-Shih Lin, Kuang-Yu Hung, Kuo-Chen Lin:
Efficient Implementation of AES IP. 1418-1421 - Abinash Roy, Masud H. Chowdhury:
Impacts of Inductance on the Figures of Merit to Optimize Global Interconnect. 1422-1425 - Geetanjali Kshirsagar, Masud H. Chowdhury:
Optical Interconnect Technology; Photons Based Signal Communication. 1426-1429 - Nima Honarmand, Ali Afzali-Kusha:
Low Power Combinational Multipliers using Data-driven Signal Gating. 1430-1433 - Saurabh Chaudhury, Santanu Chattopadhyay, J. Srinivasa Rao:
Synthesis of Finite State Machines for Low Power and Testability. 1434-1437 - Mahdi Nazm Bojnordi, Naser Sedaghati-Mokhtari, Omid Fatemi, Mahmoud Reza Hashemi:
An Efficient Self-Transposing Memory Structure for 32-bit Video Processors. 1438-1441 - A. K. Mrunal, M. A. Shirasgaonkar, Rajendra M. Patrikar:
Highly Linear and Efficient AlGaAs/GaAs HBT Power Amplifier with Integrated Linearizer. 1442-1445 - Jin-Hua Hong, Bin-Yan Tsai:
A Fast Bit-Interleaving RSA Cryptosystem Based on Radix-4 Cellular-Array Modular Multiplier. 1446-1449 - Ro-Min Weng, Jing-Chyi Wang, Hung-Che Wei:
A 1V 2.4GHz Down Conversion Folded Mixer. 1450-1452 - Ting-Sheng Jau, Wei-Bin Yang, Chung-Yu Chang:
Analysis and Design of High Performance, Low Power Multiple Ports Register Files. 1453-1456 - Jingbo Yang:
Modeling a Digital Hearing Instrument for Developing and Evaluating Adaptive Feedback Cancellation Algorithms. 1457-1460 - Ma Fan Yung:
On-Chip Supply Voltage Measurement Technique. 1461-1464 - Shan Gao, Junning Chen, Daoming Ke, Xiulong Wu:
A Compact Equivalent Circuit Model of HVLDMOS and Application in HIVC Design. 1465-1468 - Fangcheng Lu, Zhongyuan Zhang, Bin Huang, Jianxing Zhang:
The Setup of Artifical Neural Network Model for Estimating the Insulator Pollution Degree. 1469-1472 - Ro-Min Weng, Xie-Ren Hsu:
Low-Power Exponential V-I Converter Using Composite PMOS Transistors. 1473-1475 - Kwang-Jow Gan, Dong-Shong Liang, Cher-Shiung Tsai, Yaw-Hwang Chen, Chun-Ming Wen:
Five-State Logic Using MOS-HBT-NDR Circuit by Standard SiGe BiCMOS Process. 1476-1479 - Takashi Hirayama, Masatoshi Takahashi, Yasuaki Nishitani:
Simplification of Exclusive-or Sum-of-Products Expressions Through Function Transformation. 1480-1483 - Yasuhiro Takahashi, Youhei Fukuta, Toshikazu Sekine, Michio Yokoyama:
2PADCL: Two Phase drive Adiabatic Dynamic CMOS Logic. 1484-1487 - A. K. Mrunal, M. A. Shirasgaonkar, Rajendra M. Patrikar:
Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits (SALFL). 1488-1491 - Ming-Haw Jing, Jian-Hong Chen, Zih-Heng Chen, Yan-Haw Chen:
Low Complexity Architecture for Multiplicative Inversion in GF(2m). 1492-1495 - Jian Wang, Anping Jiang:
An Area-Efficient Design for Modular Inversion in GF(2m). 1496-1499 - Yuehua Dai, Yuan Hu, Qi Liu, Daoming Ke, Junning Chen:
Physics-based Modeling and Simulation of Dual Material Gate(DMG) LDMOS. 1500-1503 - Gopal Paul, Sambhu Nath Pradhan, Ajit Pal, Bhargab B. Bhattacharya:
Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic. 1504-1507 - Saif Khan Mohammed, Naveen K. Yanduru:
Analysis and Measurement of Cross Modulation Distortion in WCDMA Receivers. 1508-1511 - M. Nabipoor, S. A. Khodaian, Naser Sedaghati-Mokhtari, Sied Mehdi Fakhraie, Seyed Hamaidreza Jamali:
A High-Speed Low-Complexity VLSI SISO Architecture. 1512-1515 - Abdulrahman Al-Humaidan, Saleh R. Al-Araji, Mahmoud Al-Qutayri:
Frequency Synthesizer for Wireless Applications using TDTL. 1516-1519 - Qassim Nasir:
Adaptive ZCDPLL for Quadrature-Quadrature PSK Carrier Recovery. 1520-1522 - Dah-Chung Chang, Tsung-Hau Shiu:
Digital GFSK Carrier Synchronization. 1523-1526 - Z. Pajouhi, Seid Mehdi Fakhraie:
A Novel Neural Network GA-Optimized Controller for QoS Support in Wireless MACs. 1527-1530 - Kok Ann Donny Teo, Shuichi Ohno:
Performance Analysis of Successive Interference Cancellation in Multiuser CDMA over Flat Channels. 1531-1534 - Pramod Kumar Meher, A. Prasad Vinod, Jagdish Chandra Patra, M. N. S. Swamy:
Reduced-Complexity Concurrent Systolic Implementation of the Discrete Sine Transform. 1535-1538 - Tso-Bing Juang:
Area/Delay Efficient Recoding Methods for Parallel CORDIC Rotations. 1539-1542 - David Fitrio, Aleksandar Stojcevski, Jugdutt Singh:
Ultra Low Power Weak Inversion Current Steered Digital to Analog Converter. 1543-1546 - A. Prasad Vinod, Chip-Hong Chang, Pramod Kumar Meher, Ankita Singla:
Low Power FIR Filter Realization using Minimal Difference Coefficients: Part I - Complexity Analysis. 1547-1550 - A. Prasad Vinod, Chip-Hong Chang, Pramod Kumar Meher, Ankita Singla:
Low Power FIR Filter Realization Using Minimal Difference Coefficients: Part II - Algorithm. 1551-1554 - Uwe Meyer-Bäse, Jiajia Chen, Chip-Hong Chang, Andrew G. Dempster:
A Comparison of Pipelined RAG-n and DA FPGA-based Multiplierless Filters. 1555-1558 - Ming Z. Zhang, Vijayan K. Asari:
A Fully Pipelined Multiplierless Architecture for 2D Convolution with Quadrant Symmetric Kernels. 1559-1562 - Zhibin Pan, Tadahiro Ohmi, Koji Kotani:
Constructing Better Partial Sums Based on Energy-Maximum Criterion for Fast Encoding of VQ. 1563-1566 - Shao-Ming Sun, Tsu-Ming Liu, Chen-Yi Lee:
A Self-Grouping and Table-Merging Algorithm for VLC-Based Video Decoding System. 1567-1570 - T. Fuangrod, A. Khawne:
A Quick Scene Search with Constructed Mapped Charts for TV Sport Programs. 1571-1574 - C. J. Duanmu:
Accelearation of Full-Search Algorithm on SIMD Architectures by Using Eight-Bit Partial Sums of Four Luminance Values. 1575-1578 - C. J. Duanmu:
A Fast Hexagon-Based Search Algorithm on SIMD Architectures. 1579-1582 - Zhen Qiu, Takeshi Ikenaga, Satoshi Goto:
Robust Scalable Video Transmission using Object-Oriented Unequal Loss Protection over Internet. 1583-1586 - Chung-Chi Lin, Ming-Hwa Sheu, Huann-Keng Chiang, Chih-Jen Wei:
The VLSI Design of Motion Adaptive De-interlacing with Horizontal and Vertical Motions Detection. 1587-1590 - Zhiyuan Li, Mingyan Yu, Jianguo Ma:
A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier. 1591-1594 - Akira Yamazaki, Kouhei Yamada, Satoshi Sugahara:
A Frequency Compensation Technique for Variable Output Low Dropout Regulators. 1595-1598 - Kshitij Yadav, Pradip Mandal:
Design and Analysis of a VHF OTA-C Cell for Optimum Phase Response. 1599-1602 - Vivek Nigam, Masud H. Chowdhury, Roland Priemer:
Separation of Individual Noise Sources from Compound Noise Measurements in Digital Circuits. 1603-1606 - Ming-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng:
Model-Order Reduction Algorithm with Structure Preserving Techniques. 1607-1610 - Qingli Zhang, Jinxiang Wang, Yizheng Ye:
Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses. 1611-1614 - Guishu Liang, Huaying Dong, Yong Wang, Zhongyuan Zhang, Fangcheng Lu:
Sensitivity Analysis of Uniform and Nonuniform Transmission Lines. 1615-1618 - Shih-Hsu Huang, Chun-Hua Cheng:
Operation Scheduling for False Loop Free Circuits. 1619-1622 - Cicilia C. Lozano, Bogdan J. Falkowski:
Fixed Polarity Arithmetic Expansions Calculation from Disjoint Cubes Representation of Ternary Functions. 1623-1626 - Bogdan J. Falkowski, Cicilia C. Lozano, Susanto Rahardja:
Disjoint Cubes Generation Algorithm for Multiple-Valued Functions. 1627-1630 - Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen:
Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits. 1631-1634 - Qiang Zhou, Yi Zou, Yici Cai, Xianlong Hong:
Variational Circuit Simulator based on a Unified Methodology using Arithmetic over Taylor Polynomials. 1635-1638 - Baishan Zhao, Yi-Sheng Zhu:
A Method for the Correction of N-Ports Scattering Parameters Measurement. 1639-1642 - Meng Yang, Lingli Wang, A. E. A. Almaini:
Fast Conversion for Large Canonical OR-Coincidence Functions. 1643-1646 - Wasu Phanphaisarn, Sukkharak Saechia:
A Simple Synthesis Technique of PWM Signal. 1647-1650 - Wen-Chung Kao, Shou-Hung Chen, Pei-Yung Hsiao:
Real-Time Image Stabilization for Digital Video Cameras. 1651-1654 - Yi Wang, Douglas L. Maskell, Jussipekka Leiwo, Thambipillai Srikanthan:
Unified Signed-Digit Number Adder for RSA and ECC Public-key Cryptosystems. 1655-1658 - Yi Wang, Jussipekka Leiwo, Thambipillai Srikanthan, Luo Jianwen:
An Efficient Algorithm for DPA-resistent RSA. 1659-1662 - F. J. Antunes, Tales Cleber Pimenta, Robson L. Moreno:
A 1.6GHz Downconverter Mixer in 0.25µm CMOS. 1663-1666 - Yuhua Cheng, Xiaobo Wu, Xiaolang Yan:
Translinear Loop Principle and Identification of the Translinear Loops. 1667-1670 - Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Juan Francisco Fernández-Bootello, Davide Brandano, Rafael Castro-López, José M. de la Rosa:
A 12-bit CMOS Current Steering D/A Converter for Embedded Systems. 1671-1674 - Jin Sha, Minglun Gao, Zhongjin Zhang, Li Li, Zhongfeng Wang:
An FPGA Implementation of Array LDPC Decoder. 1675-1678 - Ler Chun Lee, Abu Khari bin A'Ain, Albert Victor Kordesch:
A 2.4-GHz CMOS Tunable Image-Rejection Low-Noise Amplifier with Active Inductor. 1679-1682 - Yang Jie, Zhou Changzheng, Zhang Qingnian, Zhou Zhizhong:
A Real-time Boat Surveillance System Using GPRS. 1683-1686 - Tsui-Tsai Lin:
Non-Data Aided SBIB Receiver. 1687-1690 - Xiaolong Yuan, S. Signed, Xiaobo Wu:
Single Amplifier Sigma Delta Modulator With Input Feedforward. 1691-1694 - Erick Maxwell, Thomas M. Weller, Jeffrey Harrow:
A Tunable Ultra-Wideband Pulse Generator Using a Variable Edge-Rate Signal. 1695-1698 - Wei Zhong, Zhigang Mao:
Design and VLSI Architecture of a Channel Equalizer Based on Adaptive Modulation for IEEE 802.11a WLAN. 1699-1702 - Ping Wang, Aiqun Hu, Wenjiang Pei:
The Design of Anti-collision Mechanism of UHF RFID System based on CDMA. 1703-1708 - S. Wachirarattanapornkul:
On The Realization of Active MURC Filter wth a Single Pole Amplifier. 1709-1712 - M. Jayalakshmi, S. N. Merchant, Uday B. Desai, G. Ajay, J. V. L. Aanchan, P. Srinath, J. Shashank:
Error Concealment Using Digital Watermarking. 1713-1716 - Vorapoj Patanavijit, Somchai Jitapunkul:
An Iterative Super-Resolution Reconstruction of Image Sequences using Fast Affine Block-Based Registration with BTV Regularization. 1717-1720 - Assim Sagahyroon:
Power Consumption in Handheld Computers. 1721-1724 - Liang Zhu, Jinian Bian:
From Software to Hardware - A Novel TLM Auto-Generating Method. 1725-1728 - Korrai Deergha Rao, B. V. S. S. N. Raju:
Improved Robust Multiuser Detection in Non-Gaussian Channels Using a New M-Estimator and Spatiotemporal Chaotic Spreading Sequences. 1729-1732 - Masahiro Iwahashi, Sakol Udomsiri, Jyun Watanabe, Shinji Fukuma:
Generation of Panoramic Image from Aerial Video utilizing JP2K Wavelet for River Surveillance. 1733-1736 - Hirak Patangia, Dennis Gregory:
A Harmonic Reduction Scheme in SPWM. 1737-1740 - Masahiro Iwahashi, Sakol Udomsiri, Yuji Imai, Shinji Fukuma:
Water Level Detection for River Surveillance utilizing JP2K Wavelet Transform. 1741-1744 - Mahdi Nazm Bojnordi, Omid Fatemi, Mahmoud Reza Hashemi:
Dual Mode Architecture for Deblocking Filtering in H.264/AVC Video Coding. 1745-1748 - Mahdi Nazm Bojnordi, Mehdi Semsarzadeh, Mahmoud Reza Hashemi, Omid Fatemi:
Efficient Hardware Implementation for H.264/AVC Motion Estimation. 1749-1752 - Xiaoxin Cui, Dunshan Yu, Shimin Sheng, Xiaole Cui:
Design and Implementation of a 2-level FSK Digital Modems Using CORDIC Algorithm. 1753-1756 - Tianchi Yang, Liang Jin, Juan Chen:
Power Management in Circuits Design. 1757-1759 - Haiquan Zhao, Mingyuan Xie, Xiangping Zeng:
A Novel Structure of Conjunction Decision Feedback Equalizer for Nonlinear Channels. 1760-1763 - Masoud Babaie, Hamid Movahedian, Mehrdad Sharif Bakhtiar:
A Novel Method for Systematic Error Prediction of CMOS Folding and Interpolating ADC. 1768-1771 - Saurabh Singh, K. Radhakrishna Rao:
Low Voltage Analogue Multiplier. 1772-1775 - Kun-Yi Lin, Ro-Min Weng:
A Low-power Tunable Bandpass Amplifier for RF Applications. 1776-1778 - Kornika Moolpho, Jitkasame Ngarmnil:
Low Voltage High-Performance Class-AB FGMOS Buffer. 1779-1782 - Wen-Chung Kao, Chun-Kuo Yu, Chia-Ping Shen, Wei-Hsin Chen, Pei-Yung Hsiao:
Electrocardiogram Analysis with Adaptive Feature Selection and Support Vector Machines. 1783-1786 - Fatemeh Aezinia, Ali Afzali-Kusha, Caro Lucas:
Optimizing High Speed Flip-Flop Using Genetic Algorithm. 1787-1790 - Chua-Chin Wang, Gang-Neng Sung, Ming-Kai Chang, Ying-Yu Shen:
Engery-Efficient Double-Edge Triggered Flip-Flop Design. 1791-1794 - Saihua Lin, Rong Luo, Huazhong Yang, Hui Wang:
A 0.9V 10GHz 71µW Static D Flip-flop by using FinFET Devices. 1795-1798 - Zih-Heng Chen, Ming-Haw Jing, Trieu-Kien Truong, Yaotsu Chang:
Another Look at the Sequential Multiplier over Normal Bases. 1799-1802 - Masanori Hariyama, Michitaka Kameyama:
A Multi-Context FPGA Using a Floating-Gate-MOS Functional Pass-Gate and Its CAD Environment. 1803-1806 - Kang-Yu Chang, Zhi-Ming Lin:
Level Selection Based 4-PAM Transmitter for Chip to Chip Communication. 1807-1810 - Xiao Baojin, Xiao Yingzhe, Xiao Baowei:
Research of Phase-Inversion Symmetric Modulation Based on DSB Communication System. 1811-1813 - Nariman Moezzi Madani, Hamed Holisaz, Seid Mehdi Fakhraie:
Digital Audio Broadcasting System Modeling and Hardware Implementation. 1814-1817 - Ahmad Saghafi, Seid Mehdi Fakhraie:
Rapid Acquisition of Ultra-Wideband Signals in Multipath Environments. 1818-1821 - Neda Kazemian Amiri, Seid Mehdi Fakhraie:
Digital Network Echo Cancellation Using Genetic Algorithm and Combined GA-LMS Method. 1822-1825 - Mohammad Reza Jahed-Motlagh, Behnam Kia:
Chua Circuit Based Reconfigurable Computing System. 1826-1829 - Ajeesh P. Kurian, Sadasivan Puthusserypady:
Unscented Kalman Filter and Particle Filter for Chaotic Synchronization. 1830-1834 - William L. Ditto, Krishnamurthy Murali, Sudeshna Sinha:
Exploiting Chaos for Computation. 1835-1838 - Krishnamurthy Murali, Sudeshna Sinha, William L. Ditto:
Reconfigurable Logic Element using a Chaotic Circuit. 1839-1842 - Abraham Miliotis, William L. Ditto, Sudeshna Sinha:
Exploiting Nonlinear Dynamics to Search for the Existence of Matches in a Database. 1843-1846 - Khairul Munadi, Masaaki Fujiyoshi, Kiyoshi Nishikawa, Hitoshi Kiya:
Codeblock-Based Concealment Scheme for JPEG2000 Images in Lossy Packet Networks. 1847-1850 - Yi-Zhen Zhang, Chao Xu:
Progressive Technique for Rate Distortion Optimization in JPEG2000. 1851-1854 - Daisuke Shirai, Takahiro Yamaguchi, Takashi Shimizu, Takahiro Murooka, Tetsuro Fujii:
4K SHD Real-Time Video Streaming System With JPEG 2000 Parallel Codec. 1855-1858 - Takeshi Kumaki, Y. Kouno, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch:
Application of Multi-ported CAM for Parallel Coding. 1859-1862 - Yangxing Liu, Takeshi Ikenaga, Satoshi Goto:
A Novel Hybrid Approach of Color Image Segmentation. 1863-1866 - Song Chen, Takeshi Yoshimura:
On the Number of 3-D IC Floorplan Configurations and a Solution Perturbation Method with Good Convergence. 1867-1870 - Norihide Okada, Chikaaki Kodama, Takashi Sato, Kunihiro Fujiyoshi:
Thermal Driven Module Placement Using Sequence-pair. 1871-1874 - Wu Jigang, Thambipillai Srikanthan:
Efficient Algorithms for Hardware/Software Partitioning to Minimize Hardware Area. 1875-1878 - Lele Jiang, Junfa Mao:
Global Interconnect Analysis and Optimization for Nanometer Scale VLSI. 1879-1882 - Jiann-Chyi Rau, Po-Han Wu, Chia-Jung Liu:
A Novel Hardware Architecture for Low Power and Rapid Testing of VLSI Circuits. 1883-1886 - Jingbo Yang:
Reducing Noisy-Coefficient Problem in Non-Continuous Adaptive Feedback Canceller for Hearing Aids. 1887-1890 - V. G. Reju, Soo Ngee Koh, Ing Yann Soon:
A Robust Correlation Method for Solving Permutation Problem in Frequency Domain Blind Source Separation of Speech Signals. 1891-1894 - Russell Ondusko, Matthew Marbach, Andrew McClellan, Ravi Prakash Ramachandran, Linda M. Head, Mark C. Huggins, Brett Y. Smolenski:
Blind Determination of the Signal to Noise Ratio of Speech Signals Based on Estimation Combination of Multiple Features. 1895-1898 - Qing Wang, Zhenbo Zhu, Yi Ge, Ling Shao:
Design of IP Media Server for Voice Conference Application. 1899-1902 - Hui Wang, Wenbin Xu, Xin Dong, Chuanzhen Li, Wenhua Yu:
Implementation of MPEG-2 AAC on 16-bit Fixed-Point DSP. 1903-1906 - Sommart Sang-Ngern, A. Roeksabutr:
DWDM Demultiplexer Using Compound Optical Ring Resonator with Fiber Bragg Grating. 1907-1910 - Phanumas Khumsat, Noppadol Wattanapisit, Karel Kulhavey:
Optical Front-Ends for Low-Cost Laser-Based 10-Mbps Free-Space Optical Transceiver. 1911-1914 - Peter K. K. Loh:
A Standalone Printing USB Host Device Prototype. 1915-1918 - Kandeepan Sithamparanathan, Yong Kang Wong:
Narrow-Band FM Multi-Tone FSK Modem: TMS320C6000 Based Testbed Implementation and Performance Analysis. 1919-1922 - Natthoo Lal Prajapati, Dinesh Chandra:
Genetic Algorithm based Approximants for Discrete Time Systems: A Computer-Aided Approach. 1923-1926 - Pramod Kumar Meher, Jagdish Chandra Patra, A. Prasad Vinod:
A 2-D Systolic Array for High-Throughput Computation of 2-D Discrete Fourier Transform. 1927-1930 - Chi-Chen Lai, Wei Hwang:
A Low-Power Reconfigurable Mixed-Radix FFT/IFFT Processor. 1931-1934 - Chih-Peng Fan, Mau-Shih Lee, Guo-An Su:
A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture. 1935-1938 - Chih-Peng Fan, Guo-An Su:
A Grouped Fast Fourier Transform Algorithm Design For Selective Transformed Outputs. 1939-1942 - Shiqun Zhang, Dunshan Yu, Shimin Sheng:
A Discrete STFT Processor for Real-time Spectrum Analysis. 1943-1946 - Deyasini Majumdar, Winston Li, Henry Leung, Brent J. Maundy:
A Low Cost/Low Power Chaos-based Transceiver Exploiting Ergodicity. 1947-1950 - K. Ganesan, R. Muthukumar, K. Murali:
Look-up Table Based Chaotic Encryption of Audio Files. 1951-1954 - Tong Zhou, Zhibo Zhou, Mingyan Yu, Yizheng Ye:
Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator. 1955-1958 - Daisuke Atuti, Takashi Morie, Kazuyuki Aihara:
A Current-Sampling-Mode Arbitrary Chaos Generator Circuit Using Pulse Modulation Approach Driven by Quantized Nonlinear Waveforms. 1959-1963 - Lixia Sun, Ping Qu, Yong Feng:
Chaos Synchronization Using A Robust Sliding Mode Observer By Transmitting A Scalar Signal. 1964-1967 - Jidong Wang, Takeshi Ikenaga, Satoshi Goto, Kazuo Kunieda, Makoto Iwata, Hirokazu Koizumi, Hideo Shimazu:
A New Multiscale Line Detection Approach for Aerial Image with Complex Scene. 1968-1971 - Jia-Bin Huang, Yu-Kun Lin, Tian-Sheuan Chang:
A Display Order Oriented Scalable Video Decoder. 1976-1979 - Yang Jie, Shen Sun:
Implementation of Multipoint Video Conference in Software. 1980-1983 - Jagdish Chandra Patra, W. Soh, Ee Luang Ang, Pramod Kumar Meher:
An Improved SVD-Based Watermarking Technique for Image and Document Authentication. 1984-1987 - Xin-huai Chen, Yufei Zhou, Jun-Ning Chen, Lili Wang:
Study on Complex Behavior in Phase-Shifting Full-Bridge ZVS Converter. 1988-1991 - Hana Baili:
Uncertainty Management for Estimation in Dynamical Systems. 1992-1995 - Hung-Chi Tsai, Chia-Chi Chu:
Nonlinear STATCOM Controller using Passivity-Based Sliding Mode Control. 1996-1999 - Abdul Ghafoor, Victor Sreeram:
Frequency Interval Gramians based Model Reduction. 2000-2003 - Chuen M. Tan, Masud H. Chowdhury:
Simultaneous Analysis of Capacitive Coupling and Leakage Noise in Nanometer Scale Circuits. 2004-2007 - Xiaoying Li, Fuming Sun, Enhua Wu:
A Simulink-to-FPGA Co-Design of Encryption Module. 2008-2011 - R. Punchalard, Jeerasuda Koseeyaporn, Paramote Wardkein:
Analytic Solution of Amplitude Controlled Digital Oscillator Using Multi-Time Variables Technique. 2012-2015 - Chin-Heng Lim:
Reduced-Dimension Single Data Set Detection Algorithms. 2016-2019 - Su-Hon Lin, Ming-Hwa Sheu, Jing-Shiun Lin, Wen-Tsai Sheu:
Efficient VLSI Design for RNS Reverse Converter Based on New Moduli Set (2n-1, 2n+1, 22n+1). 2020-2023 - Ngo Quoc Tao, Pham Van Hung:
Online Continues Vietnamese Handwritten Character Recognition Based on Microsoft Handwritten Character Recognition Library. 2024-2026
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