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ORCID34th ASAP 2023: Porto, Portugal
- 34th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2023, Porto, Portugal, July 19-21, 2023. IEEE 2023, ISBN 979-8-3503-4685-5
- João M. P. Cardoso
, Alexandra Jimborean, Nele Mentens, José Gabriel F. Coutinho:
Preface ASAP 2023. xi - Zhenyu Xu, Miaoxiang Yu, Jillian Cai, Qing Yang, Yeonho Jeong, Tao Wei:
A Novel FPGA-Based Circuit Simulator for Accelerating Reinforcement Learning-Based Design of Power Converters. 1-9 - Yifan Zhao, Honglin Kuang, Yi Sun, Zhen Yang, Chen Chen, Jianyi Meng, Jun Han:
Enhancing RISC-V Vector Extension for Efficient Application of Post-Quantum Cryptography. 10-17 - Pierre Abillama, Zichen Fan, Yu Chen, Hyochan An, Qirui Zhang, Seungkyu Choi, David T. Blaauw, Dennis Sylvester, Hun-Seok Kim:
SONA: An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal Weights. 18-26 - Igor D. S. Miranda, Aman Arora, Zachary Susskind, Josias S. A. Souza, Mugdha P. Jadhao, Luis A. Q. Villon, Diego L. C. Dutra, Priscila M. V. Lima, Felipe M. G. França, Maurício Breternitz, Lizy K. John:
COIN: Combinational Intelligent Networks. 27-28 - Miaoxiang Yu, Zhenyu Xu, Jillian Cai, Qing Yang, Tao Wei:
A Heterogeneous Computer Architecture Accelerating Reinforcement Learning-based Design for Silicon Photonic Devices. 29-30 - Maxime Popoff, Romain Michon, Tanguy Risset, Pierre Cochard, Stéphane Letz, Yann Orlarey, Florent de Dinechin:
Audio DSP to FPGA Compilation. 31-32 - Preet Derasari, Kailash Gogineni, Guru Venkataramani:
Mayalok: A Cyber-Deception Hardware Using Runtime Instruction Infusion. 33-40 - Raul Murillo, Alberto A. Del Barrio, Guillermo Botella:
A Suite of Division Algorithms for Posit Arithmetic. 41-44 - Jiyoung An, Esmerald Aliaj, Sang-Woo Jun:
PreCog: Near-Storage Accelerator for Heterogeneous CNN Inference. 45-52 - Jiahong Chen, Shengzhe Wang, Zhihao Zhang, Suzhen Wu, Bo Mao:
iKnowFirst: An Efficient DPU-Assisted Compaction for LSM-Tree-Based Key-Value Stores. 53-60 - Michael Beyer, Sven Gesper, Andre Guntoro, Guillermo Payá Vayá, Holger Blume:
Exploiting Subword Permutations to Maximize CNN Compute Performance and Efficiency. 61-68 - Seyyed Hasan Mozafari, James J. Clark, Warren J. Gross, Brett H. Meyer:
Efficient 1D Grouped Convolution for PyTorch a Case Study: Fast On-Device Fine-Tuning for SqueezeBERT. 69-75 - Dimitrios Gourounas, Bagus Hanindhito, Arash Fathi, Dimitar Trenev, Lizy K. John, Andreas Gerstlauer:
FAWS: FPGA Acceleration of Large-Scale Wave Simulations. 76-84 - Yen-Fu Liu, Chou-Ying Hsieh, Sy-Yen Kuo:
Boomerang: Physical-Aware Design Space Exploration Framework on RISC-V SonicBOOM Microarchitecture. 85-93 - Joao Mario Domingos, Tiago Rocha, Nuno Neves, Nuno Roma, Pedro Tomás, Leonel Sousa:
Supporting RISC-V Performance Counters Through Linux Performance Analysis Tools. 94-101 - Ce Guo, Wayne Luk, Alexander Warren, Joshua M. Levine, Peter Brookes:
Co-Design of Algorithm and FPGA Accelerator for Conditional Independence Test. 102-109 - Mengxi Liu, Bo Zhou, Zimin Zhao, Hyeonseok Hong, Hyun Kim, Sungho Suh, Vítor Fortes Rey, Paul Lukowicz:
FieldHAR: A Fully Integrated End-to-End RTL Framework for Human Activity Recognition with Neural Networks from Heterogeneous Sensors. 110-118 - Petros Toupas, Christos-Savvas Bouganis, Dimitrios Tzovaras:
FMM-X3D: FPGA-Based Modeling and Mapping of X3D for Human Action Recognition. 119-126 - Yoshiki Kunimoto, Qiong Chang, Yoshiki Yamaguchi, Tsutomu Maruyama:
GPU Acceleration of Multi-Object Tracking with Motion Vector Interpolation and Affine Transformation. 127-134 - Maxime Millet, Adrien Cassagne, Nicolas Rambaux, Lionel Lacassagne:
Real-Time and Approximate Iterative Optical Flow Implementation on Low-Power Embedded CPUs. 135-138 - Shashwat Khandelwal, Shanker Shreejith:
Real-Time Zero-Day Intrusion Detection System for Automotive Controller Area Network on FPGAs. 139-146 - Mathijs De Kremer, Marco Brohet, Subhadeep Banik, Roberto Avanzi, Francesco Regazzoni:
Resource-Constrained Encryption: Extending Ibex with a QARMA Hardware Accelerator. 147-155 - Taha Shahroodi, Michael Miao, Mahdi Zahedi, Stephan Wong, Said Hamdioui:
SieveMem: A Computation-in-Memory Architecture for Fast and Accurate Pre-Alignment. 156-164 - Shijie Jiang, Yi Zou, Hao Wang, Wanwan Li:
An FFT Accelerator Using Deeply-coupled RISC-V Instruction Set Extension for Arbitrary Number of Points. 165-171 - Esmerald Aliaj, Alberto Krone-Martins, Joshua Garcia, Sang-Woo Jun:
FarSlayer: Turnkey Acceleration of Legacy Software on Commodity FPGA Cards. 172-179 - Sergio A. Pertuz, Ariel Podlubne, Diana Goehringer:
An Efficient Accelerator for Nonlinear Model Predictive Control. 180-187 - Jan-Harm L. F. Betting, Dimitrios Liakopoulos, Max C. W. Engelen, Christos Strydis:
Oikonomos: An Opportunistic, Deep-Learning, Resource-Recommendation System for Cloud HPC. 188-196 - Zhigang Wei, Aman Arora, Ruihao Li, Lizy K. John:
HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis. 197-204 - Kailash Gogineni, Yongsheng Mei, Tian Lan, Peng Wei, Guru Venkataramani:
AccMER: Accelerating Multi-Agent Experience Replay with Cache Locality-Aware Prioritization. 205-212 - Yannick Braatz, Dennis Sebastian Rieber, Taha Soliman, Oliver Bringmann:
SimPyler: A Compiler-Based Simulation Framework for Machine Learning Accelerators. 213-220
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