ASPLOS-VIII, 1998: San Jose, California

• 
  Dileep Bhandarkar, Anant Agarwal:
  ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998. ACM Press 1998, ISBN 1-58113-107-0

SIGARCH Computer Architecture News 26 (Special Issue October 1998), SIGOPS Operating Systems Review 32 (5) 1998, SIGPLAN Notices 33(11) 1998

Compiler Optimizations for Memory

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  Keith D. Cooper, Timothy J. Harvey:
  Compiler-Controlled Memory. 2-11
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  Matthew L. Seidl, Benjamin G. Zorn:
  Segregating Heap Objects by Reference Behavior and Lifetime. 12-23
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  Michelle Mills Strout, Larry Carter, Jeanne Ferrante, Beth Simon:
  Schedule-Independent Storage Mapping for Loops. 24-33

Speculation and ILP Compilation - 1

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  Avinash Sodani, Gurindar S. Sohi:
  An Empirical Analysis of Instruction Repetition. 35-45
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  Walter Lee, Rajeev Barua, Matthew I. Frank, Devabhaktuni Srikrishna, Jonathan Babb, Vivek Sarkar, Saman P. Amarasinghe:
  Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine. 46-57
• 
  Lance Hammond, Mark Willey, Kunle Olukotun:
  Data Speculation Support for a Chip Multiprocessor. 58-69

I/O Systems

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  Rodney Van Meter, Gregory G. Finn, Steve Hotz:
  VISA: Netstation's Virtual Internet SCSI Adapter. 71-80
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  Anurag Acharya, Mustafa Uysal, Joel H. Saltz:
  Active Disks: Programming Model, Algorithms and Evaluation. 81-91
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  Garth A. Gibson, David Nagle, Khalil Amiri, Jeff Butler, Fay W. Chang, Howard Gobioff, Charles Hardin, Erik Riedel, David Rochberg, Jim Zelenka:
  A Cost-Effective, High-Bandwidth Storage Architecture. 92-103

Caches and Memory Systems

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  Philip Machanick, Pierre Salverda, Lance Pompe:
  Hardware-Software Trade-Offs in a Direct Rambus Implementation of the RAMpage Memory Hierarchy. 105-114
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  Amir Roth, Andreas Moshovos, Gurindar S. Sohi:
  Dependance Based Prefetching for Linked Data Structures. 115-126
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  Boris Weissman:
  Performance Counters and State Sharing Annotations: a Unified Approach to Thread Locality. 127-138
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  Brad Calder, Chandra Krintz, Simmi John, Todd M. Austin:
  Cache-Conscious Data Placement. 139-149

Cross Platform Techniques and Branch Prediction

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  Bich C. Le:
  An Out-of-Order Execution Technique for Runtime Binary Translators. 151-158
• 
  Chandra Krintz, Brad Calder, Han Bok Lee, Benjamin G. Zorn:
  Overlapping Execution with Transfer Using Non-Strict Execution for Mobile Programs. 159-169
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  Jared Stark, Marius Evers, Yale N. Patt:
  Variable Length Path Branch Prediction. 170-179

Multiprocessor Systems

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  Ben Verghese, Anoop Gupta, Mendel Rosenblum:
  Performance Isolation: Sharing and Isolation in Shared-Memory Multiprocessors. 181-192
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  Yuqun Chen, Angelos Bilas, Stefanos N. Damianakis, Cezary Dubnicki, Kai Li:
  UTLB: A Mechanism for Address Translation on Network Interfaces. 193-204
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  Vivek S. Pai, Mohit Aron, Gaurav Banga, Michael Svendsen, Peter Druschel, Willy Zwaenepoel, Erich M. Nahum:
  Locality-Aware Request Distribution in Cluster-based Network Servers. 205-216

Cache Analysis

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  Olivier Temam:
  Investigating Optimal Local Memory Performance. 218-227
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  Somnath Ghosh, Margaret Martonosi, Sharad Malik:
  Precise Miss Analysis for Program Transformations with Caches of Arbitrary Associativity. 228-239
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  Jih-Kwon Peir, Yongjoon Lee, Windsor W. Hsu:
  Capturing Dynamic Memory Reference Behavior with Adaptive Cache Topology. 240-250

Speculation and ILP Compilation - 2

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  Daniel Citron, Dror G. Feitelson, Larry Rudolph:
  Accelerating Multi-Media Processing by Implementing Memoing in Multiplication and Division Units. 252-261
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  Chao-ying Fu, Matthew D. Jennings, Sergei Y. Larin, Thomas M. Conte:
  Value Speculation Scheduling for High Performance Processors. 262-271
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  Narayan Ranganathan, Manoj Franklin:
  An Empirical Study of Decentralized ILP Execution Models. 272-281

Simulation and Performance

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  Eric Schnarr, James R. Larus:
  Fast Out-Of-Order Processor Simulation Using Memoization. 283-294
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  Bruce L. Jacob, Trevor N. Mudge:
  A Look at Several Memory Management Units, TLB-Refill Mechanisms, and Page Table Organizations. 295-306
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  Parthasarathy Ranganathan, Kourosh Gharachorloo, Sarita V. Adve, Luiz André Barroso:
  Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors. 307-318