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ORCIDCODES+ISSS 2025: Taipei, Taiwan
- International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2025, Taipei, Taiwan, September 28 - Oct. 3, 2025. IEEE 2025, ISBN 979-8-4007-1992-9
- Yi-Chun Liao, Chieh-Lin Tsai, Yuan-Hao Chang, Camélia Slimani, Jalil Boukhobza, Tei-Wei Kuo:
Practicalizing Tree-Based Model Acceleration with CAM through Model Pruning and Data Placement Optimization. 1-2 - Hayata Kaneko, Lin Meng:
SIMD-CP: SIMD with Redundant Bits Compression and Mixed-Precision Packing for Quantized DNNs. 1-2 - Jiajie Wang, Saumya Shankar, Partha S. Roop:
Softtide: a deterministic middleware for real-time systems. 17-18 - Vishesh Mishra, Mahndera Rathor, Urbi Chatterjee:
Dual-Mode Rounding Algorithms and Hardware for Posit-based DNN Training: The Future of Mixed Precision Frameworks. 13-14 - Serhan Gener, Md Sahil Hassan, Ali Akoglu:
Tutorial: CEDR: A Holistic Software and Hardware Design Environment for Hardware Agnostic Application Development and Deployment on FPGA-Integrated Heterogeneous Systems. 1-2 - Kathryn Chapman, Fu-Jian Shen, Jhih-Kuan Lin, Jenq-Kuen Lee:
Work-in-Progress: Extending a RISC-V Core with Sub-FP8 Support for Machine Learning. 15-16 - Mehdi B. Tahoori, Vincent Meyers, Mahboobe Sadeghipour Roodsari, Huashuangyang Xu, Jürgen Becker, Tanja Harbaum, Felix Frombach, Julian Höfer, Georgios Sotiropoulos, Jörg Henkel, Zeynep Demirdag, Heba Khdr, Hassan Nassar, Ulf Schlichtmann, Johannes Geier, Philipp van Kempen, Georg Sigl, Stefan Koegler, Matthias Probst, Jürgen Teich, Frank Hannig, Muhammad Sabih, Batuhan Sesli, Norbert Wehn, Lukas Steiner, Wolfgang Kunz, Mohamed Shelkamy Ali:
Special Session - Hardware-Software Co-Design for Machine Learning Systems Made Open-Source. 23-32 - Yuhan She, Yanlong Huang, Jierui Liu, Ray C. C. Cheung, Hong Yan:
CAHLS: Source-to-Source Transformation to Generate Cycle Accurate Models for High-Level Synthesis. 1-2
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