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DIMACS Workshop: Computer-Aided Verification 1990
- Edmund M. Clarke, Robert P. Kurshan:
Computer-Aided Verification, Proceedings of a DIMACS Workshop 1990, New Brunswick, New Jersey, USA, June 18-21, 1990. DIMACS Series in Discrete Mathematics and Theoretical Computer Science 3, DIMACS/AMS 1991, ISBN 978-0-8218-6594-1 - Edmund M. Clarke, Robert P. Kurshan:
Preface. CAV (DIMACS/AMS volume) 1990: xi- - Edmund M. Clarke:
Temporal Logic Model Checking: Two Techniques for Avoiding the State Explosion Problem. 1-2 - Hans Eveking:
Automatic Verification of Extensions of Hardware Descriptions. 3-14 - David K. Probst, Hon Fung Li:
Using Partial-Order Semantics to Avoid the State Explosion Problem in Asynchronous Systems. 15-24 - Antti Valmari:
A Stubborn Attack on State Explosion. 25-42 - Gérard Berthelot, Colette Johnen, Laure Petrucci:
PAPETRI: Environment for the Analysis of PETRI Nets. 43-56 - Susanne Graf, Bernhard Steffen:
Compositional Minimization of Finite State Systems. 57-74 - Olivier Coudert, Jean Christophe Madre, Christian Berthet:
Verifying Temporal Properties of Sequential Machines without Building Their State Diagrams. 75-84 - Ahmed Bouajjani, Jean-Claude Fernandez, Nicolas Halbwachs:
Minimal Model Generation. 85-92 - Jerry R. Burch:
Verifying Liveness Properties by Verifying Safety Properties. 93-102 - Michel Barbeau, Gregor von Bochmann:
Extension of the Karp and Miller Procedure to LOTOS Specifications. 103-120 - Randal E. Bryant, Carl-Johan H. Seger:
Formal Verification of Digital Circuits Using Symbolic Ternary System Models. 121-146 - Mark B. Josephs, Jan Tijmen Udding:
An Algebra for Delay-Insensitive Circuits. 147-176 - Howard Wong-Toi, David L. Dill:
Synthesizing Processes and Schedulers from Temporal Specifications. 177-186 - Paul Loewenstein, David L. Dill:
Verification of Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic. 187-206 - Costas Courcoubetis, Moshe Y. Vardi, Pierre Wolper, Mihalis Yannakakis:
Memory Efficient Algorithms for the Verification of Temporal Properties. 207-218 - Hiromi Hiraishi, Shintaro Meki, Kiyoharu Hamaguchi:
Vectorized Model Checking for Computation Tree Logic. 219-230 - Ryszard Janicki, Maciej Koutny:
On Some Implementation of Optimal Simulations. 231-250 - Eric Madelaine
, Didier Vergamini:
Finiteness Conditions and Structural Construction of Automata for All Process Algebras. 275-292 - Carl Pixley:
A Computation Theory and Implementation of Sequential Hardware Equivalence. 293-320 - Patrice Godefroid:
Using Partial Orders to Improve Automatic Verification Methods. 321-340 - Bernhard Josko:
A Context Dependent Equivalence Relation between Kripke Structures. 341-358 - Gil Shurek, Orna Grumberg:
The Modular Framework of Computer-Aided Verification. 359-380 - David A. Carrington, Kenneth Arthur Robinson:
Tool Support for the Refinement Calculus. 381-394 - Wuxu Peng, S. Purushothaman Iyer:
A Unified Approach to the Deadlock Detection Problem in Networks of Communicating Finite State Machines. 395-404 - Mark Bickford, Mandayam K. Srivas:
A Computer-Aided Verification Tool for Finite State Controller Systems. 405-440 - James M. Morris, Mark Howard:
Program Verification by Symbolic Execution of Hyperfinite Ideal Machines. 441-462 - Rance Cleaveland:
On Automatically Distinguishing Inequivalent Processes. 463-476 - Valérie Roy, Robert de Simone:
Auto/Autograph. 477-492 - Hiroshi Nakamura, Yuji Kukimoto, Masahiro Fujita, Hidehiko Tanaka:
A Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio. 493-504 - Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda:
Model Checking and Graph Theory in Sequential ATPG. 505-518 - Jean Christophe Lloret, Pierre Azéma, François Vernadat:
Compositional Design and Verification of Communication Protocols, Using Labelled PETRI Nets. 519-534 - Ugo A. Buy, Robert Moll:
Liveness Analysis and the Automatic Generation of Concurrent Programs. 535-550 - Kiyoharu Hamaguchi, Hiromi Hiraishi, Shuzo Yajima:
Branching Time Regular Temporal Logic for Model Checking with Linear Time Complexity. 551-564 - Linda A. Ness:
Issues Arising in the Analysis of L.0. 565-576 - Michel Langevin:
Automated RTL Verification Based on Predicate Calculus. 577-590 - Victor Yodaiken:
The Algebraic Feedback Product of Automata. A State Machine Based Model of Concurrent Systems. 591-614 - Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi:
Results on the Interface between Formal Verification and ATPG. 615-628

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