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ORCID6th ICECS 1999: Pafos, Cyprus
- 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999, Pafos, Cyprus, September 5-8, 1999. IEEE 1999, ISBN 0-7803-5682-9
- Rami Ahola, Kari Stadius, Kari Halonen:
A fully integrated 2 GHz frequency synthesizer. 1-4 - S. Finocchiaro, Giuseppe Palmisano, R. Salerno, C. Sclafani:
Design of bipolar RF ring oscillators. 5-8 - Kostas Manetakis, Chris Toumazou, Christos Papavassiliou:
SC quadrature mixer for IF bandpass sampling. 9-12 - Abdelohahab Djemouai, Mohamad Sawan, Mustapha Slamani:
New circuit techniques based on a high performance frequency-to-voltage converter. 13-16 - Kostas Efstathiou, George D. Papadopoulos:
An enhanced frequency synthesizer using an analog dual input accumulator. 17-20 - Weidong Li, Lars Wanhammar:
A complex multiplier using overturned-stairs adder tree. 21-24 - Yousef B. Mahdy, Samia A. Ali, Khaled M. Shaaban:
A fast scheme and implementation for n-bit squarer. 25-28 - Kuo-Hsing Cheng, Chih-Sheng Huang:
The novel efficient design of XOR/XNOR function for adder applications. 29-32 - Kostas Adaos, G. Ph. Alexiou, Nikos Kanopoulos:
Efficient implementation of a serial/parallel multiplier for IP based development and rapid prototyping in VLSI digital signal processing. 33-36 - Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
A 56-bit self-timed adder for high speed asynchronous datapath. 37-41 - François Clouté, Jean-Noël Contensou, Daniel Esteve, Pascal Pampagnin, Philippe Pons, Yves Favard:
Hardware/software codesign of an avionics protocol interface system. 43-46 - George Hadjiyiannis, Pietro Russo, Srinivas Devadas:
Automatic architecture evaluation for hardware/software codesign. 47-53 - Nikos S. Voros, Sofia Tsasakou, Alexios N. Birbas, Luis Sánchez, Alejandro Alonso:
Application of a multi-formalism co-design methodology for the development of complex telecommunication protocols. 55-58 - S. K. Tsasakou, Nikos S. Voros, M. V. Koziotis, Diederik Verkest, Aggeliki S. Prayati, Alexios N. Birbas:
Hardware-software co-design of embedded systems using CoWare's N2C methodology for application development. 59-62 - Kostas Pramataris, George Lykakis, George I. Stassinopoulos:
Hardware/software co-simulation methodology based on two alternative approaches. 63-66 - Matthias Henker, Tim Hentschel, Gerhard P. Fettweis:
Time-variant CIC-filters for sample rate conversion with arbitrary rational factors. 67-70 - Miroslav Vlcek, Pavel Zahradník, Rolf Unbehauen:
Analytical design of FIR filters. 71-74 - Derar M. Al-Faris, Isam H. Zabalawi, Mohammad J. Mismar:
Estimation of coronary artery dimensions using stack filtering approach. 75-79 - Tim Hentschel, Gerhard P. Fettweis:
Reduced complexity comb-filters for decimation and interpolation in mobile communications terminals. 81-84 - Abdesselam Klouche-Djedid, Stuart S. Lawson:
Design of doubly complementary filters based on the complex all-pass section. 85-88 - José Antônio Gomes de Lima, Antonio Carlos Cavalcanti, Elmar U. K. Melcher:
MCA: one-port scalable microprogrammable ATM layer controller. 89-92 - Gregory Doumenis, George E. Konstantoulakis, G. Korinthios, George Lykakis, Dionysios I. Reisis, G. Synnefakis:
An efficient component (IN-RAM) for buffer management and multi-protocol implementation in ATM systems. 93-96 - Ioannis Papaefstathiou, A. Brown, J. Simer, D. Sobel, J. Sutaria, S. Y. Wang, T. Blackwell, M. Smith, W. Yang:
An IRAM-based architecture for a single-chip ATM switch. 97-100 - John C. McEachen, Mickey S. Batson:
Performance analysis of an ATM high-speed network interface. 101-104 - Aura Ganz, Andreas Savvides, Zvi Ganz:
Media access control development platform for wireless LANs. 105-108 - D. Anifantis, Evangelos Dermatas, George Kokkinakis:
A neural network method for accurate face detection on arbitrary images. 109-112 - Teresa Serrano-Gotarredona, Andreas G. Andreou, Bernabé Linares-Barranco:
Programmable 2D image filter for AER vision processing. 113-116 - Ioanna Christoyianni, Evangelos Dermatas, George Kokkinakis:
Neural classification of abnormal tissue in digital mammography using statistical features of the texture. 117-120 - Christodoulos I. Christodoulou, Constantinos S. Pattichis
:
Medical diagnostic systems using ensembles of neural SOFM classifiers. 121-124 - Rita H. Wouhaybi, Mohamad Adnan Al-Alaoui:
Comparison of neural networks for speaker recognition. 125-128 - Spiridon Vlassis, Th. Yiamalis, Stelios Siskos:
Analogue computational circuits based on floating-gate transistors. 129-132 - Claudio de Oliveira Brandão, Sergio Vianna Fialho, José Alberto Nicolau:
Development of a microcontrolled data acquisition system to optimize the INPE's data collecting station, via satellite. 133-136 - Chien-Hsiung Feng, Fredrik Jonsson, Mohammed Ismail, Håkan K. Olsson:
Analysis of nonlinearities in RF CMOS amplifiers. 137-140 - Antonino M. Sommariva:
Thévenin's theorem: a new formulation. 141-143 - Zdenek Smékal, Robert Vích:
Optimized models of IIR digital filters for fixed-point digital signal processor. 145-148 - Victor F. Dailyudenko:
Dispersion analysis and adaptive transformation of chaotic signal attractor. 149-152 - Vesna Rubezic, Radoje Ostojic:
Synchronization of chaotic Colpitts oscillators with applications to binary communications. 153-156 - Cristina Vlad, Serban Lungu, Dorin Petreus, Cristian Farcas:
Controlling chaos in buck converters. 157-160 - Philippe Dondon, J. M. Micouleau:
An original approach for the design of a Class D power switching amplifier - an audio application. 161-164 - Andreas Floros, John Mourjopoulos:
A novel and efficient PCM to PWM converter for digital audio amplifiers. 165-168 - Karl H. Edelmoser, Felix A. Himmelstoss:
Comparison of two high efficiency DC-to-AC converters. 169-172 - Mikko Lapinoja, Timo Rahkonen:
On the noise analysis of modulated nonlinear circuits. 173-176 - Richard A. Guinee, Colin Lyden:
A novel analytical technique for spectral analysis prediction in asynchronous pulsewidth modulated inverter systems. 177-180 - Johan van der Tang, Dieter Kasperkovitz:
Low phase noise reference oscillator with integrated PMOS varactors for digital satellite receivers. 181-184 - Juha Häkkinen, Timo Rahkonen, Juha Kostamovaara:
An integrated programmable low-noise charge pump. 185-188 - Nacer Abouchi, Romuald Gallorini, C. Ruby:
Exponential and logarithmic functions using standard CMOS 0.8 μm technology. 189-192 - Jerasimos Zohios, Brad Kramer, Mohammed Ismail:
A fully integrated 1 GHz BiCMOS VCO. 193-196 - Chatpong Suriyaammaranon, Kobchai Dejhan, Fusak Cheevasuvit, Chatcharin Soonyeekan:
A high speed BiCMOS tristate buffer circuit. 197-199 - Ioannis Moisiadis, Ilias Bouras, Constantin Papadas, Angela Arapoyanni:
Performance comparison of driver architectures in submicron CMOS and BiCMOS technologies for low voltage operation. 201-204 - Radu M. Secareanu, Victor Adler, Eby G. Friedman:
Exploiting hysteresis in a CMOS buffer. 205-208 - Atila Alvandpour, Per Larsson-Edefors, Christer Svensson:
A leakage-tolerant multi-phase keeper for wide domino circuits. 209-212 - Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni:
Novel domino logic designs. 213-216 - Arnaldo S. R. Oliveira, Valery Sklyarov:
Implementation of virtual control circuits in dynamically reconfigurable FPGAs. 217-220 - Christian Schuler:
Code generation tools for hardware implementation of FEC circuits. 221-224 - László Varga, Gábor Hosszú, Ferenc Kovács:
Circuit synthesis based on VHDL language transformations. 225-228 - Giuseppe Bernacchia, Lazhar Khriji, Moncef Gabbouj, Giovanni L. Sicuranza:
Hardware implementation of the median-rational hybrid filters. 229-232 - George Economakos, George K. Papakonstantinou:
A formal method for hardware design using attribute grammars. 233-236 - Won-Ho Kim, Jae-Chul Kim, In-Kyu Choi, Jong-Sik Park:
Improvement of the signal to noise ratio of the magnetic detection system using the geological magnetic filter. 237-240 - Marcos Martínez-Peiró, Javier Valls, T. Sansaloni, A. Perez-Pascual, Eduardo I. Boemo:
A comparison between lattice, cascade and direct form FIR filter structures by using a FPGA bit-serial distributed arithmetic implementation. 241-244 - Sari Peltonen, Pauli Kuosmanen:
ODIF for weighted median filters. 245-248 - Juha Yli-Kaakinen, Ming Hu, Teemu Kupiainen, Markku Renfors:
Digital filter design for a PAL TV modulator. 249-252 - Yong Lian:
Design of discrete valued coefficient FIR filters using frequency response masking. 253-255 - Philippe Bénabès, Alain Gauthier, Richard Kielbasa, M. Goetz, M. G. Forbes, Marc P. Y. Desmulliez, A. C. Walker:
Design of an optoelectronic crossbar based on 0.6 μm CMOS process with a 1 Tbit/s optical input. 257-260 - Antonio Romeo, G. Romolotti, Marco Mattavelli, Daniel Mlynek:
Cryptosystem architectures for very high throughput multimedia encryption: the RPK solution. 261-264 - Humayun Khalid, Mohammad S. Obaidat:
KORA-2: a new cache replacement policy and its performance. 265-269 - Ana C. V. de Melo:
Minimising communications of synchronous hardware. 271-274 - Hossam M. A. Fahmy, Abu Bakr A. ElHefnawy:
On the exact reliability evaluation of mesh-connected processors. 275-278 - Jianhua He, Zongkai Yang, Shu Wang, Wenqing Chen:
Feedforward neural network based nonlinear dynamical system function reconstruction. 279-282 - Marios Poulos, Maria Rangoussi, Vassilios Chrissikopoulos, Angelos Evangelou:
Person identification based on parametric processing of the EEG. 283-286 - Henryk R. Halas:
Speech signal processing in order to increase recognition of spoken language. 287-290 - Vassilis P. Plagianakos, George D. Magoulas, Michael N. Vrahatis:
Nonmonotone learning rules for backpropagation networks. 291-294 - Kwok-Wo Wong, Sheng-Jiang Chang, Chi-Sing Leung:
Handwritten digit recognition using trace neural network with EKF training algorithm. 295-298 - Mahmoud Al-Nsour, Hoda S. Abdel-Aty-Zohdy:
Analog computational circuits for neural network implementations. 299-302 - Louis Luh, John Choma Jr., Jeffrey Draper:
A high-speed high-resolution CMOS current comparator. 303-306 - Anna-Karin Stenman, Lars Sundström:
Extended analysis of input impedance control of an NMOS-transistor with an inductive series feedback. 307-310 - C. A. Papazoglou, C. A. Karybakas:
Electronically-tunable floating CMOS resistor independent of the MOS parameters and temperature. 311-314 - Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
A new 5-parameter MOS transistors mismatch model. 315-318 - Stefan Johansson, Daniel Landström, Peter Nilsson:
Silicon realization of an OFDM synchronization algorithm. 319-322 - Heiko Henkelmann, Walter Anheier:
Implementation of sign detection in RNS using mixed radix representation. 323-326 - Timo Rahkonen, Harri Eksyma, Heikki Repo:
A DDS synthesizer with time domain interpolator. 327-330 - Saeid Nooshabadi, Juan A. Montiel-Nelson, Kamran Eshraghian:
A novel latch design technique for high speed GaAs circuits. 331-334 - Ming Zhang, Nicolas Llaser, Francis Devos:
Integrated multivalue voltage-to-voltage converter. 335-338 - Ren-Der Chen, Jer-Min Jou, Yeu-Horng Shiau:
An efficient method for the decomposition and resynthesis of speed-independent circuits. 339-342 - Malgorzata Chrzanowska-Jeske:
Generalized symmetric and generalized pseudo-symmetric functions. 343-346 - Andreas G. Veneris, Ibrahim N. Hajj:
A hybrid approach to design error detection and correction [VLSI digital circuits]. 347-350 - Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero:
Simulation-based sequential equivalence checking of RTL VHDL. 351-354 - Poul Frederick Williams, Henrik Hulgaard, Henrik Reif Andersen:
Equivalence checking of hierarchical combinational circuits. 355-360 - Carlo Caini, Paola Salmi, Alessandro Vanelli-Coralli:
Complexity evaluation of conjugate quadrature mirror filter banks. 361-364 - Guangyu Wang:
A method to improve the frequency characteristics in transition period for time-varying cosine modulated filter banks. 365-368 - Are Hjørungnes, Tor A. Ramstad:
Algorithm for jointly optimized analysis and synthesis FIR filter banks. 369-372 - Ari Viholainen, Tapio Saramäki, Markku Renfors:
Nearly perfect-reconstruction cosine-modulated filter bank design for VDSL modems. 373-376 - Roy Chapman, Tariq S. Durrani, A. P. Tarbert:
Watermarking DSP algorithms for system on chip implementation. 377-380 - Andrew P. Thurber, Guoliang Xue:
Computing hexagonal Steiner trees using PCx [for VLSI]. 381-384 - A. N. Kartas, D. K. Tsanakas:
A powerful algorithm for distribution systems analysis. 385-388 - Jamil N. Ayoub, Barbara M. Al-Ramadna:
Average network delay in packet switched networks. 389-392 - Thomas Halfmann, Manfred Thole:
A numerical method to synthesize the element characteristic in analog circuit design. 393-396 - Andreas Huber, Frank Weyhmüller, Karl Reiß, Dieter A. Mlynski:
An evolutionary algorithm for optimization of power supply systems on multichip modules. 397-400 - Victor Varshavsky, Vyacheslav Marakhovsky:
Implementability restrictions of the beta-CMOS artificial neuron. 401-405 - P. Power, F. J. Sweeney, C. F. N. Cowan:
EA crossover schemes for a MLP channel equaliser. 407-410 - Miroslav Skrbek, Miroslav Snorek:
Shift-add neural architecture. 411-414 - Eugenio Suárez Cáner, José Manoel de Seixas:
Neural discriminating analysis on preprocessed data. 415-418 - Ian Vince McLoughlin, Srikanthan Thambipillai:
LSP parameter interpretation for speech classification. 419-422 - Marcelo de Oliveira Rosa, Jose Carlos Pereira, Marcos Grellet, André C. P. L. F. de Carvalho:
Signal processing and statistical procedures to identify laryngeal pathologies. 423-426 - Athanasios Koutras, Evangelos Dermatas, George Kokkinakis:
Blind signal separation and speech recognition in the frequency domain. 427-430 - George K. Gregoriou, Benjamin M. W. Tsui:
TCT reconstruction with truncated projection data. 431-435 - A. Fotinos, George Economou, Evangelos Zigouris, Spiros Fotopoulos:
The use of entropy for colour edge detection. 437-440 - Giovanni Poggi, Arturo R. P. Ragozini:
Tree-structured product-codebook vector quantization. 441-444 - Gang Lin, Zemin Liu:
The application of multiwavelet transform to image coding. 445-448 - Luca Fanucci, Roberto Saletti, F. Vavala:
A low-complexity 2D discrete cosine transform processor for multimedia applications. 449-452 - Adrian N. Evans, Y. Guo, Donald M. Monro:
Limited motion estimation scheme for multimedia video compression. 453-456 - Maja Sliskovic:
Robust digital receiver for frequency redundant digital communications over power lines. 457-460 - Aydin Akan, Yalçin Çekiç:
Interference suppression in DSSS communication systems using instantaneous frequency estimation. 461-464 - Atsushi Hashimoto, J. Kim, Yoshinao Aoki, Alexander Burger:
A proposal of avatar language with Lifo for communication through linguistic barrier. 465-468 - Andreas A. Veglis, Andreas S. Pombortsis:
The fat Clos ATM switch. 469-472 - Vassilis Stylianakis, Simeon Toptchiyski:
A Reed-Solomon coding/decoding structure for an ADSL modem. 473-476 - Pascale Ferry, Dominique Degrugillier, Noël Caillere, Gérard Graton:
An innovating hypermedia approach complementary to traditional electronics teaching. 477-480 - H. Ghoudjehbaklou, A. Kargar:
A new predictive control strategy for active power filters. 481-484 - Theodore Georgantas, Stamatis Bouras, Dimitris Dervenis, Yannis Papananos:
A comparison between integrated current and voltage mode filters for baseband applications. 485-488 - Jarkko Jussila, Kari Halonen:
A 1.5 V active RC filter for WCDMA applications. 489-492 - Arie Arbel:
Pure-mode Gm-C biquad filters. 493-496 - Wai-Wa Choi, Kam-Weng Tam, P. Vitor, Rui Paulo Martins:
Active feedback amplifier approach for microwave filter. 497-500 - Angelos Chrisanthopoulos, George Souliotis, Ioannis Haritantis:
Differential current amplifiers with improved dynamic range. 501-504 - Kari Stadius, Risto Kaunisto, Veikko Porra:
Varactor diodeless harmonic VCOs for GHz-range applications. 505-508 - Adiseno, Mohammed Ismail, H. K. Olsson:
Indirect negative feedback bipolar LNA. 509-512 - Massimo Conti, Simone Orcioni, Claudio Turchetti, Giorgio Biagetti:
A current mode multistable memory using asynchronous successive approximation A/D converters. 513-516 - Adnan Harb, Yamu Hu, Mohamad Sawan:
New CMOS instrumentation amplifier dedicated to very low-amplitude signal applications. 517-520 - Alexandre Vouilloz, Catherine Dehollain, Michel J. Declercq:
Modelisation and simulation of integrated super-regenerative receivers. 521-524