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ORCID9th ICECS 2002: Dubrovnik, Croatia
- Proceedings of the 2002 9th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2002, Dubrovnik, Croatia, September 15-18, 2002. IEEE 2002, ISBN 0-7803-7596-3
- David Deschans, Jean-Baptiste Bégueret, Yann Deval
, Christophe Scarabello, Pascal Fouillat, Guy Montignac, Alain Baudry:
A SiGe 4-Gsps 2-bits digitizer with 2-4 GHz input bandwidth. 1-4 - Gianluca Giustolisi, Gaetano Palumbo, Salvatore Pennisi:
Statistical analysis of the resolution in a current-mode ADC. 5-8 - Mohammad Reza Hassanzadeh, Jafar Talebzadeh, Omid Shoaei:
A high-speed, current-steering digital-to-analog converter in 0.6-μm CMOS. 9-12 - Abhijit M. Dighe, A. V. Bapat:
An asynchronous serial flash converter. 13-15 - Jinghua Li, Franco Maloberti:
Pipeline of successive approximation converters with optimum power merit factor. 17-20 - Yefim S. Poberezhskiy, Gennady Y. Poberezhskiy:
Sampling and signal reconstruction structures performing internal antialiasing filtering. 21-24 - Andrew Marshall, Sreedhar Natarajan:
PD-SOI and FD-SOI: a comparison of circuit performance. 25-28 - Luis Quintanilla, Jesús Arias Álvarez, Lourdes Enríquez, José Vicente, Juan Barbolla, Diego Vázquez, Adoración Rueda:
Design of a switched opamp-based bandpass filter in a 0.35 μm CMOS technology. 29-32 - Jader A. De Lima:
A low-voltage programmable-gain current-mode amplifier. 33-36 - Adnan Harb, Mohamad Sawan:
Low power BIN integrator dedicated to neural signal processing. 37-40 - Yong Liu, Zhiqiang Gao:
Timing analysis of transistor stack for leakage power saving. 41-44 - Luis Henrique de Carvalho Ferreira, Robson L. Moreno, Tales C. Pimenta, Carlos A. R. Filho:
A precise sample-and-hold circuit topology in CMOS for low voltage applications with offset voltage self correction. 45-48 - Lyes Bouzerara, M. T. Belaroussi:
Low-voltage CMOS wideband operational transconductance amplifier with regulated cascode circuit. 49-52 - Patricia Desgreys, Antoine Tauvel, Patrick Loumeau:
SC and SI techniques performances faced with technological advances [in CMOS]. 53-56 - Cosmin Popa, Anca Manuela Manolescu, Octavian Mitrea, Manfred Glesner:
Low-power CMOS active resistor independent on the threshold voltage. 57-60 - Gaetano Palumbo, Domenico Pappalardo, Maurizio Gaibotti:
Voltage regulator based on an high-efficiency adaptive charge pump. 61-64 - Chua-Chin Wang, Hsien-Chih She, Ron Hu:
A ROM-less direct digital frequency synthesizer by using trigonometric quadruple angle formula. 65-68 - Chua-Chin Wang, Hsien-Chih She, Ron Hu:
A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications. 69-72 - Vojkan Vidojkovic, Johan van der Tang, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund:
Analysis of an 1.8 - 2.5 GHz multi-standard high image-reject front-end. 73-76 - Stefano C. Di Pascoli, Luca Fanucci, F. Giusti, Bruno Neri, Domenico Zito:
A single-chip 1.8 GHz image reject RF receiver front-end with boot-strapped inductors. 77-80 - Rami F. Salem, Sherif H. Galal, M. Sameh Tawfik, Hani F. Ragaie:
A new highly linear CMOS mixer suitable for deep submicron technologies. 81-84 - Eric Kerhervé, Philippe Naud, Georges Germain, Pierre Jarry:
RF antenna matching methods for radar cross section measurements. 85-88 - Lampros Dermentzoglou, George Kamoulakos, Aggeliki Arapoyanni:
An extra low noise 1.8 GHz voltage controlled oscillator in 0.35 SiGe BiCMOS technology. 89-92 - Aleksandar Tasic, Wouter A. Serdijn:
Concept of quasi-capacitive tapping of bipolar voltage-controlled oscillators. 93-96 - Aleksandar Tasic, Wouter A. Serdijn:
K-rail diagrams - comprehensive tool for full performance characterization of voltage-controlled oscillators. 97-100 - Nikos Fragoulis, Ioannis Haritantis:
A low-voltage quadrature log-domain oscillator. 101-104 - Stefano C. Di Pascoli, Luca Fanucci, Bruno Neri, Domenico Zito:
A new differential LNA topology for wireless applications. 105-108 - Eric Kerhervé, Laurent Courcelle, Pierre Jarry:
Millimetric wave amplifier for single side band optical modulator. 109-112 - Giovanni Girlando, Giuseppe Ferla, Egidio Ragonese, Giuseppe Palmisano:
Silicon bipolar LNAs in the X and Ku bands. 113-116 - Nikos Naskas, Yannis Papananos:
Baseband predistorter for radio frequency power amplifiers based on a non-iterative, fast adaptation method. 117-120 - Marco Balsi, Francesco Centurelli, Salvatore Pennisi, Alessandro Trifiletti:
A tree-like amplifier architecture for large gain-bandwidth product. 121-124 - Andrew E. J. Ng, John I. Sewell:
Log-domain allpass group-delay equaliser design with XFILTER. 125-128 - Jan Vondras:
New way to design active filters with corrected group delay frequency response through EDE method. 129-132 - J. Vrbata, Milos Laipert, Miroslav Vlcek:
Synthesis of the group delay equalizers. 133-136 - B. M. Monge Sanz, Pedro A. Martínez Martínez, S. Celma-Pueyo:
A new CCII+ based biquad. 137-140 - Javier Lemus-López, Alejandro Díaz-Sánchez, Jaime Ramírez-Angulo:
An analog median filter with fuzzy adaptation. 141-144 - Georgi A. Nenov:
A complex lowpass-multipassband converter for synthesis of complex switched-current filters. 145-148 - Mirko Dozet, Nino Stojkovic:
Realization of the all-pole third-order transfer function. 149-152 - C. Cuypers, Voo Nyuk Yoong, Mykhaylo A. Teplechuk, John I. Sewell:
The general synthesis of complex analogue filters. 153-156 - Slawomir Koziel, Stanislaw Szczepanski:
Structure generation and performance comparison of canonical elliptic Gm-C filters. 157-160 - Slawomir Koziel, Stanislaw Szczepanski:
Sensitivity comparison of high-order all-pole Gm-C filters in canonical structures. 161-164 - Karel Hajek, Jirí Sedlácek:
General multiple LC prototype filter solutions and optimization. 165-168 - Debashis Dutta, Qadeer Ahmad Khan, Swapna Banerjee:
Design of continuous-time filter for hearing aid application using current conveyors. 169-172 - Shahram Minaei, Oguzhan Cicekoglu:
Current-mode multifunction filter using opamp compensation poles. 173-176 - Rosario Mita, Gaetano Palumbo, Salvatore Pennisi:
Hybrid nested Miller compensation with nulling resistors. 177-180 - Rosario Mita, Gaetano Palumbo, Salvatore Pennisi:
Comparison between Miller integrator cells using VOAs and CFOAs. 181-184 - Sherif Hammouda, Mohamed Tawfik, Hani F. Ragaie:
A 1.5 V opamp design with high gain wide bandwidth and its application in a high Q bandpass filter operating at 10.7 MHz. 185-188 - Luis Nero Alves, Rui L. Aguiar:
Frequency behavior of classical current mirrors [CMOS]. 189-192 - Jorge Guilherme, João C. Vital, José E. Franca:
A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dB. 193-196 - Andrzej Kielbasinski:
Another simple transistor-only lumped-distributed tunable low-pass filter. 197-200 - Aurencio Sanczczak Farias, Sidnei Noceti Filho, Rui Seara:
Transitional filters using linear interpolation with the filter selection based on the total mean weighting performance. 201-204 - Salma A. Ghoneim, Hossam M. A. Fahmy:
Specification of the DRM and the time for preventive maintenance for an aging resource. 205-208 - Drazen Jurisic, Neven Mijat, George S. Moschytz:
Low-power high-order band-pass active-RC allpole filters using a "lossy" LP-BP transformation. 209-213 - Cristian Ravariu, Florina Ravariu, Adrian Rusu, D. Dobrescu, Lidia Dobrescu, C. Popa, I. Chiran:
A new job for the pseudo-MOS transistor: working in the pressure sensors field. 215-218 - Davorin Ambrus, Vedran Bilas, Igor Lackovic:
Transducer interface for multichannel wired telemetry in high temperature environment. 219-222 - Vesna Rubezic, Budimir Lutovac, Radoje Ostojic:
Linear generalized synchronization of two chaotic Colpitts oscillators. 223-225 - Miroslav Husak:
Model of tilt sensor system. 227-230 - Haiqiao Xiao, Rolf Schaumann:
A low-voltage low-power CMOS 5-GHz oscillator based on active inductors. 231-234 - Montree Siripruchyanun, Paramote Wardkein:
A four-quadrant analog multiplier based on switched-capacitor and pulse-width amplitude modulation techniques. 235-238 - Marco Bucci, Lucia Germani, Raimondo Luzzi, Pasquale Tommasino, Alessandro Trifiletti, Mario Varanonuovo:
A high speed truly IC random number source for smart card microcontrollers. 239-242 - Emmanuel Zervakis, Nikos Haralabidis:
A fast 0.25um CMOS current-mode front-end stage for solid state detector interfaces. 243-246 - Ivan Grech, Joseph Micallef, Tanya Vladimirova:
Experimental results obtained from analog chips used for extracting sound localization cues. 247-251 - Carlos A. dos Reis Filho, Murilo Pilon Pessatti, João Paulo Cerquinho Cajueiro:
Analog triangular-to-sine converter using lateral-pnp transistors in CMOS process. 253-256 - Tolga Kaya, Ali Zeki:
A modified active current mirror suitable for current-mode algorithmic analog-to-digital converters. 257-260 - Miguel Angel Garcia-Andrade, Guillermo Espinosa Flores-Verdad, David Báez-López:
Harmonic distortion in switched current cells due to settling error. 261-264 - Octavian Fratu, Simona Halunga, Marius Vladan, Mehdi Bathaee:
Transient evolution for different strategies in the amplifier gain control. 265-268 - Pilar Molina-Gaudó, Francisco del Águìla López, Pere Palà-Schönwälder, Jesús Navarro Artigas:
Simple nonlinear large signal MOSFET model parameter extraction for class E amplifiers. 269-272 - Florin Constantinescu, Miruna Nitescu, Constantin Viorel Marin, Mihai Iordache, Lucia Dumitriu:
Implementation of 2D SPICE models for finding periodic steady state of strongly nonlinear RF-IC. 273-276 - Luis Nero Alves, Rui L. Aguiar:
Noise performance of classical current mirrors. 277-280 - Veljko Milanovic:
Multilevel beam SOI-MEMS fabrication and applications. 281-285 - Michael B. Cohn, Ryan Roehnelt, Ji-Hai Xu, Alexander Shteinberg, Steven Cheung:
MEMS packaging on a budget (fiscal and thermal). 287-290 - Brett Warneke, Kristofer S. J. Pister:
MEMS for distributed wireless sensor networks. 291-294 - Darrin J. Young:
Micromachined RF voltage-controlled oscillator with phase noise characterization. 295-298 - Van Tam Nguyen, Patrick Loumeau, Jean-François Naviner:
A time-interleaved chopper-stabilized delta-sigma analog to digital converter. 299-302 - Valentino Liberali, Roberto Rossi, Guido Torelli:
A multiplierless decimation filter for ΣΔ A/D conversion. 303-306 - Ivan John O'Connell, Colin Lyden:
A high pass switched capacitor ΣΔ modulator. 307-310 - Juan Jesús Ocampo Hidalgo, Alberto García Ortiz, Lukusa D. Kabulepa, Manfred Glesner:
Analysis of bandpass sigma-delta modulator architectures. 311-314 - Fan Lou, Seng-Pan U, Rui Paulo Martins:
N-path multirate sigma-delta modulator for high-frequency applications. 315-318 - Hossein Shamsi, Omid Shoaei:
A 160-MS/s six-order wideband bandpass sigma-delta modulator. 319-322 - Phanumas Khumsat, Apisak Worapishet, Alison J. Burdett:
FT-integrator in digital CMOS process for continuous-time ΣΔ modulator. 323-326 - Dag T. Wisland, Mats Erling Høvin, Tor Sverre Lande:
A second-order non-feedback ΔΣ modulator for D/A conversion. 327-330 - Dag T. Wisland, Mats Erling Høvin, Lars A. Fleischer, Tor Sverre Lande:
A new scalable non-feedback ΔΣ digital-to-analog converter. 331-334 - Ana Rusu, Hannu Tenhunen:
A multi-bit sigma-delta modulator for wideband applications. 335-338 - Adam Strak, Andreas Gothenberg, Hannu Tenhunen:
Analysis of clock jitter effects in wideband sigma-delta modulators for rf-applications. 339-342 - Chiheb Rebai, Dominique Dallet, Philippe Marchegay:
Digital sigma delta modulation for on chip signal generation. 343-346 - Fu-Kai Tsai, Hong-Yi Huang, Li-Kuo Dai, Cheng-Der Chiang, Ping-Kuo Weng, Yung-Chung Chin:
A time-delay-integration CMOS readout circuit for IR scanning. 347-350 - Patrick Pittet, Guo-Neng Lu, Aimad El Mourabit:
On-chip transimpedance preamplifier for CMOS BDJ optical detector using active enhanced impedance loads. 351-354 - Guo-Neng Lu, Patrick Pittet, Genaro Carrillo, Aimad El Mourabit:
On-chip synchronous detection for CMOS photodetector. 355-358 - Yamu Hu, Jean-François Gervais, Mohamad Sawan:
High power efficiency inductive link with full-duplex data communication. 359-362 - R. Magnani, Francesco Tinfena, V. Kempe, Luca Fanucci:
Mechanical stress measurement electronics based on piezo-resistive and piezo-Hall effects. 363-366 - Sakari Aaltonen, Janne Roos:
Simple reduced-order macromodels with PRIMA. 367-370 - Janusz Zarebski, Krzysztof Górecki:
On some properties of the convolution algorithms for the thermal analysis of semiconductor devices. 371-374 - Kuo-Hsing Cheng, Shun-Wen Cheng:
Influences of minimum cut plane properties on the mincut circuit partitioning problems. 375-379 - Rubén Fernández, Antonio J. López-Martín, Carlos Aristoteles De la Cruz-Blas, Alfonso Carlosena:
A 1V micropower FGMOS log-domain filter. 381-384 - Lubomír Brancík:
Improved method of numerical inversion of two-dimensional Laplace transforms for dynamical systems simulation. 385-388 - Salvatore Pennisi:
High accuracy CMOS capacitance multiplier. 389-392 - Iñigo Navarro, Antonio J. López-Martín, Carlos Aristoteles De la Cruz-Blas, Alfonso Carlosena:
A compact low-voltage four quadrant FGMOS multiplier. 393-396 - Srdjan Dragic, Martin Margala:
Application-specific low-voltage current amplifier for system-on-chip IDDQ test. 397-400 - Amir M. Sodagar, Khalil Najafi:
A wide-range supply-independent CMOS voltage reference for telemetry-powering applications. 401-404 - Salvatore Pennisi:
Using a low-voltage COA for high-performance voltage amplification. 405-408 - Rada Dragovic-Ivanovic, Zoran Mijanovic, Ljubisa Stankovic, Nedjeljko Lekic:
Optimal resistor ratio in the DAC with low precision resistors - statistical approach. 409-412 - Mary Sue Haydt, Samiha Mourad, William Terry, Janice Terry:
A new model for metastability. 413-416 - Ivan Blunno, Francesco Gregoretti, Claudio Passerone, D. Peretto, Leonardo M. Reyneri:
Designing low electro magnetic emissions circuits through clock skew optimization. 417-420 - Massimo Comparini, Andrea Di Pasquale, Marziale Feudale, Agostino Giorgio, Anna Gina Perri:
A method to design MMICs for high production yields. 421-424 - Chao Xu, Winslow Sargeant, Kenneth R. Laker, Jan Van der Spiegel:
An extended frequency range CMOS voltage-controlled oscillator. 425-428 - Hwang-Cherng Chow, I-Hsin Wang:
High performance automatic gain control circuit using a S/H peak-detector for ASK receiver. 429-432 - Ricardo Andres Aroca, Majid Ahmadi, R. Hashemian, Graham A. Jullien, William C. Miller:
A B-s complement continuous valued digit adder. 433-436 - Mehdi Bathaee, Calin Andrian-Albescu, Dragos Nicolae, Zed Moustoufi, Hamid Ghezel:
A full CMOS adaptive 3.3V/5V supply VCM/spindle controller with 9mA total current consumption in lock mode for high TPI and RPM of 8200 for 1" micro-drive, 1.8" drive, and 2.5" drive. 437-440 - Mahmoud Al-Qutayri:
Supply current monitor and set-up for fault detection in analogue circuits. 441-444 - Jaan Raik, Artur Jutman, Raimund Ubar:
Fast static compaction of tests composed of independent sequences: basic properties and comparison of methods. 445-448 - Aiman H. El-Maleh, Raslan H. Al-Abaji:
Extended frequency-directed run-length code with improved application to system-on-a-chip test data compression. 449-452 - Volker Meyer, Walter Anheier, Arne Sticht:
Non-robust delay test pattern enhancement. 453-456 - Carlos Guerrero, Guillermo Rodríguez-Navas, Julián Proenza:
Hardware support for fault tolerance in triple redundant CAN controllers. 457-460 - Aiman El-Maleh, Ali Al-Suwaiyan:
An efficient test relaxation technique for combinational circuits based on critical path tracing. 461-465 - San Lin, Samiha Mourad:
Embedded testing for data communications circuits. 467-470 - Haidar Harmanani, Rony Saliba:
An evolutionary algorithm for the testable allocation problem in high-level synthesis. 471-474 - Laurence Tianruo Yang, Jon C. Muzio:
Introducing redundant transformations for high level built-in self-testable synthesis. 475-479 - Davide De Caro, Ettore Napoli, Antonio G. M. Strollo:
ROM-less direct digital frequency synthesizers exploiting polynomial approximation. 481-484 - Costas Efstathiou, Haridimos T. Vergos, Dimitris Nikolos:
Ling adders in CMOS standard cell technologies. 485-488 - Rosario Mita, Gaetano Palumbo, Salvatore Pennisi, Massimo Poli:
A novel pseudo random bit generator for cryptography applications. 489-492 - Oscar Gustafsson, Lars Wanhammar:
Bit-level pipelinable general and fixed coefficient digit-serial/parallel multipliers based on shift-accumulation. 493-496 - Emmanuel Casseau:
SoC design using behavioral level virtual components. 497-500 - Mehdi Bathaee, Dragos Nicolae, Zed Moustoufi, Daniel Leonescu, Radu M. Udrea, Hamid Ghezel, Calin Andrian-Albescu, Ion Minca, Octavian Fratu:
A mixed-signal SOC signal processor that incorporates all the drive electronics in a single-chip. 501-504 - Weiwen Zhu, Zeljko Zilic, Radu Negulescu:
A single-rail handshake CDMA correlator. 505-508 - Luca Fanucci, Claudio Sicilia, Daniele Sicilia:
VLSI design of a high speed turbo decoder for 3rd generation satellite communication. 509-512 - M. Hollreiser, Christian Rosadini, D. Lo Iacono, Luca Fanucci:
Highly efficient wideband digital frequency demultiplexer. 513-516 - Atanu Chattopadhyay, Zeljko Zilic:
High speed asynchronous structures for inter-clock domain communication. 517-520 - Massimo Alioto, Giuseppe Di Cataldo, Gaetano Palumbo:
Design guidelines for bipolar frequency dividers. 521-524 - Marco Caldari, Massimo Conti, Paolo Crippa, Simone Orcioni, M. Solazzi, Claudio Turchetti:
Dynamic power management in an AMBA-based battery-powered system. 525-528 - Salvatore M. Carta, Luigi Raffo:
Processing time saving in low power voice coding applications using synchronous reconfigurable co-processing architecture. 529-532 - Antonio Blotti, Sergio Borghese, Roberto Saletti:
Single-inductor four-phase power-clock generator for positive-feedback adiabatic logic gates. 533-536 - Kyriakos S. Papadomanolakis, Athanasios P. Kakarountas, Nicolas Sklavos, Costas E. Goutis:
A low power fault secure timer implementation based on the Gray encoding scheme. 537-540 - Luca Fanucci, Sergio Saponara:
Data driven VLSI computation for low power DCT-based video coding. 541-544 - Janne Roos:
Development of simplex-based piecewise-linear approximations of nonlinear mappings. 545-548 - Ana Belén Abril García, Jean Gobert, Thomas Dombek, Habib Mehrez, Frédéric Pétrot:
Cycle-accurate energy estimation in system level descriptions of embedded systems. 549-552 - Konstantinos Tatas, D. J. Soudris, D. Siomos, Minas Dasygenis, Adonios Thanailakis:
A novel division algorithm for parallel and sequential processing. 553-556 - Nicolas Sklavos, Kyriakos Papadomanolakis, Paris Kitsos, Odysseas G. Koufopavlou:
Euclidean algorithm VLSI implementations. 557-560 - Ioannis Kouretas, Vassilis Paliouras:
High-radix modulo rn - 1 multipliers and adders. 561-564 - Khaled Grati, Adel Ghazel, Lirida A. B. Naviner:
Relaxed decimation filter specifications for wireless transceivers. 565-569 - Simone Orcioni, Massimo Conti, Claudio Turchetti, Angelo Centorame:
An 800 MHz 0.35 μm CMOS clock tree and PLL based on a new charge-pump circuit. 571-574 - Yngvar Berg, Øivind Næss, Snorre Aunet, Mats Høvin:
A novel floating-gate multiple-valued signal to binary signal converter. 575-578 - Yngvar Berg, Øivind Næss, Snorre Aunet, Johannes Goplen Lomsdalen, Mats Høvin:
A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic. 579-582 - Edward Gatt, Joseph Micallef, Edward H. S. Chilton:
Analogue radial basis function networks for phoneme recognition. 583-586 - Aleksandar Szabo, Zeljko Butkovic:
Static series-voltage noise margins of CBL, CSL and CMOS. 587-590 - Shugang Wei, Kensuke Shimizu:
Residue signed-digit arithmetic circuit with a complement of modulus and the application to RSA encryption processor. 591-594 - Djamel Chikouche, Raïs El'hadi Bekka, A. Boucenna:
Recursive filters using systolic architectures and switched capacitor techniques. 595-598 - Stefania Perri, Maria Antonia Iachino, Pasquale Corsonello:
Speed-efficient wide adders for VIRTEX FPGAs. 599-602 - Roselyne Chotin, Habib Mehrez:
A floating-point unit using stochastic arithmetic compliant with the IEEE-754 standard. 603-606 - Giacinto Paolo Saggese, Antonio G. M. Strollo, Nicola Mazzocca, Davide De Caro:
Shuffled serial adder: an area-latency effective serial adder. 607-610 - L. De Ambrogi, S. Nicosia, Giovanni Pagano, Gaetano Palumbo:
A high-performance buffer for non-volatile memories. 611-614 - Nikolaos Nastos, Yannis Papananos:
High frequency operation of a MOSFET under an integrated inductor's magnetic field. 615-618 - Gaetano Palumbo, Massimo Poli:
Propagation delay model of current driven RC chain. 619-622 - Oleg Maslennikow, Piotr Pawlowski, Przemyslaw Soltan, Robert Berezowski:
Current-mode digital gates and circuits: concept, design and verification. 623-626 - Ming Zhang, Nicolas Llaser:
Experimental results of an optimised voltage tripler. 627-630 - Milan Stork:
New Σ-Δ voltage to frequency converter. 631-634 - Hrvoje Markovic, Nikica Maric, Vladimir Ceperic, Adrijan Baric:
High-speed GaAs SCFL digital test structures. 635-639 - Mitsumasa Fujino, Vasily G. Moshnyaga:
An efficient Hamming distance comparator for low-power applications. 641-644 - Vincent Frick, Philippe Poure, Luc Hébrard, Freddy Anstotz, Francis Braun:
Design and prototyping of a CMOS standard contactless current measurement macrocell for integrated microsystems in power control applications. 645-648 - Damian Grzechca, Jerzy Rutkowski:
Adaptive algorithm for analog fault based on a sensitivity matrix and the fuzzy set theory. 649-652 - Boris Azenic, Nedjeljko Peric, Drazen Sliskovic:
Predictive control of water supply plant. 653-656 - Marius Padure, Sorin Cotofana, Stamatis Vassiliadis, Claudius Dan, Mircea Bodea:
A low-power threshold logic family. 657-660 - José M. Quintana, Maria J. Avedillo, Esther Rodríguez-Villegas, Adoración Rueda:
Threshold-logic-based design of compressors. 661-664 - Casper Lageweg, Sorin Cotofana, Stamatis Vassiliadis:
A full adder implementation using SET based linear threshold gates. 665-668 - Werner Prost, Samuel O. Kim, Peter Glösekötter, Christian Pacha, Holger van Husen, Thorsten Reimann, Karl F. Goser, Franz-Josef Tegude:
Experimental threshold logic implementations based on resonant tunnelling diodes. 669-672 - Peter M. Kelly, C. J. Thompson, T. M. McGinnity, Liam P. Maguire:
Investigation of a programmable threshold logic gate array. 673-676 - Wladyslaw Szczesniak:
Application of adaptive circuit partitioning algorithm to reduction of interconnections length between elements of VLSI circuit. 677-680 - Benyi Wang, Malgorzata Chrzanowska-Jeske, Garrison W. Greenwood:
ELF-SP - evolutionary algorithm for non-slicing floorplans with soft modules. 681-684 - Slawomir Koziel, Wladyslaw Szczesniak:
Application of adaptive evolutionary algorithm for low power design of CMOS digital circuits. 685-688 - Jerzy J. Dabrowski:
Efficient post-layout timing verification via RLC trees and explicit PWL timing integration. 689-692 - Martin Danek, Zdenek Muzikár:
Integrated timing-driven approach to the FPGA layout. 693-696 - Torsten Mahnke, Walter Stechele, Martin Embacher, Wolfgang Hoeld:
Impact of technology evolution on dual supply voltage scaling and gate resizing in power-driven logic synthesis. 697-700 - Torsten Mahnke, Sebastian Panenka, Martin Embacher, Walter Stechele, Wolfgang Hoeld:
Efficiency of dual supply voltage logic synthesis for low power in consideration of varying delay constraint strictness. 701-704 - Michael Eiermann, Walter Stechele:
Efficient power modeling techniques for combinational and sequential RTL macroblocks. 705-708 - Markus Hütter:
Designing universal logic modules. 709-712 - Satoshi Sugiyama, Makoto Ikeda, Kunihiro Asada:
Quick power supply noise estimation using hierarchically derived transfer functions. 713-716 - Christian Côté, Zeljko Zilic:
Automated SystemC to VHDL translation in hardware/software codesign. 717-720 - Marco Caldari, Massimo Conti, Paolo Crippa, Giuseppe Nuzzo, Simone Orcioni, Claudio Turchetti:
Instruction based power consumption estimation methodology. 721-724 - Mohamed A. Elgamel, Magdy A. Bayoumi:
On low power high level synthesis using genetic algorithms. 725-728 - Imed Ben Dhaou, Hannu Tenhunen:
HIPED: a tool for high-level power estimation of digital signal processing algorithms. 729-732 - Philippe Coussy, Adel Baganne, Eric Martin:
Virtual component IP re-use in telecommunication systems design: a case study of MPEG-2/JPEG2000 encoder. 733-736 - Massimo Alioto, Rosario Mita, Gaetano Palumbo:
Analysis and comparison of low-voltage CML D-latch. 737-740 - Sangjin Hong, Shu-Shin Chin, Suhwan Kim, Wei Hwang:
Multiplier architecture power consumption characterization for low-power DSP applications. 741-744 - Mariana Dumitrescu:
Stochastic Petri nets architectural modules for power system availability. 745-748 - Alexander Sudnitson:
Computational kernel extraction for synthesis of power-managed sequential components. 749-752 - Shengxian Zhuang, Weidong Li, Jonas Carlsson, Kent Palmkvist, Lars Wanhammar:
Asynchronous data communication with low power for GALS systems. 753-756 - Timo Palenius, Janne Roos, Sakari Aaltonen:
Development and comparison of reduced-order interconnect macromodels for time-domain simulation. 757-760 - Qingjian Yu, Ernest S. Kuh:
Accurate reduced RL model for frequency dependent transmission lines. 761-764 - Armin Windschiegl, Torsten Mahnke, Michael Eiermann, Walter Stechele, Paul Zuber:
A wire load model considering metal layer properties. 765-768 - Hong-Yi Huang, Shih-Lun Chen:
High-speed receivers for on-chip interconnections in deep-submicron process. 769-772 - Patricia Renault, Pirouz Bazargan-Sabet, Dominique Le Dû:
A MOS transistor model for peak voltage calculation of crosstalk noise. 773-776 - Gabriel Oltean, Costin Miron, Emilia Mocean:
Multiobjective optimization method for analog circuits design based on fuzzy logic. 777-780 - Jian Liu, Ying Zhao, Eugene Shragowitz, George Karypis:
A polynomial time approximation scheme for rectilinear Steiner minimum tree construction in the presence of obstacles. 781-784 - Luis Hernández-Martínez, Arturo Sarmiento-Reyes:
Properties of the pair of conjugate trees (t'-t"). 785-788 - Jozef Petrek:
A new assignment algorithm for star network topology design. 789-792 - Yaser M. A. Khalifa:
Design centering of analog circuits using GA and the regionalization method. 793-796 - Erhan Yildiz, Chris J. M. Verhoeven, Arie van Staveren, Miguel Ángel Gutiérrez de Anda, Arturo Sarmiento-Reyes, Luis Hernández-Martínez:
INTER: a graph tool for the smart placement of bias sources in negative feed-back amplifiers. 797-800 - Reiner W. Hartenstein:
Trends in reconfigurable logic and reconfigurable computing. 801-808 - Jürgen Becker:
Configurable systems-on-chip: commercial and academic approaches. 809-812 - Michael Herz, Reiner W. Hartenstein, Miguel Miranda, Erik Brockmeyer, Francky Catthoor:
Memory addressing organization for stream-based reconfigurable computing. 813-817 - Bob Plunkett, David Chou:
Computational efficiency: adaptive computing vs. ASICs. 819-822 - Juha Alakarhu, Jarkko Niittylahti:
A comparison of precharge policies with modern DRAM architectures. 823-826 - Chua-Chin Wang, Po-Ming Lee, Kuo-Long Chen:
6-T SRAM using dual threshold voltage transistors and low-power quenchers. 827-830 - Vasily G. Moshnyaga:
Reducing energy dissipation of video memory by adaptive bit-width compression. 831-834 - Sreedhar Natarajan, Andrew Marshall:
SOI SRAM design advances & considerations. 835-838 - Mehdi Bathaee, Zed Mostoufi, Hamid Ghezelayagh, Anahita Afkham:
A 2.0 GHz 4 Mb pseudo-SRAM with on-chip BIST for refresh in 0.18u CMOS technology with LVDS output data bus drivers. 839-841 - Kostas Berberidis:
An efficient partitioning-based scheme for 2-D convolution and application to image registration. 843-846 - Mohamed R. M. Rizk, A. Taha:
Analysis of neural networks for face recognition systems with feature extraction to develop an eye localization based method. 847-850 - Zeljka Mihajlovic, Leo Budin, Zoran Kalafatic:
Volume rendering with least squares spline reconstruction. 851-854 - Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni:
Embedded IWT evaluation in reconfigurable wireless sensor network. 855-858 - A. Das, Uday B. Desai, Priya P. Vaidya:
A new scale adaptive wavelet thresholding method for denoising using chi-square test statistic. 859-862 - Eftychios V. Papoulis, Tania Stathaki:
Design and convergence analysis of a multirate structure for adaptive filtering. 863-866 - Mokhtar Nibouche, Omar Nibouche:
Design and implementation of a wavelet block for signal processing applications. 867-870 - Rastislav Lukac, Viktor Fischer, Milos Drutarovský:
3-D adaptive LUM smoother based on reduced set of smoothing levels. 871-874 - Hichem Besbes, Sofia Ben Jebara:
The pre-whitened NLMS: a promising algorithm for acoustic echo cancellation. 875-878 - Mihai Iordache, Lucia Dumitriu, Florin Constantinescu, Miruna Nitescu:
Tearing techniques for symbolic simulation of large-scale analog circuits. 879-882 - Georgi M. Dimirovski, Yuanwei Jing, Jun Zhao, Tatjana D. Kolemisevska-Gugulovska:
On complex non-linear systems with symmetries: controllability preserving decomposition. 883-886 - Yuanwei Jing, Georgi M. Dimirovski, Jun Zhao, Mile J. Stankovski:
Decomposition of complex linear systems via hierarchical similarity structure. 887-890 - Dimitrios Soudris, Minas Dasygenis, K. Mitroglou, Konstantinos Tatas, Adonios Thanailakis:
A full adder based methodology for scaling operation in residue number system. 891-894 - Alberto Carini, Giovanni L. Sicuranza:
Implementation issues for V-vector algebra. 895-898 - Gordana Jovanovic-Dolecek, Javier Díaz-Carmona:
One structure for wide-bandwidth and high-resolution fractional delay filter. 899-902 - Gordana Jovanovic-Dolecek, Sanjit K. Mitra:
Symbolic sensitivity analysis of digital filter structures using MATLAB. 903-906 - Chiheb Rebai, Dominique Dallet, Philippe Marchegay:
LDI filter bank for ADC frequency domain analysis. 907-910 - Pavol Zavarsky, Masahiro Kamiya, Noriyoshi Kambayashi:
Eigenvalue approach to analysis of performance of non-orthogonal perfect reconstruction filter banks in signal reconstruction applications. 911-914 - Linnéa Svensson, Per Löwenborg, Håkan Johansson:
A class of cosine-modulated causal IIR filter banks. 915-918 - Dariusz Idczak, Marek Majewski, Stanislaw Walczak:
N-dimensional continuous systems with the Darboux-Goursat and Dirichlet boundary data. 919-922 - Krzysztof Galkowski:
LMI based stability analysis for 2D continuous systems. 923-926 - Rudolf Rabenstein, Lutz Trautmann:
Digital sound synthesis based on multidimensional system theory. 927-930 - Tadeusz Kaczorek:
Holdability and stabilizability of 2D Roesser model. 931-934 - Jerzy Klamka:
Controllability of linear 2-D systems. 935-938 - Osama Alshibami, Said Boussakta:
Decimation-in-frequency vector radix algorithm for fast calculation of the 2-D NMNT. 939-942 - Mohammed Aziz, Said Boussakta, Desmond C. McLernon:
Parallelisation of the 1-D block filter algorithm to run on multiple DSPs. 943-946 - Jarmo Takala, Jari Nikara, Konsta Punkka:
Pipeline architecture for two-dimensional discrete cosine transform and its inverse. 947-950 - Omar Nibouche, Mokhtar Nibouche:
On designing digit multipliers. 951-954 - Takenobu Matsuura, Kazuya Mori:
Rotation invariant seal imprint verification method. 955-958 - Tadashi Suetsugu, Marian K. Kazimierczuk:
A prediction method of the ZVS condition of class E amplifier at any duty ratio. 959-962 - Karl H. Edelmoser, Felix A. Himmelstoss:
Control strategy of a solar power inverter (analysis of a seventh order system-II). 963-966 - Jirí Novák, A. Fried, M. Vacek:
CAN generator and error injector. 967-970 - Cristina Morel, Jean-Claude Guignard, Michel Guillet:
Sliding mode control of DC-to-DC power converters. 971-974 - I. Flegar, D. Pelin, D. Zacek:
Bifurcation diagrams of the buck converter. 975-978 - Mircea V. Nemescu, Dorin Dumitru Lucache:
Self-modulation in SISO nonlinear systems with inertial damping described by Duffing equation. 979-982 - Yuji Hidaka, Hisato Fujisaka, Masahiro Sakamoto, Mititada Morisue:
Piecewise linear operations on sigma-delta modulated signals. 983-986 - Michal Tadeusiewicz, Stanislaw Halgas:
Determining multi-valued input-output characteristics in the circuits containing bipolar transistors. 987-990 - Slavica M. Perovich, Sanja I. Bauk, R. Kulic:
The special trans function theory to the AM detector transfer factor analytical analysis. 991-994 - Shi-Huang Chen, Jhing-Fa Wang:
A wavelet-based voice activity detection algorithm in noisy environments. 995-998 - Chieh-Yi Huang, Hsien-Chang Wang, Jhing-Fa Wang:
Voice activity detection using haircell model in noisy environment. 999-1002 - Cristian Negrescu:
Optimization algorithm for the MP-MLQ excitation in G723.1 encoder. 1003-1006 - Braham Barkat, Ljubisa Stankovic:
Robust PWVD for the analysis of polynomial FM signals in non-Gaussian noise. 1007-1010 - Igor Djurovic, Ljubisa Stankovic, Johann F. Böhme:
Robust two-dimensional DFT. 1011-1014 - Krzysztof Sozanski:
Implementation of modified wave digital filters using digital signal processors. 1015-1018 - George A. Triantafyllidis, Dimitrios Tzovaras, Michael G. Strintzis:
Detection of occlusion and visible background and foreground areas in stereo image pairs. 1019-1022 - Vladimir Katkovnik, Ljubisa Stankovic:
High-resolution data-adaptive time-frequency analysis. 1023-1026 - Dimitrios Simitopoulos, Sotirios A. Tsaftaris, Nikolaos V. Boulgouris, Michael G. Strintzis:
Fast MPEG watermarking for copyright protection. 1027-1030 - Radu Ciprian Bilcu, Pauli Kuosmanen, Karen O. Egiazarian:
A new variable length LMS algorithm: theoretical analysis and implementations. 1031-1034 - Chunjiang J. Duanmu, M. Omair Ahmad, M. N. S. Swamy, Ali M. Shatnawi:
Optimization of the three-step search algorithm by exclusion of stationary macroblocks from the search process. 1035-1038 - Nedjeljko Lekic, Zoran Mijanovic, Desa Gobovic, Rada Dragovic-Ivanovic:
The simple multiprocessor communication system. 1039-1042 - Mohamad M. Ayoub, Mohamed R. M. Rizk:
Optimized bi-directional frequency plan for microwave video and data distribution system "MVDDS". 1043-1046 - Petros Nicopolitidis, Georgios I. Papadimitriou, Mohammad S. Obaidat, Andreas S. Pomportsis:
3G wireless systems and beyond: a review. 1047-1050 - Jianhua He, Zongkai Yang, Daiqin Yang, Zuoyin Tang, Jing Hu, Chun Tung Chou:
Analysis and representation of statistical performance of JPEG2000 encoded image over wireless channels. 1051-1054 - Marco Balsi, Francesco Centurelli, Salvatore Pennisi, Alessandro Trifiletti:
Bipolar differential cell with improved bandwidth performance. 1055-1058 - Jürgen Assfalg, Marco Bertini, Alberto Del Bimbo, Walter Nunziati, Pietro Pala:
Detection and recognition of football highlights using HMM. 1059-1062 - Jörn Jachalsky, M. Wahle, Peter Pirsch, Winfried Gehrke:
A flexible, fully configurable architecture for MPEG-2 video encoding. 1063-1066 - Igor Djurovic, Srdjan Stankovic, Akira Ohsumi, Hiroshi Ijima:
Estimation of line parameters using SLIDE algorithm and TF representations. 1067-1070 - Sihem Guemara El Fatmi, Noureddine Boudriga, Mohammad S. Obaidat:
Quality of service provision in high-speed networks: an active approach. 1071-1074 - Drago Zagar:
Formal specification of QoS parameters by hierarchical tree structure. 1075-1078 - Petros Nicopolitidis, Georgios I. Papadimitriou, Mohammad S. Obaidat, Andreas S. Pomportsis:
Performance evaluation of a TDMA-based randomly addressed polling protocol for wireless LANs. 1079-1082 - Chun Chian Lu:
Interference cancellation in multi-path CDMA systems. 1083-1086 - Abdelmonaem Lakhzouri, Djordje Babic, Markku Renfors:
Signal processor implementation of decimation filters in flexible receivers. 1087-1090 - Kostas Berberidis:
Block subspace updating algorithms for tracking directions of coherent signals in SDMA mobile systems. 1091-1094 - Florean Curticapean, Jarkko Niittylahti:
Direct digital frequency synthesizers of high spectral purity based on quadratic approximation. 1095-1098 - Michael J. Thul, Frank Gilbert, Norbert Wehn:
Optimized concurrent interleaving architecture for high-throughput turbo-decoding. 1099-1102 - Luca Fanucci, Alessandro Renieri, Pierangelo Terreni:
VLSI design of a routing switch for the SpaceWire serial link standard. 1103-1106 - Nikos Naskas, Yannis Papananos:
Adaptive baseband predistorter for radio frequency power amplifiers based on a multilayer perceptron. 1107-1110 - Rui L. Aguiar, Monica Figueiredo:
Resource constrained clock recovery on programmable logic devices. 1111-1114 - Johan Bauwelinck, Yves Martens, X. Z. Qui, Peter Ossieur, K. Noldus, Jan Vandewege, Edith Gilon-de Lumley, P. De Meulenaere, A. Ingrassia:
Design of a generic and high performance CMOS burst mode laser driver. 1115-1118 - Josef Dobes:
Nonstandard sensitivity analyses in frequency and time domains. 1119-1122 - Jean-Baptiste Kammerer, Luc Hébrard, Vincent Frick, Philippe Poure, Francis Braun:
Design and modelling of a voltage controlled N-well resistor using the MOS tunneling diode structure. 1123-1126 - Li Yang, J. S. Yuan, M. Hagedorn:
Modeling the output waveform of CMOS gate with feedback effect. 1127-1130 - Mohamed Lamine Tounsi, Abdelhamid Khodja, Brahim Haraoubia:
Full-wave analysis of arbitrarily multilayered planar structures by the method of lines. 1131-1134 - Ulrich Kleine, Lihong Zhang, Markus Wolf:
Mismatch optimization for analog circuits using the DesignAssistant. 1135-1138 - Janne Roos, Martti Valtonen, Jarmo Virtanen:
Implementation of piecewise-linear DC analysis in APLAC. 1139-1142 - Sandra Dominikus:
A hardware implementation of MD4-family hash algorithms. 1143-1146 - Nicolas Sklavos, Paris Kitsos, Odysseas G. Koufopavlou:
VLSI implementation of password (PIN) authentication unit. 1147-1150 - Paris Kitsos, Nicolas Sklavos, Odysseas G. Koufopavlou:
An efficient implementation of the digital signature algorithm. 1151-1154 - Erkay Savas, Çetin Kaya Koç:
Architectures for unified field inversion with applications in elliptic curve cryptography. 1155-1158 - Thomas J. Wollinger, Christof Paar:
Hardware architectures proposed for cryptosystems based on hyperelliptic curves. 1159-1162 - Ya Jun Yu, Yong Ching Lim:
Genetic algorithm approach for the optimization of multiplierless sub-filters generated by the frequency-response masking technique. 1163-1166 - Juha Yli-Kaakinen, Tapio Saramäki:
Multiplier-free polynomial-based FIR filters with an adjustable fractional delay. 1167-1170 - Oscar Gustafsson, Lars Wanhammar:
ILP modelling of the common subexpression sharing problem. 1171-1174 - Wei Rong Lee, Volker Rehbock, Kok Lay Teo, Lou Caccetta:
Frequency-response masking based FIR filter design with power-of-two coefficients and optimum PWR. 1175-1178 - Daniel Foty, Matthias Bucher, David M. Binkley:
Re-interpreting the MOS transistor via the inversion coefficient and the continuum of gms/Id. 1179-1182 - Matthias Bucher, Dimitrios Kazazis, François Krummenacher, David M. Binkley, Daniel Foty, Yannis Papananos:
Analysis of transconductances at all levels of inversion in deep submicron CMOS. 1183-1186 - Edin Sijercic, Branimir Pejcinovic:
Comparison of non-linear MESFET models. 1187-1190 - Tomislav Suligoj, Marko Koricic, Petar Biljanovic:
High-frequency analysis of SOI lateral bipolar transistor (LBT) structure for RF analog applications. 1191-1194 - Francesco Carrara, Tonio Biondi, Antonino Scuderi, Giuseppe Palmisano:
Degradation of the DC current capability in long-emitter bipolar transistors. 1195-1198 - Egidio Ragonese, Giovanni Girlando, Giuseppe Palmisano:
A very accurate design of monolithic inductors in a 2D EM simulator. 1199-1202 - Panagiotis Papageorgas, Dimitris Maroulis, Hansjörg Albrecht, Bernd Wagner, Giorgos Anagnostopoulos, Marc Schurr, Nikiforos G. Theofanous, Arianna Menciassi, Christian D. Depeursinge:
The data-acquisition, processing and control system of a micromirror-based laser-scanning endoscope. 1203-1206 - Giorgos Anagnostopoulos, Bernd Wagner, Panagiotis Papageorgas, U. Hofmann, Dimitris Maroulis, Nikiforos G. Theofanous:
The electronics of a control system for micromirrors in a laser-scanning device. 1207-1210 - K. Y. Kwan, Karan V. I. S. Kaler, Martin P. Mintchev:
High-pressure balloon catheter for real-time pressure monitoring in the esophagus. 1211-1214 - Sakari Junnila, Jarkko Ruoho, Jarkko Niittylahti:
Medical isolation of universal serial bus data signals. 1215-1218 - Hao Yin, Guangxi Zhu, De-Hong Wang, Yu Liu, Fang-Yu Zhu:
An adaptive real-time multimedia distance learning system based on computer supported collaborative work. 1219-1222 - Artur Jutman, Raimund Ubar, Vladimir Hahanov, O. Skvortsova:
Practical works for on-line teaching design and test of digital circuits. 1223-1226 - Hana Kubátová, Radek Jelinek:
Digital testing and reliability education (DTRE) computer tool. 1227-1230 - Ivan Skuliber, Sinisa Srbljic, Andro Milanovic:
Extending the textbook: a distributed tool for learning automata theory fundamentals. 1231-1234 - Laurentiu Frangu, Claudiu Chiculita:
Remote laboratory allowing full-range student-designed control algorithm. 1235-1238 - Daniel Batas, Klaus Schumacher:
An integrated analog-CMOS control system for low-cost applications. 1239-1242 - Drazen Brscic, Ivan Petrovic, Nedjeljko Peric:
ATM available bit rate congestion control with on-line network model identification. 1243-1246 - Ivan Branica, Ivan Petrovic, Nedjeljko Peric:
Toolkit for PID dominant pole design. 1247-1250 - Zoltán Nagy, Péter Szolgay:
Configurable multi-layer CNN-UM emulator on FPGA using distributed arithmetic. 1251-1254 - Domenico Porto, F. Morabito, Marco Branciforte, Antonino Calabrò:
A neuro-fuzzy approach for hardware modeling of nuclear fusion reactors plasma. 1255-1258 - Péter Kozma, Balázs Kránicz, Péter Szolgay:
Colour space transformation, colour correction and exact colour reproduction with CNN technology. 1259-1262 - Józef Drabarek, Robert T. Wirski, Wieslaw Madej:
Genetic algorithms applied to hybrid expert systems. 1263-1266 - Mohammad S. Sharawi, James Quinlan, Hoda S. Abdel-Aty-Zohdy:
A hardware implementation of genetic algorithms for measurement characterization. 1267-1270
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