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IRPS 2015: Monterey, CA, USA
- IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015. IEEE 2015, ISBN 978-1-4673-7362-3
- Kris Croes, Deniz Kocaay, Ivan Ciofi, Jürgen Bömmels, Zsolt Tökei:
Impact of process variability on BEOL TDDB lifetime model assessment. 5 - Adrian Evans, Dan Alexandrescu, Veronique Ferlet-Cavrois, Kay-Obbe Voss:
Techniques for heavy ion microbeam analysis of FPGA SER sensitivty. 6 - Li Chieh Hsu, Yu-Min Lin, Chien Liang Wu, Wei Kun Lee, Yen Chun Liu, Cheng Pu Chiu, Hsin Kuo Hsu, Chun Yi Wang, Chien Chung Huang, Chin Fu Lin:
Effects of copper CMP and post clean process on VRDB and TDDB at 28nm and advanced technology node. 3 - Fen Chen, Carole Graas, Michael A. Shinosky, Chad Burke, Kai D. Feng, Craig Bocash, Ramachandran Muralidhar:
A method for rapid screening of various low-k TDDB models. 3 - Taiki Uemura, Takashi Kato, Hideya Matsuyama, Masanori Hashimoto
:
Impact of package on neutron induced single event upset in 20 nm SRAM. 9 - Miaomiao Wang, Zuoguang Liu, Tenko Yamashita, James H. Stathis, Chia-Yu Chen:
Separation of interface states and electron trapping for hot carrier degradation in ultra-scaled replacement metal gate n-FinFET. 4 - Md. Enamul Kabir, Dave Young, Bahattin Kilic, Ioan Sauciuc, Carl Sapp, Gerald S. Leatherman:
Package induced stress impact on transistor performance for ultra-thin SoC. 5 - Ketul B. Sutaria, Pengpeng Ren, Abinash Mohanty
, Xixiang Feng, Runsheng Wang, Ru Huang, Yu Cao
:
Duty cycle shift under static/dynamic aging in 28nm HK-MG technology. 7 - G. Sereni, Luca Vandelli, Roberto Cavicchioli
, Luca Larcher
, Dmitry Veksler, Gennadi Bersuker:
Substrate and temperature influence on the trap density distribution in high-k III-V MOSFETs. 2 - Fen Chen, Erik McCullen, Cathryn Christiansen, Michael A. Shinosky, Roger Dufresne, Prakash Periasamy, Rick Kontra, Carole Graas, Gary StOnge:
Diagnostic electromigration reliability evaluation with a local sensing structure. 2 - N. Tam, Bharat L. Bhuva, Lloyd W. Massengill, Dennis R. Ball, Michael W. McCurdy, Michael L. Alles, Indranil Chatterjee
:
Multi-cell soft errors at the 16-nm FinFET technology node. 4 - Robert M. Shelby, Geoffrey W. Burr, Irem Boybat
, Carmelo di Nolfo:
Non-volatile memory as hardware synapse in neuromorphic computing: A first look at reliability issues. 6 - Bruce M. Paine
, Vincent T. Ng, Steve R. Polmanter, Neil T. Kubota, Carl R. Ignacio:
Degradation rate for surface pitting in GaN HEMT. 1 - Gilles Gasiot, Dimitri Soussan, Jean-Luc Autran, Victor Malherbe, Philippe Roche:
Muons and thermal neutrons SEU characterization of 28nm UTBB FD-SOI and Bulk eSRAMs. 2 - Hussam Amrouch
, Javier Martín-Martínez, Victor M. van Santen
, Miquel Moras
, Rosana Rodríguez, Montserrat Nafría
, Jörg Henkel:
Connecting the physical and application level towards grasping aging effects. 3 - Hai Jiang, Longxiang Yin, Yun Li, Nuo Xu, Kai Zhao, Yandong He, Gang Du, Xiaoyan Liu, Xing Zhang:
Comprehensive understanding of hot carrier degradation in multiple-fin SOI FinFETs. 6 - Tian Shen, Wenyi Zhang, Kong Boon Yeap, Jing Tan, Walter Yao, Patrick Justison:
An investigation of dielectric thickness scaling on BEOL TDDB. 3 - Chandrasekharan Kothandaraman, X. Chen, Dan Moy, Dallas Lea
, Sami Rosenblatt, Faraz Khan, Derek Leu, Toshiaki Kirihata, D. Ioannou, Giuseppe La Rosa, Jeffrey B. Johnson, Norman Robson, Subramanian S. Iyer:
Oxygen vacancy traps in Hi-K/Metal gate technologies and their potential for embedded memory applications. 2 - Christine S. Hau-Riege, You-Wen Yau, Kevin Caffey, Rajneesh Kumar, YangYang Sun, Andy Bao, Milind Shah, Lily Zhao, Omar Bchir, Ahmer Syed, Steve Bezuk:
The electromigration behavior of copper pillars for different current directions and pillar shapes. 5 - Jian-Hsing Lee, Manjunatha Prabhu, Konstantin Korablev, Jagar Singh, Mahadeva Iyer Natarajan, Shesh Mani Pandey:
Methodology to achieve planar technology-like ESD performance in FINFET process. 3 - Kaizad Mistry:
Keynote Address 1: "Transistors and reliability in the innovation era". 1 - Sukeshwar Kannan, Rahul Agarwal, Arnaud Bousquet, Geetha Aluri, Hui-Shan Chang:
Device performance analysis on 20nm technology thin wafers in a 3D package. 4 - Yury Illarionov
, Michael Waltl
, Anderson D. Smith, Sam Vaziri, Mikael Östling
, Thomas Mueller
, Max Christian Lemme
, Tibor Grasser
:
Hot-carrier degradation in single-layer double-gated graphene field-effect transistors. 2 - David Huitink, Alan Lucero:
Semi-empirical stress/energy-based acceleration of temperature cycling failure. 5 - Hiroko Mori, Taiki Uemura, Hideya Matsuyama, Shin-ichiro Abe, Yukinobu Watanabe:
Critical charge dependence of correlation of different neutron sources for soft error testing. 2 - Mukta G. Farooq, Giuseppe La Rosa, Fen Chen, Prakash Periasamy, Troy L. Graves-abe, Chandrasekharan Kothandaraman, C. Collins, W. Landers, J. Oakley, J. Liu, John Safran, S. Ghosh, S. Mittl, D. Ioannou, Carole Graas, Daniel Berger, Subramanian S. Iyer:
Impact of 3D copper TSV integration on 32SOI FEOL and BEOL reliability. 4 - Brent Keeth:
Keynote Address 2: "Hybrid memory cube: Achieving high performance and high reliability". 1 - Alex Guo, Jesús A. del Alamo:
Positive-bias temperature instability (PBTI) of GaN MOSFETs. 6 - Christoforos G. Theodorou
, Eleftherios G. Ioannidis
, Sébastien Haendler, Nicolas Planes, Emmanuel Josse, Charalambos A. Dimitriadis, Gérard Ghibaudo
:
New LFN and RTN analysis methodology in 28 and 14nm FD-SOI MOSFETs. 1 - Saroj Satapathy, Won Ho Choi, Xiaofei Wang, Chris H. Kim:
A revolving reference odometer circuit for BTI-induced frequency fluctuation measurements under fast DVFS transients. 6 - Steven W. Mittl, Fernando Guarin:
Self-heating and its implications on hot carrier reliability evaluations. 4 - Gregor Pobegen, Andreas Krassnig:
Instabilities of SiC MOSFETs during use conditions and following bias temperature stress. 6 - Wei Wu, Norbert Seifert:
MBU-Calc: A compact model for Multi-Bit Upset (MBU) SER estimation. 2 - Kashi Vishwanath Machani, Holm Geisler, Dirk Breuer, Frank Kuechenmeister, Jens Paul:
Mechanical reliability assessment of 28nm Back End of Line (BEoL) stack using finite element analysis and validation. 1 - Emily Ray, Barry P. Linder, Raphael Robertazzi, Kevin Stawiasz, Alan J. Weger, Emmanuel Yashchin, James H. Stathis, Peilin Song:
Analyzing path delays for accelerated testing of logic chips. 6 - Wardhana A. Sasangka, Govindo J. Syaranamual, Chee Lip Gan
, Carl V. Thompson:
Origin of physical degradation in AlGaN/GaN on Si high electron mobility transistors under reverse bias stressing. 6 - Matthias Wespel, Maximilian Dammann, Vladimir Polyakov, Richard Reiner, Patrick Waltereit, B. Weiss, Rüdiger Quay
, Michael Mikulla, Oliver Ambacher:
High-voltage stress time-dependent dispersion effects in AlGaN/GaN HEMTs. 2 - Ryo Kishida, Azusa Oshima, Kazutoshi Kobayashi:
Negative bias temperature instability caused by plasma induced damage in 65 nm bulk and Silicon on thin BOX (SOTB) processes. 2 - Ankur Aggarwal, Enamul Kabir, David Huitink, Nipun Sinha, Emre Armagan, Keqin Cao:
Coupled accelerated stress tests for comprehensive field reliability - Synergistic effects of moisture and temperature cycling. 6 - Nilesh Goel
, Tejas Naphade, Souvik Mahapatra:
Combined trap generation and transient trap occupancy model for time evolution of NBTI during DC multi-cycle and AC stress. 4 - Norbert Seifert, Shah M. Jahinuzzaman, Jyothi Velamala, Nikunj Patel:
Susceptibility of planar and 3D tri-gate technologies to muon-induced single event upsets. 2 - Yu-Chien Chiu, Chun-Yen Chang, Hsiao-Hsuan Hsu, Chun-Hu Cheng, Min-Hung Lee
:
Impact of nanoscale polarization relaxation on endurance reliability of one-transistor hybrid memory using combined storage mechanisms. 3 - Sheng-Fu Hsu, Jer-Yuan Jao:
A novel 8kV on-chip surge protection design in xDSL line driver IC. 3 - Jongwoo Park, Miji Lee, Hanbyul Kang, Wooram Ko, Eunkyeong Choi, Junsik Im, Minwoo Lee, Dohwan Chung, Jinchul Park, Sangchul Shin, Sangwoo Pae:
Effects of front-end-of line process variations and defects on retention failure of flash memory: Charge loss/gain mechanism. 2 - Toshihide Kikkawa, Tsutomu Hosoda, Ken Shono, Kenji Imanishi, Yoshimori Asai, YiFeng Wu, Likun Shen, Kurt Smith, Dixie Dunn, Saurabh Chowdhury, Peter Smith, John Gritters, Lee McCarthy, Ronald Barr, Rakesh Lal, Umesh K. Mishra, Primit Parikh:
Commercialization and reliability of 600 V GaN power switches. 6 - M. N. Chang, Y.-H. Lee, S. Y. Lee, C. C. Chiu, D. Maji, K. Wu:
An investigation of capacitance aging model for extreme low-k and high-k dielectrics. 3 - Amr Haggag, Nik Sumikawa, Aamer Shaukat, J. K. Jerry Lee, Nick Aghel, Charlie Slayman:
Mitigating "No trouble found" component returns. 3 - Ephraim Suhir, A. Bensoussan, Golta Khatibi, Johann Nicolics:
Probabilistic design for reliability in electronics and photonics: Role, significance, attributes, challenges. 5 - David Burnett, Sriram Balasubramanian, Vivek Joshi, Sanjay Parihar, Jack M. Higman, C. Weintraub:
SRAM Vmax stability considerations. 6 - Jongwoo Park, Miji Lee, Kyunghwan Min, J.-K. Choi, Changkyu Joo, S.-C. Park, Hanbyul Kang, Sangwoo Pae:
Reliability of fine pitch COF: Influence of surface morphology and CuSn intermetallic compound formation. 4 - Kong Boon Yeap, Tian Shen, Galor Wenyi Zhang, Sing Fui Yap, Brian Holt, Arfa Gondal, Seungman Choi, San Leong Liew, Walter Yao, Patrick Justison:
Impact of electrode surface modulation on time-dependent dielectric breakdown. 2 - Hyunsuk Chun, In Hak Baick, Sangsu Ha, Eunmi Kwon, Seungbae Lee, Seil Kim, Sangwoo Pae, Jongwoo Park:
CPI reliability and EMI benefit for MIM CAP embedded C4 package. 5 - L. D. Chen, B. L. Lin, M.-H. Hsieh, C. W. Chang, J. S. Tsai, J. C. Peng, C. C. Chiu, Y.-H. Lee:
Study of a new electromigration failure mechanism by novel test structure. 2 - Umberto Celano
, Ludovic Goux, Attilio Belmonte, Karl Opsomer, Christophe Detavernier, Malgorzata Jurczak, Wilfried Vandervorst:
Conductive filaments multiplicity as a variability factor in CBRAM. 11 - Tian-Li Wu
, Denis Marcon, Brice De Jaeger, Marleen Van Hove, Benoit Bakeroot
, Steve Stoffels
, Guido Groeseneken
, Stefaan Decoutere, Robin Roelofs:
Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs. 6 - William J. Song
, Saibal Mukhopadhyay, Sudhakar Yalamanchili:
Managing performance-reliability tradeoffs in multicore processors. 3 - Stefano Ambrogio, Simone Balatti, Zhongqiang Wang, Yu-Sheng Chen, Heng-Yuan Lee, Frederick T. Chen, Daniele Ielmini:
Data retention statistics and modelling in HfO2 resistive switching memories. 7 - Xiaoyu Tang, J. Lu, Rui Zhang, Yi Zhao, Wangran Wu, Chang Liu, Yi Shi, Ziqian Huang, Yuechan Kong:
PBTI and HCI degradations of ultrathin body InGaAs-On-Insulator nMOSFETs fabricated by wafer bonding. 7 - Phil Oldiges, Kenneth P. Rodbell, Michael S. Gordon, John G. Massey, Kevin Stawiasz, Conal E. Murray, Henry H. K. Tang, K. Kim, K. Paul Muller:
SOI FinFET soft error upset susceptibility and analysis. 4 - Victor Malherbe, Gilles Gasiot, Dimitri Soussan, Aurelien Patris, Jean-Luc Autran, Philippe Roche:
Alpha soft error rate of FDSOI 28 nm SRAMs: Experimental testing and simulation analysis. 11 - T.-Y. Yew, Y.-C. Huang, M.-H. Hsieh, W. Wang, Y.-H. Lee:
The impact of inverter-like transitions on device TDDB and ring oscillators. 1 - P. Mora, X. Federspiel, Florian Cacho, Vincent Huard, Wafa Arfaoui:
28nm UTBB FDSOI product reliability/performance trade-off optimization through body bias operation. 6 - Raphael Robertazzi, Kanak Agarwal, Bucknell Webb, Christy Tyberg:
TSV/FET proximity study using dense addressable transistor arrays. 3 - Thierry Kociniewski, Zoubir Khatir:
Mechanical and thermal stresses characterization maps on cross-sections of forward biased electronic power devices. 2 - Ben Kaczer, Jacopo Franco, M. Cho, Tibor Grasser
, Philippe J. Roussel, Stanislav Tyaginov, M. Bina, Yannick Wimmer, Luis-Miguel Procel
, Lionel Trojman
, Felice Crupi, Gregory Pitner, Vamsi Putcha, Pieter Weckx, Erik Bury, Z. Ji, An De Keersgieter, Thomas Chiarella, Naoto Horiguchi, Guido Groeseneken
, Aaron Thean:
Origins and implications of increased channel hot carrier variability in nFinFETs. 3 - Ghadeer Antanius, Rutvi Trivedi, Robert Kwasnick:
Platform qualification methodology: Face recognition. 3 - Andrea Bahgat Shehata, Alan J. Weger, Franco Stellari, Peilin Song, Hervé Deslandes, Ted R. Lundquist, Euan Ramsay:
Time-integrated photon emission as a function of temperature in 32 nm CMOS. 2 - A. Benoist, S. Denorme, X. Federspiel, Bruno Allard, Philippe Candelier:
Extended TDDB power-law validation for high-voltage applications such as OTP memories in High-k CMOS 28nm FDSOI technology. 3 - Balaji Narasimham, Jung K. Wang, Narayana Vedula, Saket Gupta, Brandon Bartz, Carl Monzel, Indranil Chatterjee
, Bharat L. Bhuva, Ronald D. Schrimpf, Robert A. Reed:
Influence of supply voltage on the multi-cell upset soft error sensitivity of dual- and triple-well 28 nm CMOS SRAMs. 2 - Shou-Chung Lee, A. S. Oates:
On the voltage dependence of copper/low-k dielectric breakdown. 3 - C. W. Chang, S. E. Liu, B. L. Lin, C. C. Chiu, Y.-H. Lee, K. Wu:
Thermal behavior of self-heating effect in FinFET devices acting on back-end interconnects. 2 - Peng Wu
, Chenyue Ma, Lining Zhang
, Xinnan Lin, Mansun Chan:
Investigation of nitrogen enhanced NBTI effect using the universal prediction model. 5 - Olivier Héron, Chiara Sandionigi, E. Piriou, Safa Mbarek, Vincent Huard:
Workload-dependent BTI analysis in a processor core at high level. 6 - Rolf-Peter Vollertsen, Georg Georgakos, K. Kölpin, C. Olk:
A fWLR test structure and method for device reliability monitoring using product relevant circuits. 3 - Joke De Messemaeker, O. Varela Pedreira
, A. Moussa, Nabi Nabiollahi, Kris Vanstreels, Stefaan Van Huylenbroeck, Harold Philipsen
, Patrick Verdonck, Bart Vandevelde, Ingrid De Wolf, Eric Beyne
, Kris Croes:
Impact of oxide liner properties on TSV Cu pumping and TSV stress. 4 - Guillaume Besnard, Xavier Garros, Alexandre Subirats, François Andrieu, X. Federspiel, M. Rafik, Walter Schwarzenbach, Gilles Reimbold, Olivier Faynot, Sorin Cristoloveanu:
Performance and reliability of strained SOI transistors for advanced planar FDSOI technology. 2 - Jacopo Franco, Ben Kaczer, Philippe J. Roussel, Erik Bury, Hans Mertens, Romain Ritzenthaler, Tibor Grasser
, Naoto Horiguchi, Aaron Thean, Guido Groeseneken
:
NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures. 2 - J. W. McPherson:
Understanding the underlying degradation physics for proper time-to-failure distribution selection. 1 - Ankush Chaudhary, Ben Kaczer, Philippe J. Roussel, Thomas Chiarella, Naoto Horiguchi, Souvik Mahapatra:
Time dependent variability in RMG-HKMG FinFETs: Impact of extraction scheme on stochastic NBTI. 3 - Mark A. Anders, Patrick M. Lenahan, Aivars J. Lelis:
Negative bias instability in 4H-SiC MOSFETS: Evidence for structural changes in the SiC. 3 - Georg Tempel:
CpK approach for the qualification of ECC-designs with single bit failures. 6 - Sarra Souiki-Figuigui, Veronique Sousa, Gérard Ghibaudo
, Gabriele Navarro, Martin Coué, Luca Perniola, P. Zuliani, Roberto Annunziata:
Analysis of the SET and RESET states drift of phase-change memories by low frequency noise measurements. 1 - Andrea Cester, Nicola Wrachien, Massimiliano Bon, Gaudenzio Meneghesso, Roberta Bertani, Roberto Tagliaferro, Simone Casolucci, Thomas M. Brown, Andrea Reale, Aldo Di Carlo:
Degradation mechanisms of dye-sensitized solar cells: Light, bias and temperature effects. 3 - Sean P. Ogden, Juan Borja, Huawei Zhou, Joel L. Plawsky, Toh-Ming Lu, William N. Gill:
A moisture-related breakdown mechanism in low-k dielectrics using a multiple I-V ramp test. 4 - Palkesh Jain, Sachin S. Sapatnekar
, Jordi Cortadella
:
Stochastic and topologically aware electromigration analysis for clock skew. 3 - Gavin D. R. Hall, Derryl D. J. Allman:
An evaluation of accelerated failure time models of stress-migration and stress-induced voiding failures under vias. 2 - Jef Poortmans, E. Voroshaszi, W. Deceuninck, J. Szlufcik:
Higher performance and improved reliability: Key to making photovoltaics the mainstream sustainable electricity generation source of the 21st Century. 3 - Nilesh Goel
, P. Dubey, J. Kawa, S. Mahapatra:
Impact of time-zero and NBTI variability on sub-20nm FinFET based SRAM at low voltages. 5 - Riichiro Shirota, Bo-Jun Yang, Yung-Yueh Chiu
, Yu-Ting Wu, Pin-Yao Wang, Jung-Ho Chang, Masaru Yano, Minoru Aoki, Toshiaki Takeshita, C.-Y. Wang, Ikuo Kurachi:
Improvement of oxide reliability in NAND flash memories using tight endurance cycling with shorter idling period. 12 - Cheng Pu Chiu, Yen-Chun Liu, Bin-Siang Tsai, Yi-Jing Wang, Yeh-Sheng Lin, Yun-Ru Chen, Chien-Lin Weng, Sheng-Yuan Hsueh, Jack Hung, Ho-Yu Lai, Jei-Ming Chen, Albert H.-B. Cheng, Chien-Chung Huang:
TDDB improvement of copper/dielectric in the highly-integrated BEOL structure for 28nm technology node and beyond. 3 - P. Srinivasan, J. Fronheiser, S. Siddiqui, A. Kerber, L. F. Edge, Richard G. Southwick, Eduard Cartier:
NBTI in Si0.5Ge0.5 RMG gate stacks - Effect of high-k nitridation. 2 - Jae-Gyung Ahn, Ming Feng Lu, Nitin Navale, Dawn Graves, Ping-Chin Yeh, Jonathan Chang, S. Y. Pai:
Product-level reliability estimator with budget-based reliability management in 20nm technology. 6 - Xiaonan Yang, Jing Liu, Zhiwei Zheng, Yan Wang, Dandan Jiang, Shengfen Chiu, Hanming Wu, Ming Liu:
Impact of P/E cycling on read current fluctuation of NOR Flash memory cell: A microscopic perspective based on low frequency noise analysis. 5 - Soonyoung Lee, Ilgon Kim, Sungmock Ha, Cheong-sik Yu, Jinhyun Noh, Sangwoo Pae, Jongwoo Park:
Radiation-induced soft error rate analyses for 14 nm FinFET SRAM devices. 4 - Nagarajan Raghavan, Michel Bosman
, Kin Leong Pey
:
Spectroscopy of SILC trap locations and spatial correlation study of percolation path in the high-κ and interfacial layer. 5 - Steven R. Novak, C. Parker, D. Becher, M. Liu, Marty Agostinelli, M. Chahal, P. Packan, P. Nayak, Stephen Ramey, S. Natarajan:
Transistor aging and reliability in 14nm tri-gate technology. 2 - Taiki Uemura, Masanori Hashimoto
:
Investigation of single event upset and total ionizing dose in FeRAM for medical electronic tag. 1 - Yoshiyuki Kawashima, Takashi Hashimoto, Ichiro Yamakawa:
Investigation of the data retention mechanism and modeling for the high reliability embedded split-gate MONOS flash memory. 6 - Pieter Weckx, Ben Kaczer, C. Chen, Jacopo Franco, Erik Bury, K. Chanda, J. Watt, Philippe J. Roussel, Francky Catthoor, Guido Groeseneken
:
Characterization of time-dependent variability using 32k transistor arrays in an advanced HK/MG technology. 3 - A. Bezza, M. Rafik, David Roy, X. Federspiel, P. Mora, Cheikh Diouf, Vincent Huard, Gérard Ghibaudo
:
Physical understanding of low frequency degradation of NMOS TDDB in High-k metal gate stack-based technology. Implication on lifetime assessment. 5 - Giulio Marti, Lucile Arnaud, David Ney, Yves Wouters
:
Interconnect design study for electromigration reliability improvement. 2 - Jan Gaudestad, Antonio Orozco, Jack Chen:
Short localization in CPU FlipChip using thermal imaging and magnetic current imaging: Advanced fault isolation technique comparison. 3 - Kris Croes, Alicja Lesniewska, Chen Wu, Ivan Ciofi, Agnieszka Banczerowska, B. Briggs, S. Demuynck, Zsolt Tökei, Jürgen Bömmels, Y. Saad, W. Gao:
Intrinsic reliability of local interconnects for N7 and beyond. 2 - Jongwoo Park, Jungpyo Hong, Miji Lee, Dongyoon Sun, Kyung Kang, Taesung Kim, Seungwon Kim, Sujin Kwon, Changkyu Joo, Sangsu Ha, Wooyeon Kim, Jongsu Ryu, Sangwoo Pae:
Contact resistance of solder bump with low cost photosensitive polyimide for high performance SoC. 3 - Peter Lagger, S. Donsa, P. Spreitzer, Gregor Pobegen, M. Reiner, H. Naharashi, J. Mohamed, H. Mosslacher, G. Prechtl, Dionyz Pogany, Clemens Ostermaier:
Thermal activation of PBTI-related stress and recovery processes in GaN MIS-HEMTs using on-wafer heaters. 6 - Carmine Miccoli, Giovanni M. Paolucci, Christian Monzio Compagnoni, Alessandro S. Spinelli, Akira Goda:
Cycling pattern and read/bake conditions dependence of random telegraph noise in decananometer NAND flash arrays. 9 - Kai-Chieh Kao, Chi-Jia Huang, Chang-Sian Wu, Yi-Lung Cheng:
Thickness dependence on electrical and reliability properties for dense and porous low dielectric constant materials. 6 - I. K. Chen, C. L. Chen, Y.-H. Lee, R. Lu, Y. W. Lee, H. H. Hsu, Y. W. Tseng, Y. W. Lin, J. R. Shih:
New TDDB lifetime model for AC inverter-like stress in advance FinFET structure. 5 - Vincent Huard, D. Angot, Florian Cacho:
From BTI variability to product failure rate: A technology scaling perspective. 6 - GeunYong Bak, Soonyoung Lee, Hosung Lee, Kyungbae Park, Sanghyeon Baeg, Shi-Jie Wen, Richard Wong, Charlie Slayman:
Logic soft error study with 800-MHz DDR3 SDRAMs in 3x nm using proton and neutron beams. 3 - Zhiqiang Wei, Koji Katayama, Shunsaku Muraoka, Ryutaro Yasuhara, Takumi Mikawa, Koji Eriguchi:
A new prediction method for ReRAM data retention statistics based on 3D filament structures. 5 - Tzu-Cheng Kao, Chen-Hsin Lien
, Chien-Wei Chiu, Jian-Hsing Lee, Yen-Hsiang Lo, Chung-Yu Hung, Tsung-Yi Huang, Hung-Der Su:
Robust ESD self-protected LDNMOSFET by an enhanced displacement-current triggering. 5 - Kenji Okada, Kazumi Kurimoto, Mitsuhiro Suzuki:
Intrinsic mechanism of non-linearity in Weibull TDDB lifetime and its impact on lifetime prediction. 2 - Francesco Maria Puglisi
, Paolo Pavan
, Luca Vandelli, Andrea Padovani, Matteo Bertocchi, Luca Larcher
:
A microscopic physical description of RTN current fluctuations in HfOx RRAM. 5 - Masaki Omiya, Shoji Kamiya, Nobuyuki Shishido, Kozo Koiwa, Hisashi Sato, Masahiro Nishida
, Takashi Suzuki, Tomoji Nakamura, Toshiaki Suzuki, Takeshi Nokuo:
Scenario for catastrophic failure in interconnect structures under chip package interaction. 5 - Felix Palumbo, Moshe Eizenberg, Salvatore Lombardo:
General features of progressive breakdown in gate oxides: A compact model. 5 - Baozhen Li, K. Paul Muller, James D. Warnock, Leon J. Sigal, Dinesh Badami:
A case study of electromigration reliability: From design point to system operations. 2 - Ernest Y. Wu, James H. Stathis, Baozhen Li, Barry P. Linder, Kai Zhao, Griselda Bonilla:
A critical analysis of sampling-based reconstruction methodology for dielectric breakdown systems (BEOL/MOL/FEOL). 2 - Vivek Mishra, Sachin S. Sapatnekar
:
Circuit delay variability due to wire resistance evolution under AC electromigration. 3 - Kang Wook Lee, Ji Chel Bea, Mariappan Murugesan, Takafumi Fukushima
, Tetsu Tanaka
, Mitsumasa Koyanagi:
Impacts of 3-D integration processes on device reliabilities in thinned DRAM chip for 3-D DRAM. 4 - Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, Fady Abouzeid
, Sylvain Clerc, Lirida A. B. Naviner
, Philippe Roche:
Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation test. 12 - Nihaar N. Mahatme, Bharat L. Bhuva, Nelson J. Gaspard, T. Assis, Y. Xu, P. Marcoux, M. Vilchis, Balaji Narasimham, A. Shih, Shi-Jie Wen, Rick Wong, N. Tam, M. Shroff, S. Koyoma, A. Oates:
Terrestrial SER characterization for nanoscale technologies: A comparative study. 4 - Rui Liu, Adrian Evans, Qiong Wu, Yuanqing Li, Li Chen
, Shi-Jie Wen, Rick Wong, Rita Fung:
Analysis of advanced circuits for SET measurement. 7 - Julie Paye, Albert Claudi, Matthias Stecher:
High voltage robustness of mold compounds under different environmental conditions. 5 - Violaine Iglesias
, Marc Porti
, Carlos Couso
, Q. Wu, S. Claramunt, Montserrat Nafría
, Enrique Miranda
, Neus Domingo, Gennadi Bersuker, Aaron Cordes:
Threading dislocations in III-V semiconductors: Analysis of electrical conduction. 4 - Stephen Ramey, M. Chahal, P. Nayak, Steven R. Novak, Chetan Prasad, Jeffery Hicks:
Transistor reliability variation correlation to threshold voltage. 3 - Nicolas Borrel, Clement Champeix, Mathieu Lisart, Alexandre Sarafianos, Edith Kussener, Wenceslas Rahajandraibe
, Jean-Max Dutertre
:
Electrical model of an NMOS body biased structure in triple-well technology under photoelectric laser stimulation. 1 - Sungho Kim, Myeongwon Lee, Gil-Bok Choi, Jaekwan Lee, Yunbong Lee, Myoungkwan Cho, Kunok Ahn, Jinwoong Kim:
RTS noise reduction of 1Y-nm floating gate NAND flash memory using process optimization. 8 - Taiki Uemura, Takashi Kato, Hideya Matsuyama, Masanori Hashimoto
:
Soft error immune latch design for 20 nm bulk CMOS. 4 - Kai-Chieh Kao, Chi-Jia Huang, Chang-Sian Wu, Yi-Lung Cheng:
Electrical and reliability performance of atomic layer deposition HfO2 capping layer on porous low dielectric constant materials. 1 - Abu Sebastian
, Daniel Krebs, Manuel Le Gallo
, Haralampos Pozidis, Evangelos Eleftheriou:
A collective relaxation model for resistance drift in phase change memory cells. 5 - Abhitosh Vais
, Koen Martens, Jacopo Franco, Dennis Lin, AliReza Alian, Philippe Roussel, S. Sioncke, Nadine Collaert, Aaron Thean, Marc M. Heyns, Guido Groeseneken
, Kristin De Meyer:
The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices. 5 - Simon Van Beek, Koen Martens, Philippe Roussel, Gabriele Luca Donadio, Johan Swerts, Sofie Mertens, Gouri Sankar Kar, Tai Min, Guido Groeseneken
:
Four point probe ramped voltage stress as an efficient method to understand breakdown of STT-MRAM MgO tunnel junctions. 4 - Franco Stellari, Keith A. Jenkins, Alan J. Weger, Barry P. Linder, Peilin Song:
Self-heating characterization of FinFET SOI devices using 2D time resolved emission measurements. 2 - Yi-Ning He, Jhih-Ming Wang, Tien-Hao Tang, Kuan-Cheng Su:
A novel high level ESD FDNSCR with drain side engineering in PMIC application. 4 - Abdullah Yassine, Lauren Blair, Wayland Seifert:
Employing transistor reliability testing as an FA tool for understanding HTOL product BIST failures. 4 - Tibor Grasser
, M. Wahl, Wolfgang Goes, Yannick Wimmer, Al-Moatasem El-Sayed, Alexander L. Shluger, Ben Kaczer:
On the volatility of oxide defects: Activation, deactivation, and transformation. 5 - Nagarajan Raghavan, Daniel D. Frey, Michel Bosman
, Kin Leong Pey
:
Monte Carlo model of reset stochastics and failure rate estimation of read disturb mechanism in HfOx RRAM. 5 - A. Kerber:
Impact of RTN on stochastic BTI degradation in scaled metal gate/high-k CMOS technologies. 3 - Mengwei Si, SangHoon Shin, Nathan J. Conrad, Jiangjiang Gu, Jingyun Zhang, Muhammad Ashraful Alam, Peide D. Ye:
Characterization and reliability of III-V gate-all-around MOSFETs. 4 - Nils Heidmann, Nico Hellwege, Steffen Paul
, Dagmar Peters-Drolshagen:
NBTI and HCD aware behavioral models for reliability analysis of analog CMOS circuits. 1 - Akram Ditali, Bill Black, Manny Ma, Mike Ball, Guohua Wei, J. Michael Brand:
A highly reliable DRAM 3-D wafer thinning process. 4 - Marco Barbato
, Matteo Meneghini
, Andrea Cester
, Alessandro Barbato, Enrico Zanoni
, Gaudenzio Meneghesso, Giovanna Mura
, D. Tonini, A. Voltan, Giorgio Cellere:
Stress-induced instabilities of shunt paths in high efficiency MWT solar cells. 3 - Alex Lidow, Rob Strittmatter, Chunhua Zhou, Yanping Ma:
Enhancement mode gallium nitride transistor reliability. 2 - Baojun Tang, Kris Croes, Nicolas Jourdan, Jürgen Bömmels, Zsolt Tökei
, Ingrid De Wolf, Eric Wilcox, Timothy McMullen:
Constant voltage electromigration for advanced BEOL copper interconnects. 2 - D. Slottke, R. J. Kamaladasa, M. Harmes, Ilan Tsameret, Mauro J. Kobrinsky, Timothy McMullen, John Dunklee:
Wafer-level electromigration for reliability monitoring: Quick-turn electromigration stress with correlation to package-level stress. 3 - M. Akbal, G. Ribes, L. Vallier:
New insight in plasma charging impact on gate oxide breakdown in FDSOI technology. 2 - Jian-Hsing Lee, Kunihiko Takahashi, Manjunatha Prabhu, Mahadeva Iyer Natarajan:
Printed-circuit board (PCB) charge induced product yield-loss during the final test. 2 - Srivatsan Parthasarathy, Javier A. Salcedo, Sandro Herrera, Jean-Jacques Hajjar:
ESD protection clamp with active feedback and mis-trigger immunity in 28nm CMOS process. 3 - M. P. King, Jeramy Ray Dickerson, S. DasGupta, Matthew J. Marinella, R. J. Kaplar, Daniel Piedra, Min Sun, Tomás Palacios:
Trapping characteristics and parametric shifts in lateral GaN HEMTs with SiO2/AlGaN gate stacks. 2 - Yuan-Chuan Steven Chen, Dave Budka, Auston Gibertini, Joe Davis:
Power debug on Fully Integrated Voltage Regulators (FIVR) circuitry introduced deep low power states. 2 - M. H. Lin, A. S. Oates:
Mechanisms of electromigration under AC and pulsed-DC stress in Cu/low-k dual damascene interconnects. 2 - Yongsheng Sun, Canhui Zhan, Jianping Guo, Yiwei Fu, Guangming Li, Jun Xia:
Localized thermal effect of sub-16nm FinFET technologies and its impact on circuit reliability designs and methodologies. 3 - M. Saliva, Florian Cacho, Cheikh Ndiaye, Vincent Huard, D. Angot, Alain Bravaix
, Lorena Anghel:
Impact of gate oxide breakdown in logic gates from 28nm FDSOI CMOS technology. 4 - A. Sasikumar, Z. Zhang, P. Kumar, En-xia Zhang, Daniel M. Fleetwood, Ronald D. Schrimpf, Paul Saunier, Cathy Lee, S. A. Ringel, A. R. Arehart:
Proton irradiation-induced traps causing VT instabilities and RF degradation in GaN HEMTs. 2 - Pong-Fei Lu, Keith A. Jenkins, K. Paul Muller, Ralf Schaufler:
Long-term data for BTI degradation in 32nm IBM microprocessor using HKMG technology. 6 - Yoann Mamy Randriamihaja, William McMahon, S. Balasubramanian, Tanya Nigam, Biju Parameshwaran, Randy W. Mann, Torsten Klick, T. Schaefer, A. Kumar, Y. Song, Vivek Joshi, Rakesh Ranjan, F. Chen:
Assessing intrinsic and extrinsic end-of-life risk using functional SRAM wafer level testing. 6 - Matteo Meneghini
, Riccardo Silvestri, Stefano Dalcanale, Davide Bisi
, Enrico Zanoni
, Gaudenzio Meneghesso, Piet Vanmeerbeek, Abhishek Banerjee, Peter Moens:
Evidence for temperature-dependent buffer-induced trapping in GaN-on-silicon power transistors. 2 - Zhigang Ji, Dimitri Linten, Roman Boschke, Geert Hellings, S. H. Chen, AliReza Alian, D. Zhou, Yves Mols, Tsvetan Ivanov, Jacopo Franco, Ben Kaczer, X. Zhang, R. Gao, Jianfu Zhang
, Weidong Zhang
, Nadine Collaert, Guido Groeseneken
:
ESD characterization of planar InGaAs devices. 3 - Y.-C. Huang, M.-H. Hsieh, T.-Y. Yew, W. Wang, D. Maji, Y.-H. Lee, W.-S. Chou, P.-Z. Kang:
Delay effects and frequency dependence of NBTI with sub-microsecond measurements. 4 - Zaichen Chen, Robert Mertens, Collin Reiman, Elyse Rosenbaum:
Improved GGSCR layout for overshoot reduction. 3 - Andrea Cattaneo, S. Pinarello, J. E. Mueller, Robert Weigel:
Impact of DC and RF non-conducting stress on nMOS reliability. 4 - Wei-Ting Kary Chien, Atman Yong Zhao, Liwen Zhang, Flora Cheng:
The reversed intrinsic curve and voltage dependence for ultra-low k dielectrics. 2 - Chunhua He, Bo Hou, Liwei Wang, Yunfei En, Shaofeng Xie:
A failure physics model for hardware Trojan detection based on frequency spectrum analysis. 1 - Wenyi Zhang, M. C. Silvestre, A. Selvam, E. Ramanathan, C. Ordonio, J. Schaller, Tian Shen, Kong Boon Yeap, C. Capasso, Patrick Justison, J. H. Lee:
An investigation of process dependence of porous IMD TDDB. 1 - M.-H. Hsieh, Y.-C. Huang, T.-Y. Yew, W. Wang, Y.-H. Lee:
The impact and implication of BTI/HCI decoupling on ring oscillator. 6 - Milos Stanisavljevic, Aravinthan Athmanathan, Nikolaos Papandreou, Haralampos Pozidis, Evangelos Eleftheriou:
Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures. 5 - Choelhwyi Bae, Sangwoo Pae, Cheong-sik Yu, Kangjung Kim, Yongshik Kim, Jongwoo Park:
SRAM stability design comprehending 14nm FinFET reliability. 13 - Tzu-Cheng Kao, Jian-Hsing Lee, Chen-Hsin Lien
, Chih-Hsien Wang, Kuang-Cheng Tai, Hung-Der Su:
Enhanced CDM-robustness for the packaged IC with the extra bonding wire to the die-attach plate. 6 - Simone Balatti, Stefano Ambrogio, Zhongqiang Wang, Scott Sills, Alessandro Calderoni, Nirmal Ramaswamy, Daniele Ielmini:
Understanding pulsed-cycling variability and endurance in HfOx RRAM. 5 - K. Maitra, T. Nguyen, K. Srinivasan, S. Chen, V. Jadhav, B. Langendorf, J. Purtell, R. Jensen, R. Gannamani, A. Marathe, R. Master:
Maximum operating voltage (VMAX) limit for SOCs in thin form factor mobile devices with touch sensitive displays. 3 - M. Nasir Bhuyian, Durga Misra:
Reliability of HfAlOx in multi layered gate stack. 3 - Changze Liu, Hyun-Chul Sagong, Hyejin Kim, Seungjin Choo, Hyunwoo Lee, Yoohwan Kim, Hyunjin Kim, Bisung Jo, Minjung Jin, Jinjoo Kim, Sangsu Ha, Sangwoo Pae, Jongwoo Park:
Systematical study of 14nm FinFET reliability: From device level stress to product HTOL. 2
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