20th ISQED 2019: Santa Clara, California, USA

SESSION 1A: Machine Learning in Conventional and Emerging Platforms

SESSION 1B: Modern High-Level and Logic Synthesis

SESSION 1C: Emerging Memory and Spintronics Technologies for Future Energy Efficient Applications

SESSION 2A: Advances in Simulation, Design Optimization and Debug

SESSION 2B: System Level Tools, Flows, Methods

SESSION 2C: High Performance Application Specific Architecture

SESSION 3A: Deep Learning Circuits and Architectures

SESSION 3B: Innovations In Classic Hardware Security Problems

SESSION 3C: Co-Optimization of Device Performance and Design Reliability from State-of-the-art FinFET to Quantum Technologies

SESSION 4A: Artificial Intelligence for Efficient Application Specific Hardware

SESSION 4B: Verification, ATPG and Failure Analysis

SESSION 5A: Physical Design Optimization

SESSION 5B.1: 3D Integration & Advanced Packaging

SESSION 5B.2: Future of SOC Architectures and Verification

a service of Schloss Dagstuhl - Leibniz Center for Informatics