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ORCIDISSCC 2008: San Francisco, CA, USA
- 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008. IEEE 2008, ISBN 978-1-4244-2010-0
Evening Sessions
- Jan Sevenhans, Rudolf Koch:
Green Electronics: Environmental Impacts, Power, E-Waste. 12-13 - Christian C. Enz, Ernesto Perea, Ken Cioffi:
MEMS for Frequency Synthesis and Wireless RF Communications (or Life without Quartz Crystal). 14-15
Plenary Session
- Hyung Kyu Lim:
The 2nd Wave of the Digital Consumer Revolution: Challenges and Opportunities! 18-23 - Bill Buxton:
Surface and Tangible Computing, and the "Small" Matter of People and Design. 24-29 - Mike Muller:
Embedded Processing at the Heart of Life and Style. 32-37 - Jeff Hawkins:
Why Can't A Computer Be More Like A Brain? Or What To Do With All Those Transistors? 38-41
Image Sensors & Technology
- Cristiano Niclass, Claudio Favi, Theo Kluter, Marek Gersbach, Edoardo Charbon:
A 128×128 Single-Photon Imager with on-Chip Column-Level 10b Time-to-Digital Converter Array Capable of 97ps Resolution. 44-45 - Dongsoo Kim, Jihyun Cho, Seunghyun Lim, Dongmyung Lee, Gunhee Han:
A 5000S/s Single-Chip Smart Eye-Tracking Sensor. 46-47 - Keith Fife, Abbas El Gamal, H.-S. Philip Wong:
A 3MPixel Multi-Aperture Image Sensor with 0.7μm Pixels in 0.11μm CMOS. 48-49 - Takayoshi Yamada, Shigetaka Kasuga, Takahiko Murata, Yoshihisa Kato:
A 140dB-Dynamic-Range MOS Image Sensor with In-Pixel Multiple-Exposure Synthesis. 50-51 - Yoshitaka Egawa, Nagataka Tanaka, Nobuhiro Kawai, Hiromichi Seki, Akira Nakao, Hiroto Honda, Y. Lida, Makoto Monoi:
A White-RGB CFA-Patterned CMOS Image Sensor with Wide Dynamic Range. 52-53 - K. Kagawau, Sanshiro Shishido, Masahiro Nunoshita, Jun Ohta
:
A 3.6pW/frame·pixel 1.35V PWM CMOS Imager with Dynamic Pixel Readout and no Static Bias Current. 54-55 - Shoji Kawahito, Jong-Ho Park, Keigo Isobe, Suhaidi Shafie, T. Lida, Takashi Mizota:
A CMOS Image Sensor Integrating Column-Parallel Cyclic ADCs with On-Chip Digital Error Correction Circuits. 56-57 - J. Moholt, T. Willassen, John Ladd, Xiaofeng Fan, D. Gans:
A 2Mpixel 1/4-inch CMOS Image Sensor with Enhanced Pixel Architecture for Camera Phones and PC Cameras. 58-59 - Eric G. Stevens, Hirofumi Komori, Hung Doan, Hiroaki Fujita, Jeffery Kyan, Christopher Parks, Gang Shi, Cristian Tivarus, Jian Wu:
Low-Crosstalk and Low-Dark-Current CMOS Image-Sensor Technology Using a Hole-Based Detector. 60-61 - Xinyang Wang, Martijn F. Snoeij, Padmakumar R. Rao, Adri Mierop, Albert J. P. Theuwissen:
A CMOS Image Sensor with a Buried-Channel Source Follower. 62-63
Filters and Amplifiers
- Masaki Kitsunezuka, Shinichi Hori, Tadashi Maeda:
A Widely-Tunable Reconfigurable CMOS Analog Baseband IC for Software-Defined Radio. 66-67 - Atsushi Yoshizawa, Sachio Lida:
A Gain-Boosted Discrete-Time Charge-Domain FIR LPF with Double-Complementary MOS Parametric Amplifiers. 68-69 - Joachim Becker, Fabian Henrici, Stanis Trendelenburg, Maurits Ortmanns, Yiannos Manoli:
A Continuous-Time Hexagonal Field-Programmable Analog Array in 0.13μm CMOS with 186MHz GBW. 70-71 - Stefano D'Amico, Marcello De Matteis, Andrea Baschirotto:
A 6th-Order 100μA 280MHz Source-Follower-Based Single-loop Continuous-Time Filter. 72-73 - J. Frerik Witte, Johan H. Huijsing, Kofi A. A. Makinwa:
A Current-Feedback Instrumentation Amplifier with 5μV Offset for Bidirectional High-Side Current-Sensing. 74-75 - Muhammed Bolatkale, Michiel A. P. Pertijs, Wilko J. Kindt, Johan H. Huijsing, Kofi A. A. Makinwa:
A BiCMOS Operational Amplifier Achieving 0.33μV°C Offset Drift using Room-Temperature Trimming. 76-77 - Daniel Micusik, Horst Zimmermann:
130dB-DR Transimpedance Amplifier with Monotonic Logarithmic Compression and High-Current Monitor. 78-79
Microprocessors
- Marc Tremblay, Shailender Chaudhry:
A Third-Generation 65nm 16-Core 32-Thread Plus 32-Scout-Thread CMT SPARC® Processor. 82-83 - Georgios K. Konstadinidis, Mamun Rashid, Peter F. Lai, Yukio Otaguro, Yannis Orginos, Sudhendra Parampalli, Mark Steigerwald, Shriram Gundala, Rambabu Pyapali, Leonard Rarick, Ilyas Elkin, Yuefei Ge, Ishwar Parulkar:
Implementation of a Third-Generation 16-Core 32-Thread Chip-Multithreading SPARCs® Processor. 84-85 - Osamu Takahashi, Chad Adams, D. Ault, Erwin Behnen, O. Chiang, Scott R. Cottier, Paula K. Coulman, James Culp, Gilles Gervais, M. S. Gray, Y. Itaka, C. J. Johnson, Fumihiro Kono, L. Maurice, Kevin W. McCullen, Lam Nguyen, Y. Nishino, Hiromi Noro, Jürgen Pille, Mack W. Riley, M. Shen, Chiaki Takano, Shunsako Tokito, Tina Wagner, Hiroshi Yoshihara:
Migration of Cell Broadband Engine from 65nm SOI to 45nm SOI. 86-87 - Shane Bell, Bruce Edwards, John Amann, Rich Conlin, Kevin Joyce, Vince Leung, John MacKay, Mike Reif, Liewei Bao, John F. Brown III, Matthew Mattina, Chyi-Chang Miao, Carl Ramey, David Wentzlaff, Walker Anderson, Ethan Berger, Nat Fairbanks, Durlov Khan, Froilan Montenegro, Jay Stickney, John Zook:
TILE64 - Processor: A 64-Core SoC with Mesh Interconnect. 88-89 - Masayuki Ito, Toshihiro Hattori, Yutaka Yoshida, Kiyoshi Hayase, Tomoichi Hayashi, Osamu Nishii, Yoshihiko Yasu, Atsushi Hasegawa, Masashi Takada, Hiroyuki Mizuno, Kunio Uchiyama, Toshihiko Odaka, Jun Shirako, Masayoshi Mase, Keiji Kimura, Hironori Kasahara:
An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler. 90-91 - Blaine A. Stackhouse, Brian S. Cherkauer, Michael K. Gowan, Paul E. Gronowski, Chris Lyles:
A 65nm 2-Billion-Transistor Quad-Core Itanium® Processor. 92-93 - Dan Krueger, Erin Francom, Jack Langsdorf:
Circuit Design for Voltage Scaling and SER Immunity on a Quad-Core Itanium® Processor. 94-95
High-Speed Transceivers
- Koji Fukuda, Hiroki Yamashita, Fumio Yuki, Masayoshi Yagyu, Ryo Nemoto, Takashi Takemoto, Tatsuya Saito, Norio Chujo, Keiichi Yamamoto, Hisaaki Kanai, Atsuhiro Hayashi:
An 8Gb/s Transceiver with 3×-Oversampling 2-Threshold Eye-Tracking CDR Circuit for -36.8dB-loss Backplane. 98-99 - Chih-Fan Liao, Shen-Iuan Liu:
A 40Gb/s CMOS Serial-Link Receiver with Adaptive Equalization and CDR. 100-101 - Jri Lee, Ming-Shuan Chen, Huaide Wang:
A 20Gb/s Duobinary Transceiver in 90nm CMOS. 102-103 - H. Uchiki, Y. Ota, M. Tani, Yasushi Hayakawa, Katsushi Asahina:
A 6Gb/s RX Equalizer Adapted Using Direct Measurement of the Equalizer Output Amplitude. 104-105 - Sandeep Gupta, José Tellado, Sridhar Begur, Frank Yang, Vishnu Balan, Michael A. Inerfield, Dariush Dabiri, John Dring, Sachin Goel, Kumaraguru Muthukumaraswamy, Frank McCarthy, Glenn Golden, Jiangfeng Wu, Susan Arno, Sanjay Kasturia:
A 10Gb/s IEEE 802.3an-Compliant Ethernet Transceiver for 100m UTP Cable in 0.13μm CMOS. 106-107 - Andrew C. Y. Lin, Marc J. Loinaz:
A Serial Data Transmitter for Multiple 10Gb/s Communication Standards in 0.13μm CMOS. 108-109 - Marcel A. Kossel, Christian Menolfi, Jonas R. M. Weiss, Peter Buchmann, George von Büren, Lucio Rodoni, Thomas Morf, Thomas Toifl, Martin L. Schmatz:
A T-Coil-Enhanced 8.5Gb/s High-Swing source-Series-Terminated Transmitter in 65nm Bulk CMOS. 110-111 - Hyung-Joon Chi, Jae-Seung Lee, Seong-Hwan Jeon, Seung-Jun Bae, Jae-Yoon Sim, Hong-June Park:
A 3.2Gb/s 8b Single-Ended Integrating DFE RX for 2-Drop DRAM Interface with Internal Reference Voltage and Digital Calibration. 112-113
UWB Potpourri
- Murat Demirkan, Richard R. Spencer:
A 1.8Gpulses/s UWB Transmitter in 90nm CMOS. 116-117 - Yuanjin Zheng, M. Annamalai Arasu, King-Wah Wong, Yen Ju The, Andrew Poh Hoe Suan, Duy Duong Tran, Wooi Gan Yeoh, Dim-Lee Kwong:
A 0.18μm CMOS 802.15.4a UWB Transceiver for Communication and Localization. 118-119 - Ta-Shun Chu, Hossein Hashemi:
A CMOS UWB Camera with 7×7 Simultaneous Active Pixels. 120-121 - Oliver Werther, Mark S. Cavin, Angelika Schneider, Robert Renninger, Bo Liang, Long Bu, Yalin Jin, John Marcincavage:
A Fully Integrated 14-Band 3.1-to-10.6GHz 0.13μm SiGe BiCMOS UWB RF Transceiver. 122-123 - Stefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Stefano Marsili, Christoph Sandner, Andrea Gerosa, Andrea Neviani:
UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking. 124-125 - Tai-You Lu, Wei-Zen Chen:
A 3-to-10GHz 14-Band CMOS Frequency Synthesizer with Spurs Reduction for MB-OFDM UWB System. 126-127 - Remco van de Beek, Jos Bergervoet, Harish Kundur, Domine Leenaerts, Gerard van der Weide:
A 0.6-to-10GHz Receiver Front-End in 45nm CMOS. 128-129 - Stephane Pinel, Saikat Sarkar, Padmanava Sen, Bevin G. Perumana, David Yeh, Debasis Dawn, Joy Laskar:
A 90nm CMOS 60GHz Radio. 130-131 - Namjun Cho, Jeabin Lee, Long Yan, Joonsung Bae, Sunyoung Kim, Hoi-Jun Yoo:
A 60kb/s-to-10Mb/s 0.37nJ/b Adaptive-Frequency-Hopping Transceiver for Body-Area Network. 132-133
TD: Electronics for Life Sciences
- Kazuo Yano, Nobuo Sato, Yoshihiro Wakisaka, Satomi Tsuji, Norio Ohkubo, Miki Hayakawa, Norihiko Moriwaki:
Life Thermoscope: Integrated Microelectronics for Visualizing Hidden Life Rhythm. 136-137 - Alan Chi Wai Wong, Declan McDonagh, Ganesh Kathiresan, Okundu C. Omeni, Omar El-Jamaly, Thomas C.-K. Chan, Paul Paddan, Alison J. Burdett:
A 1V, Micropower System-on-Chip for Vital-Sign Monitoring in Wireless Body Sensor Networks. 138-139 - Yong Liu, Nan Sun, Hakho Lee, Ralph Weissleder, Donhee Ham:
CMOS Mini Nuclear Magnetic Resonance System and its Application for Biomolecular Sensing. 140-141 - Joachim N. Burghartz, Thorsten Engelhardt, Heinz-Gerd Graf, Christine Harendt, Harald Richter, Cor Scherjon, Karsten Warkentin:
CMOS Imager Technologies for Biomedical Applications. 142-143 - Albrecht Rothermel, Volker Wieczorek, Liu Liu, Alfred Stett, Matthias Gerhardt, Alex Harscher, Steffen Kibbel:
A 1600-pixel Subretinal Chip with DC-free Terminals and ±2V Supply Optimized for Long Lifetime and High Stimulation Efficiency. 144-145 - Moo Sung Chae, Wentai Liu, Zhi Yang, Tung-Chien Chen, Jungsuk Kim, Mohanasankar Sivaprakasam, Mehmet R. Yuce:
A 128-Channel 6mW Wireless Neural Recording IC with On-the-Fly Spike Sorting and UWB Tansmitter. 146-147 - Na Lei, Brendon O. Watson, Jason N. MacLean, Rafael Yuste, Kenneth L. Shepard:
A 256x256 CMOS Microelectrode Array for Extracellular Neural Stimulation of Acute Brain Slices. 148-149 - Hyejung Kim, Yongsang Kim, Young-Se Kwon, Hoi-Jun Yoo:
A 1.12mW Continuous Healthcare Monitor Chip Integrated on a Planar Fashionable Circuit Board. 150-151
Evening Sessions
- Satoshi Tanaka, Marc Tiebout, Ali Hajimiri:
From Silicon Aether and Back. 152-153 - Venu Gopinathan, Boris Murmann:
Unusual Data-Converter Techniques. 154-155 - Sreedhar Natarajan, Nicky Lu:
Private Equity: Fight them or Invite them. 156-157 - Johannes Solhusvik, Tim Denison:
Trusting our Lives to Sensors. 158-159
Medical & Displays
- Timothy Denison, Wesley Santa, Randy Jensen, Dave Carlson, Gregory Molnar, Al Avestruz:
An 8μW Heterodyning Chopper Amplifier for Direct Extraction of 2μVrms Neuronal Biomarkers. 162-163 - Refet Firat Yazicioglu, Patrick Merken, Robert Puers, Chris Van Hoof:
A 200μW Eight-Channel Acquisition ASIC for Ambulatory EEG Systems. 164-165 - Bruce Rae, Chris Griffin, Keith R. Muir, John M. Girkin, Erdan Gu, David R. Renshaw, Edoardo Charbon, Martin D. Dawson, Robert K. Henderson:
A Microsystem for Time-Resolved Fluorescence Analysis using CMOS Single-Photon Avalanche Diodes and Micro-LEDs. 166-167 - Flavio Heer, Manuel Keller, George Yu, Jiri Janata, Mira Josowicz, Andreas Hierlemann:
CMOS Electro-Chemical DNA-Detection Array with On-Chip ADC. 168-169 - Toshishige Shimamura, Hiroki Morimura, Nobuhiro Shimoyama, Tomomi Sakata, Satoshi Shigematsu, Katsuyuki Machida, Mamoru Nakanishi:
A Fingerprint Sensor with Impedance Sensing for Fraud Detection. 170-171 - Iliana Fujimori-Chen, Rikky Muller, W. Kan, Matt Fazio, A. Farrell, David H. Whitney:
A 10b 75ns CMOS Scanning-Display-Driver System for QVGA LCDs. 172-173 - Jinyong Jeon, Yong-Joon Jeon, Young-Suk Son, Kwang-Chan Lee, Hyung-Min Lee, Seungchul Jung, Kang-Ho Lee, Gyu-Hyeong Cho:
A Direct-Type Fast Feedback Current Driver for Medium-to Large-Size AMOLED Displays. 174-175 - Yoon-Kyung Choi, Zhong-Yuan Wu, KyungMyun Kim, Yong Hun Lee, Min-Soo Cho, Hyo-Sun Kim, Dong-Hun Lee, Won-Gab Jung:
A Compact Low-Power CDAC Architecture for Mobile TFT-LCD Driver ICs. 176-177
mm-Wave & Phased Arrays
- Ekaterina Laskin, Mehdi Khanpour, Ricardo Andres Aroca, Keith K. W. Tang, Patrice Garcia, Sorin P. Voinigescu:
A 95GHz Receiver with Fundamental-Frequency VCO and Static Frequency Divider in 65nm Digital CMOS. 180-181 - Bagher Afshar, Yanjie Wang, Ali M. Niknejad:
A Robust 24mW 60GHz Receiver in 90nm Standard CMOS. 182-183 - Karen Scheir, Stephane Bronckers, Jonathan Borremans, Piet Wambacq, Yves Rolain:
A 52GHz Phased-Array Receiver Front-End in 90nm Digital CMOS. 184-185 - Sanggeun Jeon, Yu-Jiu Wang, Hua Wang, Florian Bohn, Arun Natarajan, Aydin Babakhani, Ali Hajimiri:
A Scalable 6-to-18GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS. 186-187 - Aydin Babakhani, David B. Rutledge, Ali Hajimiri:
A Near-Field Modulation Technique Using Antenna Reflector Switching. 188-189 - Ali Parsa, Behzad Razavi:
A 60GHz CMOS Receiver Using a 30GHz LO. 190-191 - Christopher Weyers, Pierre Mayr, Johannes W. Kunze, Ulrich Langmann:
A 22.3dB Voltage Gain 6.1dB NF 60GHz LNA in 65nm CMOS with Differential Output. 192-193 - Yiqun Cao, Vadim Issakov, Marc Tiebout:
A 2kV ESD-Protected 18GHz LNA with 4dB NF in 0.13μm CMOS. 194-195 - Amin Arbabian, Ali M. Niknejad:
A Broadband Distributed Amplifier with Internal Feedback Providing 660GHz GBW in 90nm CMOS. 196-197
Cellular Transceivers
- Hsiang-Hui Chang, Ping-Ying Wang, Jing-Hong Conan Zhan, Bing-Yu Hsieh:
A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE. 200-201 - Bernard Tenbroek, Jon Strange, Dimitris Nalbantis, Christopher Jones, Paul Fowers, Steve Brett, Christophe Beghein, Federico Beffa:
Single-Chip Tri-Band WCDMA/HSDPA Transceiver without External SAW Filters and with Integrated TX Power Control. 202-203 - Edward A. Keehr, Ali Hajimiri:
Equalization of IM3 Products in Wideband Direct-Conversion Receivers. 204-205 - Hooman Darabi, Alireza Zolfaghari, Henrik Jensen, John C. Leete, Behnam Mohammadi, Janice Chiu, Tom Li, Zhimin Zhou, Paul Lettieri, Yuyu Chang, Amir Hadji-Abdolhamid, Paul Chang, Mohammad Nariman, Iqbal Bhatti, Ali Medi, Louie Serrano, Jared Welz, Kambiz Shoarinejad, S. M. Shajedul Hasan, Jesse Castaneda, Jay Kim, Huey Tran, Patrick Kilcoyne, R. Chen, Bobby Lee, Barry Zhao, Brima Ibrahim, Maryam Rofougaran, Ahmadreza Rofougaran:
A Fully Integrated Quad-Band GPRS/EDGE Radio in 0.13μm CMOS. 206-207 - Robert Bogdan Staszewski, Dirk Leipold, Oren E. Eliezer, Mitch Entezari, Khurram Muhammad, Imran Bashir, Chih-Ming Hung, John L. Wallberg, Roman Staszewski, Patrick Cruise, Sameh Rezeq, Sudheer K. Vemulapalli, Khurram Waheed, Nathen Barton, Meng-Chang Lee, Chan Fernando, Kenneth Maggio, Tom Jung, Imtinan Elahi, S. Larson, Thomas Murphy, Gennady Feygin, Irene Yuanying Deng, Terry Mayhugh Jr., Yo-Chuol Ho, K.-M. Low, Charles Lin, J. Jaehnig, J. Kerr, Jaimin Mehta, S. Glock, T. Almholt, Sumeer Bhatara:
A 24mm2 Quad-Band Single-Chip GSM Radio with Transmitter Calibration in 90nm Digital CMOS. 208-209 - Giuseppe Li Puma, Ernst Kristan, Paolo De Nicola, Cyril Vannier, Braam Greyling, Salvatore Piccolella:
Integration of a SiP for GSM/EDGE in CMOS Technology. 210-211 - Ahmad Mirzaei, Hooman Darabi:
A Low-Power WCDMA Transmitter with an Integrated Notch Filter. 212-213 - Shouhei Kousai, Daisuke Miyashita, Junji Wadatsumi, Asuka Maki, Takahiro Sekiguchi, Rui Ito, Mototsugu Hamada:
A 1.2V 0.2-to-6.3GHz Transceiver with Less Than -29.5dB EVM@-3dBm and a Choke/Coil-Less Pre-Power Amplifier. 214-215 - Andrea Mazzanti, Marco Sosio, Matteo Repossi, Francesco Svelto:
A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS. 216-217
Optical Communication
- Tine De Ridder, Peter Ossieur, B. Baekelandt, Cedric Mélange, Johan Bauwelinck, Colin Ford, Xing-Zhi Qiu, Jan Vandewege:
A 2.7V 9.8Gb/s Burst-Mode TIA with Fast Automatic Gain Locking and Coarse Threshold Extraction. 220-221 - Chia-Ming Tsai, Mao-Cheng Chiu:
A 10Gb/s Laser-Diode Driver with Active Back-Termination in 0.18μm CMOS. 222-223 - Che-Fu Liang, Shen-Iuan Liu:
A 20/10/5/2.5Gb/s Power-scaling Burst-Mode CDR Circuit Using GVCO/Div2/DFF Tri-mode Cells. 224-225 - Jun Terada, Kazuyoshi Nishimura, Shunji Kimura, Hiroaki Katsurai, Naoto Yoshimoto, Yusuke Ohtomo:
A 10.3125Gb/s Burst-Mode CDR Circuit using a δσ DAC. 226-227 - Hidemi Noguchi, Nobuhide Yoshida, Hiroaki Uchida, Manabu Ozaki, Shunichi Kanemitsu, Shigeki Wada:
A 40Gb/s CDR with Adaptive Decision-Point Control Using Eye-Opening-Monitor Feedback. 228-229 - Sushmit Goswami, Tino Copani, Anuj Jain, Habib Karaki, Bert Vermeire, Hugh J. Barnaby, Gregory J. Fetzer, Rick Vercillo, Sayfe Kiaei:
A 96Gb/s-Throughput Transceiver for Short-Distance Parallel Optical Links. 230-231 - Oscar E. Agazzi, Diego E. Crivelli, Mario Rafael Hueda, Hugo S. Carrer, German C. Luna, Ali Nazemi, Carl R. Grace, Bilal Kobeissy, Cindra Abidin, Mohammad Kazemi, Mahyar Kargar, César Marquez, Sumant Ramprasad, Federico Bollo, Vladimir A. Posse, Stephen Wang, Georgios Asmanis, George Eaton, Norman Swenson, Tom Lindsay, Paul Voois:
A 90nm CMOS DSP MLSD Transceiver with Integrated AFE for Electronic Dispersion Compensation of Multi-mode Optical Fibers at 10Gb/s. 232-233 - Hyeon-Min Bae, Andrew C. Singer, Jonathan B. Ashbrook, Naresh R. Shanbhag:
A 10Gb/s MLSE-based Electronic-Dispersion-Compensation IC with Fast Power-Transient Management for WDM Add/Drop Networks. 234-235
High-Efficiency Data Converters
- Vito Giannini, Pierluigi Nuzzo, Vincenzo Chironi, Andrea Baschirotto, Geert Van der Plas, Jan Craninckx:
An 820μW 9b 40MS/s Noise-Tolerant Dynamic-SAR ADC in 90nm Digital CMOS. 238-239 - Brian P. Ginsburg, Anantha P. Chandrakasan:
Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS. 240-241 - Geert Van der Plas, Bob Verbruggen:
A 150MS/s 133μW 7b ADC in 90nm digital CMOS Using a Comparator-Based Asynchronous Binary-Search sub-ADC. 242-243 - Michiel van Elzakker, Ed van Tuijl, Paul F. J. Geraedts, Daniël Schinkel, Eric A. M. Klumperink, Bram Nauta:
A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC. 244-245 - Andrea Agnes, Edoardo Bonizzoni, Piero Malcovati, Franco Maloberti:
A 9.4-ENOB 1V 3.8μW 100kS/s SAR ADC with Time-Domain Comparator. 246-247 - Byung Geun Lee, Byung-Moo Min, Gabriele Manganaro, Jonathan W. Valvano:
A 14b 100MS/s Pipelined ADC with a Merged Active S/H and First MDAC. 248-249 - Mounir Boulemnakher, Eric Andre, Jocelyn Roux, Frédéric Paillardet:
A 1.2V 4.5mW 10b 100MS/s Pipeline ADC in a 65nm CMOS. 250-251 - Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas:
A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS. 252-253
Mobile Processing
- Gianfranco Gerosa, Steve Curtis, Michael D'Addeo, Bo Jiang, Belliappa Kuttanna, Feroze Merchant, Binta Patel, Mohammed H. Taufique, Haytham Samarchi:
A Sub-1W to 2W Low-Power IA Processor for Mobile Internet Devices and Ultra-Mobile PCs in 45nm Hi-Κ Metal Gate CMOS. 256-257 - Gordon Gammie, Alice Wang, Minh Chau, Sumanth Gururajarao, Robert Pitts, Fabien Jumel, Stacey Engel, Philippe Royannez, Rolf Lagerquist, Hugh Mair, Jeff Vaccani, Greg Baldwin, Keerthi Heragu, Rituparna Mandal, Michael Clinton, Don Arden, Uming Ko:
A 45nm 3.5G Baseband-and-Multimedia Application Processor using Adaptive Body-Bias and Ultra-Low-Power Techniques. 258-259 - Masao Naruse, Tatsuya Kamei, Toshihiro Hattori, Takahiro Irita, Kenichi Nitta, Takao Koike, Shinichi Yoshioka, Koji Ohno, Masahito Saigusa, Minoru Sakata, Yukio Kodama, Yuji Arai, Teruyoshi Komuro:
A 65nm Single-Chip Application and Dual-Mode Baseband Processor with Partial Clock Activation and IP-MMU. 260-261 - Shuou Nomura, Fumihiko Tachibana, Tetsuya Fujita, Chen Kong Teh, Hiroyuki Usui, Fumiyuki Yamane, Yukimasa Miyamoto, Chaiyasit Kumtornkittikul, Hiroyuki Hara, Takahiro Yamashita, Jun Tanabe, Masaru Uchiyama, Yoshiro Tsuboi, Takashi Miyamori, Takeshi Kitahara, Hironori Sato, Y. Homma, Shuuji Matsumoto, Keiko Seki, Y. Watanabe, Mototsugu Hamada, Makoto Takahashi:
A 9.7mW AAC-Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward-Body-Biasing and Power-Gating Circuit in 65nm CMOS Technology. 262-263 - Christian Benkeser, Andreas Burg, Teo Cupaiuolo, Qiuting Huang:
A 58mW 1.2mm2 HSDPA Turbo Decoder ASIC in 0.13μm CMOS. 264-265 - Anders Nilsson, Eric Tell, Dake Liu:
An 11mm2 70mW Fully-Programmable Baseband Processor for Mobile WiMAX and DVB-T/H in 0.12μm CMOS. 266-267
Embedded & Graphics DRAMs
- Sergey Romanovsky, Atul Katoch, Arun Achyuthan, C. O'Connell, Sreedhar Natarajan, C. Huang, Chuan-Yu Wu, Min-Jer Wang, C. J. Wang, P. Chen, R. Hsieh:
A 500MHz Random-Access Embedded 1Mb DRAM Macro in Bulk CMOS. 270-271 - Kim Hardee, Michael Parris, O. Fred Jones, Doug Butler, Mike Mound, G. W. Jones, Tim Egging, Tomofumi Arakawa, Katsuhiko Sasahara, Kazuo Taniguchi, Masayuki Miyabayashi:
A 170GB/s 16Mb Embedded DRAM with Data-Bus Charge-Recycling. 272-273 - Dinesh Somasekhar, Yibin Ye, Paolo A. Aseron, Shih-Lien Lu, Muhammad M. Khellah, Jason Howard, Gregory Ruhl, Tanay Karnik, Shekhar Y. Borkar, Vivek De, Ali Keshavarzi:
2GHz 2Mb 2T Gain-Cell Memory Macro with 128GB/s Bandwidth in a 65nm Logic Process. 274-275 - Mariko Kaku, Hitoshi Iwai, Takeshi Nagai, Masaharu Wada, Atsushi Suzuki, Tomohisa Takai, Naoko Itoga, Takayuki Miyazaki, Takayuki Iwai, Hiroyuki Takenaka, Takehiko Hojo, Shinji Miyano, Nobuaki Otsuka:
An 833MHz Pseudo-Two-Port Embedded DRAM for Graphics Applications. 276-277 - Seung-Jun Bae, Young-Soo Sohn, Kwang-Il Park, Kyoung-Ho Kim, Dae-Hyun Chung, Jingook Kim, Si-Hong Kim, Min-Sang Park, Jae-Hyung Lee, Sam-Young Bang, Ho-Kyung Lee, In-Soo Park, Jae-Sung Kim, Dae-Hyun Kim, Hye-Ran Kim, Yong-Jae Shin, Cheol-Goo Park, Gil-Shin Moon, Ki-Woong Yeom, Kang-Young Kim, Jae-Young Lee, Hyang-Ja Yang, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim:
A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques. 278-279