default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDITC 1981: Philadelphia, PA, USA
- Proceedings International Test Conference 1981, Philadelphia, PA, USA, October 1981. IEEE Computer Society 1981
Session 1: Keynote Address and Invited Panel
- William P. Thurston:
The Challenge of Testing VLSI in the 1980's. ITC 1981: 3
Session 2: Microprocessor Testing and Modeling
- Kent Lunneborg:
A Unified Test Plan for LSI or VLSI Components. ITC 1981: 9-14 - Williams Ludwell Harrison, Robert P. Davidson, Ronald L. Wadsack:
BELLMACT-32 : A Testable 32 bit Microprocessor. ITC 1981: 15-20 - Bernard Courtois:
Analytical Testing of Data Processing Sections of Integrated CPUs. ITC 1981: 21-30
Session 3: Memory Test
- Robert G. Dunn, A. Kwan, David P. Rodgers, D. Sandstrom, C. Sie:
System to Optimize Test Quality and Efficiency for Memories and LSI. ITC 1981: 31-37 - E. Kurzweil, L. Jambut:
Importance of Asynchronous Refreshing in Memory Testing. ITC 1981: 38-43 - Steven Winegarden, Donald Pannell:
Paragons for Memory Test. ITC 1981: 44-48 - Robert C. Evans:
Testing Repairable RAMs and Mostly Good Memories. ITC 1981: 49-55 - Joan M. Morrissey, Ching-Hua Chow, Ronald C. Devries, C. Megivern:
An Approach to Memory Testing, Diagnostics and Analysis. ITC 1981: 56-67 - G. K. Lukianoff, J. S. Wolcott, Joan M. Morrissey:
Electron-Beam Testing of VLSI Dyrnamic RAMs. ITC 1981: 68-78
Session 4: Design and Testability
- M. T. M. Segers:
A Self-Test Method for Digital Circuits. ITC 1981: 79-85 - Y. Arzoumanian, John A. Waicukauski:
Fault Diagnosis in an LSSD Environment. ITC 1981: 86-88 - Chung Ho Chen:
Designing Testable Synchronous Logic. ITC 1981: 89-94 - Shigeru Takasaki, Masato Kawai, Shigehiro Funatsu, Akihiko Yamada:
A Calculus of Testability Measure at the Functional Level. ITC 1981: 95-101 - Zeev Barzilai, Jacob Savir, George Markowsky, Merlin G. Smith:
VLSI Self-Testing Based on Syndrome Techniques. ITC 1981: 102-109 - Wilfried Daehn, Joachim Mucha:
Hardware Test Pattern Generation for Built-In Testing. ITC 1981: 110-120
Session 7: Test Equipment and Methods
- Dave Peachey, Robert O'Harold:
An Enhanced Analog/Digital GPIB Based PCB Test System. ITC 1981: 121-123 - Aldo Mastrocola:
In-Circuit Test Techniques Applied to Complex Digital Assemblies. ITC 1981: 124-131 - David K. Oka, Bradford Robbins, William Bowhers:
Automatic Testing of Speech Synthesis Integrated Circuits. ITC 1981: 132-139 - Charles Koehler:
A CCD Imager Test System. ITC 1981: 140-142 - Shigeru Sugamori, Kenji Yoshida, Hiromi Maruyama, Shinpei Kamata, Tsuneta Sudo:
Analysis and Definition of Overall Timing Accuracy in VLSI Test System. ITC 1981: 143-153 - Paul Chang, Ed Richards, David Richter:
The PIN Module: A High Accuracy Concept in Very High Frequency Pin Electronics. ITC 1981: 154-168
Session 8: CODEC Testing
- Richard Adams:
A Correlation Study of Modern Techniques Applied to the Testing of Telecommunication Circuits. ITC 1981: 169-176 - John C. Lundy:
A Working Approach to Volume CODEC Testing. ITC 1981: 177-185 - R. A. Hum, D. L. Williams, J. W. Lamonde:
A High-Performance Integrated Analog/Digital Test and Characterization Test System. ITC 1981: 186-192 - Franc Brglez:
Digital Signal Processing Considerations in Filter-Codec Testing. ITC 1981: 193-202
Session 9: Design for Testability/Self Test II
- Douglas W. Westcott:
The Self-Assist Test Approach to Embedded Arrays. ITC 1981: 203-207 - Dilip K. Bhavsar, Richard W. Heckelman:
Self-Testing by Polynomial Division. ITC 1981: 208-216 - Mark W. Levi:
CMOS Is Most Testable. ITC 1981: 217-220 - Wayne Cook:
Internal Diagnostics for Tektronix Graphics Terminals. ITC 1981: 221-225 - Samuel Kitces, John E. Bauer:
Parametric Relationships for Self-Contained Test for Digital Avionics Functions. ITC 1981: 226-230 - Kyushik Son, Dhiraj K. Pradhan:
Completely Self-Checking Checkers in PLAs. ITC 1981: 231-240
Session 10: Board Testing
- Geoffrey J. Bunza:
Implications of Board Testing at Speed. ITC 1981: 241-243 - John J. Allard:
Dynamic Memory Array Card Burn-In and High Speed Functional Card Testing. ITC 1981: 244-248 - Eric Sacher:
High-Speed Functional Testing of Microprocessor-Based Circuit Boards. ITC 1981: 249-252 - Stephen Jochan, Norman Landis, Duke Monson:
Computer-Guided Probing Techniques. ITC 1981: 253-270
Session 11: Precision Measurement, Calibration and Testing
- Robert B. Craven, E. Rachel Morris:
An 18-Bit Precision DC Measurement System. ITC 1981: 271-289 - T. Michael Souders, D. R. Flach:
An NBS Calibration Service for A/D and D/A Converters. ITC 1981: 290-303 - E. A. Sloane:
A System for Converter Testing Using Walsh Transform Techniques. ITC 1981: 304-311 - J. Anson Whealler:
A New Technique for Testing Settling Time in a Production Environment. ITC 1981: 312-318 - Matthew V. Mahoney:
Automated Measurement of 12 to 16-Bit Converters. ITC 1981: 319-330
Session 12: Test Economics
- Kemon P. Taschioglou:
Applying Quality Curves for Economic Comparison of Alternative Test Strategies. ITC 1981: 331-339 - G. W. Jacob:
Preparation of Product Test Plans. ITC 1981: 340-347 - G. A. Perone, P. A. LaBerge:
The Economics of the Memory Tester Decision. ITC 1981: 348-367 - Joseph A. Ruggieri:
Hidden Cost Considerations in Long Term Use of ATE Programs. ITC 1981: 368-369 - Eugene R. Hnatek:
Documentation for Testability : The Supplier's Responsibility to the User. ITC 1981: 370-372 - Micahel R. Saleno:
Planning for Test of Custom IC Devices. ITC 1981: 373-376
Session 13: Test System Architecture
- Donald L. Wheater, Richard Soderman:
The Series/1 as a Test System Controller for System Verification and Calibration. ITC 1981: 377-380 - Robert S. Broughton:
Data Management for Large Memory Device Characterization. ITC 1981: 381-387 - R. N. Powell:
IBM's VLSI Logic Test System. ITC 1981: 388-392 - Beau R. Wilson Jr.:
A Method for Testing Subnanosecond ECL. ITC 1981: 393-401 - Robert M. Rolfe:
High-Volume Production Testing and Its Impact on the Development of Microprocessor Prototyping Tools. ITC 1981: 402-406
Session 14: System Testing in the Field
- J. Thomas Zender:
Driving Forces Behind Field-Based System Testing. ITC 1981: 407-410 - John W. Marvill:
The IBM Maintenance Device. ITC 1981: 411-419 - Charles P. Frusterio:
Field System Test Strategies for the 1980's. ITC 1981: 420-424 - Gerald C. Goshaw:
DIAL : An Automated ATE Service Support System. ITC 1981: 425-432
Session 15: Functional Testing
- Chi-Chang Liaw, Stephen Y. H. Su, Yashwant K. Malaiya:
State Diagram Approach for Functional Testing of Control Section. ITC 1981: 433-446 - Stephen Y. H. Su, Yu-I Hsieh:
Testing Functional Faults in Digital Systems Described by Register Transfer Language. ITC 1981: 447-457 - James Y. O. Fong:
Microprocessor Modeling for Logic Simulation. ITC 1981: 458-460 - Jacob A. Abraham:
Functional Level Test Generation for Complex Digital Systems. ITC 1981: 461-462 - Peter S. Bottorff:
Functional Testing Folklore and Fact. ITC 1981: 463-466
Session 16: Software
- C. P. Ancheta, J. C. Helland:
A Data Management System for Testing Memory Devices. ITC 1981: 467-475 - Nalin Shah, Hira Ranga:
A Test Analysis Program for Memory Testing. ITC 1981: 476-483 - Brad Snoulten, John Peacock:
ANGEL : Algorithmic Pattern Generation System. ITC 1981: 484-488 - Arthur E. Downey:
A "Three Mode" Command Language for ATE. ITC 1981: 489-496
Session 17: System Testing in Manufacturing
- Bruce G. MacAloney:
Fault Spectrum: An Analysis of System Level Test with Proposed Solutions. ITC 1981: 497-500 - William K. Jones:
Final Test of an LSI Populated System: A Pragmatic Approach. ITC 1981: 501-507 - D. C. Jessep Jr.:
Today a Collection of Modules: Tomorrow a System. ITC 1981: 508-514 - J. L. Saathoff:
Factory Final Test Systems. ITC 1981: 515-520
Session 18: Testing Valuation and Fault Coverage
- Predrag G. Kovijanic:
Single Testability Figure of Merit. ITC 1981: 521-529 - Kaoru Okazaki, Toshihiko Yahara:
Efficient Logic Verification and Test Validation for MOS LSI Circuits. ITC 1981: 530-535 - Yacoub M. El-Ziq, Richard J. Cloutier:
Functional-Level Test Generation for Stuck-Open Faults in CMOS VLSI. ITC 1981: 536-546 - Ronald L. Wadsack:
VLSI : How Much Fault Coverage Is Enough ? ITC 1981: 547-554 - R. W. Allen, C. D. Chen, M. M. Ervin-Willis, K. R. Rahlfs, R. F. Thulloss, S. L. Wu:
DORA : A System of CAD Post-Processors Providing Test Programs and Automatic Diagnostics Data for Digital Device and Board Manufacture. ITC 1981: 555-560 - M. Ray Mercer, Vishwani D. Agrawal, Carlos M. Roman:
Test Generation for Highly Sequential Scan-Testable Circuits Through Logic Transformation. ITC 1981: 561-565
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-12-01 23:10 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
