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2. Co-HPC@SC 2015: Austin, Texas, USA

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Proceedings of the 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing, Co-HPC 2015, Austin, Texas, USA, November 15, 2015. ACM 2015, ISBN 978-1-4503-3992-6
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Laura Carrington:
Performance and energy-efficiency analysis of ARM processors for HPC workloads. 1:1
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John D. McCalpin:
Trends in system cost and performance balances and implications for the future of HPC. 2:1
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Lillian Pentecost, John A. Stratton:
Accelerating dynamically typed languages with a virtual function cache. 3:1-3:6
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Robert S. Pavel, Allen L. McPherson, Timothy C. Germann, Christoph Junghans:
Database assisted distribution to improve fault tolerance for multiphysics applications. 4:1-4:8
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Hartwig Anzt, Eduardo Ponce, Gregory D. Peterson, Jack J. Dongarra:
GPU-accelerated co-design of induced dimension reduction: algorithmic fusion and kernel overlap. 5:1-5:8
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Sameer AbuAsal, R. Tohid, J. Ramanujam:
Lost in heterogeneity: architectural selection based on code features. 6:1-6:6
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Gary Lawson, Vaibhav Sundriyal, Masha Sosonkina, Yuzhong Shen:
Modeling performance and energy for applications offloaded to Intel Xeon Phi. 7:1-7:8
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Ananta Tiwari, Kristopher Keipert, Adam Jundt, Joshua Peraza, Sarom S. Leang, Michael Laurenzano, Mark S. Gordon, Laura Carrington:
Performance and energy efficiency analysis of 64-bit ARM using GAMESS. 8:1-8:10
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Pietro Cicotti, Manu Shantharam, Laura Carrington:
Tuning tasks, granularity, and scratchpad size for energy efficiency. 9:1-9:9

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