default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDMicroprocessors and Microsystems, Volume 105
Volume 105, 2024
- Durgesh Srivastava
, Rajeshwar Singh, Chinmay Chakraborty, Sunil Kr Maakar, Aaisha Makkar, Deepak Sinwar:
A framework for detection of cyber attacks by the classification of intrusion detection datasets. 104964 - Guy Even, Gabriel Marques Domingues:
A Micro-architecture that supports the Fano-Elias encoding and a hardware accelerator for approximate membership queries. 104992 - Jiarong Liu, Tianyu Wang, Xiaowei Chen, Chao Li, Zhaoyan Shen, Zhiyong Zhang:
H2-RAID: Improving the reliability of SSD RAID with unified SSD and HDD hybrid architecture. 104993 - Marcin Aftowicz, Ievgen Kabin, Zoya Dyka, Peter Langendoerfer:
Advantages of unsupervised learning analysis methods in single-trace SCA attacks. 104994 - Hamidreza Bolhasani, Mohammad Marandinejad:
Deep neural networks accelerators with focus on tensor processors. 105005 - Hakem Beitollahi, Marziye Pandi, Mostafa Moghaddas:
Edge-sorter: A hardware sorting engine for area & power constrained edge computing devices. 105006 - Ahmet Malal, Cihangir Tezcan:
FPGA-friendly compact and efficient AES-like 8 × 8 S-box. 105007 - C. Chellaswamy, M. Muthu Manjula, B. Ramasubramanian, A Sriram:
FPGA-based remote target classification in hyperspectral imaging using multi-graph neural network. 105008 - Özen Özkaya, Berna Örs:
Model-based, fully simulated, system-level power consumption estimation of IoT devices. 105009 - Azam Tayyebi, Darrin M. Hanna, Bryant Jones:
Parametrized low-complexity hardware architecture of an H.264-based video encoder for FPGAs. 105017 - Retraction notice to the articles published in the Special issue Embedded Processors from "Microprocessors and Microsystems". 105019
- Retraction notice to the articles published in the Special issue Internet of People from "Microprocessors and Microsystems". 105020
- Daniel León, Juan Carlos Fabero, Juan Antonio Clemente:
Non-intrusive study on FPGA of the SEU sensitivity on the COTS RISC-V VeeR EH1 soft processor from Western Digital. 105021 - R. Priyadharsini, S. Sasipriya:
A novel hybrid fast Fourier transform processor in 5G+ and bio medical applications. 105022 - Retraction notice to "FPGA implementation of low power and high speed image edge detection algorithm" [Microprocessors and Microsystems 75, 2020, 103053]. 105024
- Retraction notice to 'Virtual garden landscape planning based on FPGA and GIS platform' [Microprocessors and Microsystems 79 (2020) 103314]. 105025
- Retraction notice to 'An Improved Dynamic Process Neural Network Prediction Model Identification Method' [Microprocessors and Microsystems 80 (2021) 103573]. 105026
- Retraction notice to 'A machine learning based IoT for providing an intrusion detection system for security' [Microprocessors and Microsystems 82 (2021) 103741]. 105028
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-08-13 21:06 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
