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ORCIDMicroelectronics Journal, Volume 45
Volume 45, Number 1, January 2014
- I-Chyn Wey, Yu-Sheng Yang, Bing-Chen Wu
, Chien-Chang Peng:
A low power-delay-product and robust Isolated-DICE based SEU-tolerant latch circuit design. 1-13
- Lei Sun, Kong-Pang Pun:
Design considerations of calibration DAC in self-calibrated SAR A/D converters. 14-22 - Farshad Moradi, Georgios Panagopoulos, Georgios Karakonstantis, Hooman Farkhani, Dag T. Wisland, Jens Kargaard Madsen, Hamid Mahmoodi, Kaushik Roy:
Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology. 23-34 - Meng-Ting Hsu, Wei-Jhih Li, Yu-Tuan Hsu:
Design of self-bias tail transistor technique for low phase noise CMOS VCO with harmonic suppression using capacitance ground. 35-42 - Jacques Verdier, Ioan Burciu, Chafia Yahiaoui, Christian Gontrand:
Design and measurements of a RF front-end for Bi-band simultaneous reception. 43-49 - Francesco Centurelli, Roberto Antonio Gualano, Alessandro Trifiletti:
A wideband amplifier topology based on positive capacitive feedback. 50-58 - Ioannis Vourkas, Georgios Ch. Sirakoulis:
Memristor-based combinational circuits: A design methodology for encoders/decoders. 59-70 - Kaijun Song, Fulong Chen, Fan Zhang, Yong Fan:
Synthesis and design method of bandpass-response power divider. 71-77 - Edoardo Giomi, Luca Fanucci, Alessandro Rocchi:
Analog-CMDA based interfaces for MEMS gyroscopes. 78-88 - Fan-Hsiu Huang, Yue-Ming Hsin:
A dual-gate 2nd/3rd-order subharmonic injection-locked oscillator in GaAs PHEMT. 89-94 - Syed Iftekhar Ali, Md. Shafiqul Islam:
A match-line dynamic energy reduction technique for high-speed ternary CAM using dual feedback sense amplifier. 95-101 - Yuh-Shyan Hwang, Jian-Hong Shen, Jiann-Jong Chen, Ming-Ren Fan:
A THD-reduction high-efficiency audio amplifier using inverter-based OTAs with filter-output feedback. 102-109 - Khaldoon Abugharbieh, Yongseon Koh, Shoba Krishnan, Jitendra Mohan:
A 33 mW 12.5 Gbps BiCMOS transmitter for high speed backplane applications. 110-118 - Ding-Lan Shen, Hong-Wen Chen:
A prototypical interface for deep brain stimulation. 119-125 - Zengwei Qi, Yiqi Zhuang, Xiaoming Li, Weifeng Liu, Yongqian Du, Bo Wang:
Full passive UHF RFID Tag with an ultra-low power, small area, high resolution temperature sensor suitable for environment monitoring. 126-131
Volume 45, Number 2, February 2014
- Ravi Patel, Engin Ipek, Eby G. Friedman:
2T-1R STT-MRAM memory cells for enhanced on/off current ratio. 133-143 - Kumar Prasannajit Pradhan, Sushanta Kumar Mohapatra, Prasanna Kumar Sahu, Debakanta Behera:
Impact of high-k gate dielectric on analog and RF performance of nanoscale DG-MOSFET. 144-151 - Mattia Borgarino, Giovanni Betti Beneventi, Valerio Doga, Paolo Pavan:
On the limitations of transimpedance amplifiers as tools for low-frequency noise characterization. 152-158 - Mathias Ekpu, Raj S. Bhatti, Michael I. Okereke, Sabuj Mallik, Kenny C. Otiaba:
The effect of thermal constriction on heat management in a microelectronic application. 159-166 - Anis Souari, Amjad Gawanmeh, Sofiène Tahar, Mohamed Lassaad Ammari:
Design and verification of a frequency domain equalizer. 167-178 - Zia Abbas, Mauro Olivieri:
Impact of technology scaling on leakage power in nano-scale bulk CMOS digital standard cells. 179-195 - B. S. Sreeja:
Low-power CMOS LC QVCO using zero-biased transistor coupling of MWCNT network-based VCO structure. 196-204 - Fengjuan Wang, Zhangming Zhu, Yintang Yang, Xiaoxian Liu, Ruixue Ding:
Capacitance characterization of tapered through-silicon-via considering MOS effect. 205-210 - Taciano Perez, Ney Laert Vilar Calazans, César A. F. De Rose:
System-level impacts of persistent main memory using a search engine. 211-216 - Sophie Dupuis, Ludovic Noury, Nicolas Fel:
A regular fabric design methodology for applications requiring specific layout-level design rules. 217-225 - Hung-Chun Chien, Chih-Yen Chen:
CMOS realization of single-resistance-controlled and variable frequency dual-mode sinusoidal oscillators employing a single DVCCTA with all-grounded passive components. 226-238 - Bibhash Sen, Manojit Dutta, Biplab K. Sikdar:
Efficient design of parity preserving logic in quantum-dot cellular automata targeting enhanced scalability in testing. 239-248 - Jing Wang, Yi-xi Cai, Xin-jie Zhao, Chun Zhang:
Thermal design and simulation of automotive headlamps using white LEDs. 249-255 - Mohsen Hassanpourghadi, Milad Zamani, Mohammad Sharifkhani:
A low-power low-offset dynamic comparator for analog to digital converters. 256-262
Volume 45, Number 3, March 2014
- Aleksej Avramovic, Zdenka Babic, Dusan Raic, Drago Strle, Patricio Bulic:
An approximate logarithmic squaring circuit with error compensation for DSP applications. 263-271 - André V. Boas, Sandro A. P. Haddad, José A. Siqueira Dias:
A CMOS fast transient response low-dropout regulator with a compact NMOS output driver. 272-276 - Hyouk-Kyu Cha, Minkyu Je:
A single-input dual-output 13.56 MHz CMOS AC-DC converter with comparator-driven rectifiers for implantable devices. 277-281 - Abdullah Yesil, Yunus Babacan, Firat Kaçar:
A new DDCC based memristor emulator circuit and its applications. 282-287 - Sahar Sarafi, Abu Khari bin A'Ain, Javad Abbaszadeh:
High-linear, energy-efficient and area-efficient switching algorithm for high-speed SAR ADCs. 288-296 - Mohamed Abouzied, Hatem Osman, Ahmed Emira, Ahmed Nader Mohieldin:
A process-tolerant out-of-band blocker rejection technique for SAW-less receivers. 297-310 - Piotr Amrozik, Andrzej Napieralski:
Timing characterization and constraining tool. 311-324 - Chao Ma, Shuguo Xie, Yunfeng Jia, Guanyu Lin:
Macromodeling of the memristor using piecewise volterra series. 325-329 - Yong-An Li:
Electronically tunable current-mode biquadratic filter and four-phase quadrature oscillator. 330-335 - Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Michel Renovell:
Enhancing confidence in indirect analog/RF testing against the lack of correlation between regular parameters and indirect measurements. 336-344 - Karama M. Al-Tamimi, Munir Ahmad Al-Absi, Muhammad Taher Abuelma'atti:
Temperature insensitive current-mode CMOS exponential function generator and its application in variable gain amplifier. 345-354
Volume 45, Number 4, April 2014
- Vinod Pangracious, Emna Amouri, Zied Marrakchi, Habib Mehrez:
Architecture level optimization of 3-dimensional tree-based FPGA. 355-366 - Chutham Sawigun, Wannaya Ngamkham, Wouter A. Serdijn:
A 0.5-V, 2-nW, 55-dB DR, fourth-order bandpass filter using single branch biquads: An efficient design for FoM enhancement. 367-374 - Shao-Ku Kao:
Frequency presetting and phase error detection technique for fast-locking phase-locked loop. 375-381 - Zhufei Chu, Yinshui Xia, Lun-Yao Wang, Jian Wang:
Efficient nonrectangular shaped voltage island aware floorplanning with nonrandomized searching engine. 382-393 - Wei Wei, Jie Han, Fabrizio Lombardi:
Robust HSPICE modeling of a single electron turnstile. 394-407 - Yogesh Pratap, Pujarini Ghosh, Subhasis Haldar, R. S. Gupta, Mridula Gupta:
An analytical subthreshold current modeling of cylindrical gate all around (CGAA) MOSFET incorporating the influence of device design engineering. 408-415 - Jung-Chang Wang:
Thermal module design and analysis of a 230 W LED illumination lamp under three incline angles. 416-423 - Basel Halak, Teng Ma, Ximeng Wei:
A dynamic CDMA network for multicore systems. 424-434 - Nam-Jin Oh:
A phase-noise reduction technique for RF CMOS voltage-controlled oscillator with a series LC resonator. 435-440 - Vobulapuram Ramesh Kumar, Brajesh Kumar Kaushik, Amalendu Patnaik:
An accurate model for dynamic crosstalk analysis of CMOS gate driven on-chip interconnects using FDTD method. 441-448 - Chie-In Lee, Wei-Cheng Lin, Yan-Ting Lin:
A 2.4 GHz high output power and high efficiency power amplifier operating at inductive breakdown in CMOS technology. 449-453 - Majed ValadBeigi, Farshad Safaei, Bahareh Pourshirazi:
Application-aware virtual paths insertion for NOCs. 454-462 - Gustavo A. Ruiz, Mercedes Granda:
Efficient low-power register array with transposed access mode. 463-467 - Yanlong Zhang, Yiqi Zhuang, Zhenrong Li, Xiaojiao Ren, Bo Wang, Kai Jing, Zengwei Qi:
A 5-bit lumped 0.18-μm CMOS step attenuator with low insertion loss and low phase distortion in 3-22 GHz applications. 468-476 - Xiao-liang Yang, Ying Wang, Bin Du, Cheng-Hao Yu:
Total dose radiation effects of hybrid bulk/SOI CMOS active pixel with buried channel SOI source follower. 477-481
Volume 45, Number 5, May 2014
- Peter E. Raad, András Poppe:
Thermal investigations of integrated circuits in systems at THERMINIC 2012. 483
- Josep Altet, José Luis González, Didac Gómez, Xavier Perpiñà, Wilfrid Claeys, Stéphane Grauby, Cédric Dufis, Miquel Vellvehí, Diego Mateo, Ferran Reverter, Stefan Dilhaire, Xavier Jordà:
Electro-thermal characterization of a differential temperature sensor in a 65 nm CMOS IC: Applications to gain monitoring in RF amplifiers. 484-490 - J. C. Krencker, Jean-Baptiste Kammerer, Y. Hervé, Luc Hébrard:
Electro-thermal high-level modeling of integrated circuits. 491-499 - Fatemeh Kashfi, Jeff Draper:
Thermal sensor allocation for 3DICs using three dimensional thermal sensors. 500-507 - Ali Assy, Séverine Gomès, Patrice Chantrenne, Nicolas Pavy, Jayalakshmi Parasuraman, Xavier Kleber, Philippe Basset:
Investigation of the thermal properties of thin solid materials at different temperature levels using a set of microresistors. 508-514 - Peter E. Raad, Pavel L. Komarov, Mauro A. Bettiati:
Thermoreflectance temperature measurements for optically emitting devices. 515-520 - András Timár, Márta Rencz:
Temperature dependent timing in standard cell designs. 521-529 - Valerio Tenace, Sandeep Miryala, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino:
Row-based body-bias assignment for dynamic thermal clock-skew compensation. 530-538 - G. A. Luiten:
Heat spreading in a thin longitudinal fin. 539-546 - Amirkoushyar Ziabari, Ephraim Suhir, Ali Shakouri:
Minimizing thermally induced interfacial shearing stress in a thermoelectric module with low fractional area coverage. 547-553 - O. Puscasu, Stéphane Monfray, C. Maître, Pierre-Jean Cottinet, D. Rapisarda, Guillaume Savelli, F. Gaillard, G. Ricotti, P. Ancey, Frédéric Boeuf, Daniel Guyomar, Thomas Skotnicki:
A disruptive technology for thermal to electrical energy conversion. 554-558
Volume 45, Number 6, June 2014
- Bong Hyuk Park, Seung Hyun Jang, Philip Ostrovskyy, Jae Ho Jung:
High-speed continuous-time band pass ΔΣ modulator for class-S systems. 559-564 - Chana Leepattarapongpan, Toempong Phetchakul, Naritchaphan Penpondee, Puttapon Pengpad, Arckom Srihapat, Wutthinan Jeamsaksiri, Ekalak Chaowicharat, Charndet Hruanun, Amporn Poyai:
A merged magnetotransistor for 3-axis magnetic field measurement based on carrier recombination-deflection effect. 565-573 - P. Suveetha Dhanaselvam, N. B. Balamurugan:
A 2D sub-threshold current model for single halo triple material surrounding gate (SHTMSG) MOSFETs. 574-577 - Jian Zhang, Wei Zhang, Yanyan Liu:
A fully integrated analog front-end circuit for 13.56 MHz passive RFID tags in conformance with ISO/IEC 18000-3 protocol. 578-588 - Paolo Mantenuto, Giuseppe Ferri, Andrea De Marcellis:
Uncalibrated automatic bridge-based CMOS integrated interfaces for wide-range resistive sensors portable applications. 589-596 - Hadi Owlia, Parviz Keshavarzi, Abdalhossein Rezai:
A novel digital logic implementation approach on nanocrossbar arrays using memristor-based multiplexers. 597-603 - Hailong Yao, Qiang Gao, Yici Cai, Qiang Zhou, Chiu-Wing Sham:
Length matching in detailed routing for analog and mixed signal circuits. 604-612 - Jetsdaporn Satansup, Worapong Tangsrirat:
Compact VDTA-based current-mode electronically tunable universal filters using grounded capacitors. 613-618 - Alessandro Magnani, Mattia Borgarino, Christophe Viallon, Thierry Parra, Gilles Jacquemod:
A low power Ku phase locked oscillator in low cost 130 nm CMOS technology. 619-626 - Meng-Ting Hsu, Tsung-Han Han, Yao-Yen Lee:
Design of Sub-1 mW CMOS LC VCO based on current reused topology with Q-enhancement and body-biased technique. 627-633 - Hung-Chun Chien:
A current-/voltage-controlled four-slope operation square-/triangular-wave generator and a dual-mode pulse width modulation signal generator employing current-feedback operational amplifiers. 634-647 - Kai Jing, Yiqi Zhuang, Zhenrong Li, Zhongfang Zhao, Lipeng Nie:
A SiGe LC-ladder low noise amplifier with base resistance match, gain and noise flatness for UWB applications. 648-656 - Di Li, Yintang Yang, Zhan Jing, Zuo-Chen Shi, Yang Liu:
A fully integrated feedback AGC loop for ZigBee (IEEE 802.15.4) RF transceiver applications. 657-665 - Santanu Sarkar, Swapna Banerjee:
An 8-bit low power DAC with re-used distributed binary cells architecture for reconfigurable transmitters. 666-677 - Wei-feng Lü, Ling-Iing Sun:
Compact modeling of response time and random-dopant-fluctuation-induced variability in nanoscale CMOS inverter. 678-682 - Kai Jing, Yiqi Zhuang, Zhenrong Li, Yongqian Du, Yanlong Zhang:
A SiGe HBT low noise amplifier using on-chip notch filter for K band wireless communication. 683-689 - Yao Xin, Will X. Y. Li, Ray C. C. Cheung, Rosa H. M. Chan, Hong Yan, Dong Song, Theodore W. Berger:
An FPGA based scalable architecture of a stochastic state point process filter (SSPPF) to track the nonlinear dynamics underlying neural spiking. 690-701 - M.-Dolores Cubells-Beltrán, Càndid Reig Escriva, Andrea De Marcellis, E. Figueras, Alberto Yufera, Boris Zadov, Eugene Paperno, Susana Cardoso, Paulo P. Freitas:
Monolithic integration of Giant Magnetoresistance (GMR) devices onto standard processed CMOS dies. 702-707 - Yanhan Zeng, Yuankun Xu, Miaowang Zeng, Hong-Zhou Tan:
An output-capacitor-free low-dropout regulator with subthreshold slew-rate enhancement technique. 708-718 - Chenglin Yang, Junhao Yan, Bing Long, Zhen Liu:
A novel test optimizing algorithm for sequential fault diagnosis. 719-727 - Ayobami Iji, Xi Zhu, Michael Heimlich:
Heuristic receiver for implantable UWB applications. 728-733 - Christoph Eichenseer, Gerhard Pöppel, Thomas Mikolajick:
Localization of temperature sensitive areas on analog circuits. 734-739 - Ebrahim Abiri, Mohammad Reza Salehi, Sanaz Salem:
A low phase noise and low power 3-5 GHz frequency synthesizer in 0.18 µm CMOS technology. 740-750 - Na Zhang, Huaxi Gu, Yintang Yang, Dongrui Fan:
QBNoC: QoS-aware bufferless NoC architecture. 751-758 - Huixiang Huang, Dawei Bi, Zhengxuan Zhang:
Investigation of the total dose response of partially depleted SOI nMOSFETs using TCAD simulation and experiment. 759-766 - Qing Wang, Ning Chen, Shen Xu, Weifeng Sun, Longxing Shi:
Trajectory prediction control for digital control DC-DC converters with fast transient response. 767-774 - Amin Malekpour, Alireza Ejlali, Saeid Gorgin:
A comparative study of energy/power consumption in parallel decimal multipliers. 775-780 - Hourieh Attarzadeh, Mohammad Sharifkhani:
An auto-calibrated, dual-mode SRAM macro using a hybrid offset-cancelled sense amplifier. 781-792 - Xiaopeng Liu, Yan Han, Xiaoxia Han, Mingyu Wang:
An all-digital coherent-like BFSK demodulator. 793-798 - Nicola Petra, Davide De Caro, Valeria Garofalo, Ettore Napoli, Antonio G. M. Strollo:
Truncated squarer with minimum mean-square error. 799-804 - Predrag Bosko Petrovic:
A new tunable current-mode peak detector. 805-814 - Liang Wen, Zhikui Duan, Yi Li, Xiaoyang Zeng:
Analysis of a read disturb-free 9T SRAM cell with bit-interleaving capability. 815-824 - Saurabh Kotiyal, Himanshu Thapliyal, Nagarajan Ranganathan:
Efficient reversible NOR gates and their mapping in optical computing domain. 825-834
Volume 45, Number 7, July 2014
- Shao-Ku Kao, Yi-Fu Tang, Hsiang-Chi Cheng:
A VCO-based phase-expanding conversion designed for time-domain data converters. 835-841 - Ye Zhang, Ralf Wunderlich, Stefan Heinen:
A low-complexity low-spurs digital architecture for wideband PLL applications. 842-847 - Deepon Saha, Subir Kumar Sarkar:
High-speed reduced-leakage SRAM memory cell design techniques for low-power 65 nm FD-SOI/SON CMOS technology. 848-856 - Ji-Zhong Shen, Liang Geng, Guang-Ping Xiang, Jianwei Liang:
Low-power level converting flip-flop with a conditional clock technique in dual supply systems. 857-863 - Marco Pirola, Roberto Quaglia, Giovanni Ghione, Walter Ciccognani, Ernesto Limiti:
13-bit GaAs serial-to-parallel converter with compact layout for core-chip applications. 864-869 - Reza Omidi Gosheblagh, Karim Mohammadi:
Hybrid time and hardware redundancy to mitigate SEU effects on SRAM-FPGAs: Case study over the MicroLAN protocol. 870-879 - Zhangming Zhu, Minjie Liu, Qiyu Wang, Yintang Yang:
A single-channel 8-bit 660 MS/s asynchronous SAR ADC with pre-settling procedure in 65 nm CMOS. 880-885 - Seong Jong Cheon, Jae Yeong Park:
A highly miniaturized LTCC dual-band UWB filter using independent transmission zeros and lowpass filters. 886-892 - F. Kahlouche, K. Youssouf, M. H. Bechir, Stéphane Capraro, A. Siblini, J. P. Chatelon, Cyril Buttay, J. J. Rousseau:
Fabrication and characterization of a planar interleaved micro-transformer with magnetic core. 893-897 - Haikun Jia, Baoyong Chi, Lixue Kuang, Zhihua Wang:
A 77 GHz FMCW radar transmitter with reconfigurable power amplifier in 65 nm CMOS. 898-903 - Jui-Ching Hsieh, David T. W. Lin, Chin-Hsiang Cheng, Siwapong Kingkaew, Sheng-Chung Chen:
The optimal design of the thermal spreading on high power LEDs. 904-909 - Andrea De Marcellis, Giuseppe Ferri, Paolo Mantenuto, Alessandro Depari, Alessandra Flammini, Emiliano Sisinni:
A new 0.35 μm CMOS electronic interface for wide range floating capacitive and grounded/floating resistive sensor applications. 910-920 - Abolfazl Zokaei, Amir Amirabadi:
A 0.13μm dual-band common-gate LNA using active post distortion for mobile WiMAX. 921-929
- Bernard Courtois:
Special Section NANOTECH 2013. 930
- Mariusz Jankowski, Andrzej Napieralski:
Current-controlled switches for HV SoI processes. 931-945 - Mariusz Jankowski, Andrzej Napieralski:
Current-mode signal processing implementation in HV SoI integrated systems. 946-959 - Michal Szermer, Marcin Janicki, Piotr Zajac, Lukasz Kotynia, Mariusz Jankowski, Andrzej Napieralski:
Dedicated thermal emulator for analysis of thermal coupling in many-core processors. 960-965 - Balamurugan Karunamurthy, Thomas Ostermann, Monojit Bhattacharya, Sandipan Maity:
A novel simulation methodology for full chip-package thermo-mechanical reliability investigations. 966-971 - B. S. Pês, J. G. Guimarães, José C. da Costa:
Nanoelectronic SET-based core for network-on-chip architectures. 972-975 - Tomi Roinila, Hongjiang Zeng, Jarmo Verho, Yu Xiao, Matti Vilkko, Pasi Kallio, Jukka Lekkala, Tie Li, Yuelin Wang:
Measuring resistivity of silicon nanowire using pseudo-random binary sequence injection. 976-980 - Grzegorz Janczyk, Tomasz Bieniek, Jerzy Wasowski, Piotr Grabiec:
Investigation on reliability of interconnects in 3D heterogeneous systems by ageing beam resonance method. 981-987
Volume 45, Number 8, August 2014
- Kanagasabapathi Somasundaram, Juha Plosila, Nallasamy Viswanathan:
Deadlock free routing algorithm for minimizing congestion in a Hamiltonian connected recursive 3D-NoCs. 989-1000 - Neeta Pandey, Kirti Gupta, Maneesha Gupta:
An efficient triple-tail cell based PFSCL D latch. 1001-1007 - Mohammad Bagheri, Ahmad Ghanaatian, Adib Abrishamifar, Mahmoud Kamarei:
A cross coupled low phase noise oscillator using an output swing enhancement technique. 1008-1013