BibTeX records: Lionel Bening

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@book{DBLP:books/daglib/0007433,
  author    = {Lionel Bening and
               Harry Foster},
  title     = {Principles of verifiable {RTL} design - a functional coding style
               supporting verification processes in Verilog},
  publisher = {Kluwer},
  year      = {2001},
  isbn      = {978-0-7923-7368-1},
  timestamp = {Fri, 15 Apr 2011 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/books/daglib/0007433.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/BeningF01,
  author    = {Lionel Bening and
               Harry Foster},
  title     = {Optimizing Multiple {EDA} Tools within the {ASIC} Design Flow},
  journal   = {{IEEE} Design {\&} Test of Computers},
  volume    = {18},
  number    = {4},
  pages     = {46--55},
  year      = {2001},
  url       = {https://doi.org/10.1109/54.936248},
  doi       = {10.1109/54.936248},
  timestamp = {Thu, 18 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/dt/BeningF01.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/Bening99,
  author    = {Lionel Bening},
  editor    = {Mary Jane Irwin},
  title     = {A Two-State Methodology for {RTL} Logic Simulation},
  booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans,
               LA, USA, June 21-25, 1999},
  pages     = {672--677},
  publisher = {{ACM} Press},
  year      = {1999},
  url       = {https://doi.org/10.1145/309847.310024},
  doi       = {10.1145/309847.310024},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/dac/Bening99.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/YoussefSB89,
  author    = {Habib Youssef and
               Eugene Shragowitz and
               Lionel Bening},
  title     = {Critical path issue in {VLSI} design},
  booktitle = {1989 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
               1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical
               Papers},
  pages     = {520--523},
  publisher = {{IEEE} Computer Society},
  year      = {1989},
  url       = {https://doi.org/10.1109/ICCAD.1989.77004},
  doi       = {10.1109/ICCAD.1989.77004},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/iccad/YoussefSB89.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BeningLAS82,
  author    = {Lionel Bening and
               Thomas A. Lane and
               Curtis R. Alexander and
               James E. Smith},
  editor    = {James S. Crabbe and
               Charles E. Radke and
               Hillel Ofek},
  title     = {Developments in logic network path delay analysis},
  booktitle = {Proceedings of the 19th Design Automation Conference, {DAC} '82, Las
               Vegas, Nevada, USA, June 14-16, 1982},
  pages     = {605--615},
  publisher = {{ACM/IEEE}},
  year      = {1982},
  url       = {https://doi.org/10.1145/800263.809265},
  doi       = {10.1145/800263.809265},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/dac/BeningLAS82.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/Bening79,
  author    = {Lionel Bening},
  editor    = {David W. Hightower},
  title     = {Developments in computer simulation of gate level physical logic},
  booktitle = {Proceedings of the 16th Design Automation Conference, {DAC} '79, San
               Diego, California, USA, June 25-27, 1979},
  pages     = {561--567},
  publisher = {{ACM}},
  year      = {1979},
  url       = {http://dl.acm.org/citation.cfm?id=811774},
  timestamp = {Thu, 01 Mar 2012 18:20:57 +0100},
  biburl    = {https://dblp.org/rec/conf/dac/Bening79.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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