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ORCIDBibTeX records: Steven Derrien
@inproceedings{DBLP:conf/cc/GoriusRD24,
author = {Jean{-}Michel Gorius and
Simon Rokicki and
Steven Derrien},
editor = {Gabriel Rodr{\'{\i}}guez and
P. Sadayappan and
Aravind Sukumaran{-}Rajam},
title = {A Unified Memory Dependency Framework for Speculative High-Level Synthesis},
booktitle = {Proceedings of the 33rd {ACM} {SIGPLAN} International Conference on
Compiler Construction, {CC} 2024, Edinburgh, United Kingdom, March
2-3, 2024},
pages = {13--25},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3640537.3641581},
doi = {10.1145/3640537.3641581},
timestamp = {Mon, 01 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cc/GoriusRD24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2401-12071,
author = {Corentin Ferry and
Nicolas Derumigny and
Steven Derrien and
Sanjay V. Rajopadhye},
title = {An Irredundant and Compressed Data Layout to Optimize Bandwidth Utilization
of {FPGA} Accelerators},
journal = {CoRR},
volume = {abs/2401.12071},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2401.12071},
doi = {10.48550/ARXIV.2401.12071},
eprinttype = {arXiv},
eprint = {2401.12071},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2401-12071.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FerryYDR23,
author = {Corentin Ferry and
Tomofumi Yuki and
Steven Derrien and
Sanjay V. Rajopadhye},
title = {Increasing {FPGA} Accelerators Memory Bandwidth With a Burst-Friendly
Memory Layout},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {42},
number = {5},
pages = {1546--1559},
year = {2023},
url = {https://doi.org/10.1109/TCAD.2022.3201494},
doi = {10.1109/TCAD.2022.3201494},
timestamp = {Sat, 29 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FerryYDR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/NarmourDR23,
author = {Louis Narmour and
Steven Derrien and
Sanjay V. Rajopadhye},
title = {Automatic Algorithm-Based Fault Tolerance {(AABFT)} of Stencil Computations},
booktitle = {32nd International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2023, Vienna, Austria, October 21-25, 2023},
pages = {187--198},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/PACT58117.2023.00024},
doi = {10.1109/PACT58117.2023.00024},
timestamp = {Tue, 09 Jan 2024 17:46:33 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/NarmourDR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/HoseininasabCD23,
author = {Sara Sadat Hoseininasab and
Caroline Collange and
Steven Derrien},
editor = {Francesca Palumbo and
Georgios Keramidas and
Nikolaos V. Voros and
Pedro C. Diniz},
title = {Rapid Prototyping of Complex Micro-architectures Through High-Level
Synthesis},
booktitle = {Applied Reconfigurable Computing. Architectures, Tools, and Applications
- 19th International Symposium, {ARC} 2023, Cottbus, Germany, September
27-29, 2023, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {14251},
pages = {19--34},
publisher = {Springer},
year = {2023},
url = {https://doi.org/10.1007/978-3-031-42921-7\_2},
doi = {10.1007/978-3-031-42921-7\_2},
timestamp = {Sat, 14 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/HoseininasabCD23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2312-03646,
author = {Corentin Ferry and
Steven Derrien and
Sanjay V. Rajopadhye},
title = {An Irredundant Decomposition of Data Flow with Affine Dependences},
journal = {CoRR},
volume = {abs/2312.03646},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2312.03646},
doi = {10.48550/ARXIV.2312.03646},
eprinttype = {arXiv},
eprint = {2312.03646},
timestamp = {Mon, 01 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2312-03646.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/GoriusRD22,
author = {Jean{-}Michel Gorius and
Simon Rokicki and
Steven Derrien},
title = {SpecHLS: Speculative Accelerator Design Using High-Level Synthesis},
journal = {{IEEE} Micro},
volume = {42},
number = {5},
pages = {99--107},
year = {2022},
url = {https://doi.org/10.1109/MM.2022.3188136},
doi = {10.1109/MM.2022.3188136},
timestamp = {Thu, 22 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/GoriusRD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/HannigD22,
author = {Frank Hannig and
Steven Derrien},
title = {Special Issue on Applied Reconfigurable Computing},
journal = {J. Signal Process. Syst.},
volume = {94},
number = {9},
pages = {847--848},
year = {2022},
url = {https://doi.org/10.1007/s11265-022-01806-y},
doi = {10.1007/S11265-022-01806-Y},
timestamp = {Mon, 24 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/HannigD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/GoriusRD22,
author = {Jean{-}Michel Gorius and
Simon Rokicki and
Steven Derrien},
title = {Design Exploration of {RISC-V} Soft-Cores through Speculative High-Level
Synthesis},
booktitle = {International Conference on Field-Programmable Technology, {(IC)FPT}
2022, Hong Kong, December 5-9, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICFPT56656.2022.9974478},
doi = {10.1109/ICFPT56656.2022.9974478},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpt/GoriusRD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2202-05933,
author = {Corentin Ferry and
Tomofumi Yuki and
Steven Derrien and
Sanjay V. Rajopadhye},
title = {Increasing {FPGA} Accelerators Memory Bandwidth with a Burst-Friendly
Memory Layout},
journal = {CoRR},
volume = {abs/2202.05933},
year = {2022},
url = {https://arxiv.org/abs/2202.05933},
eprinttype = {arXiv},
eprint = {2202.05933},
timestamp = {Fri, 18 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2202-05933.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2211-15933,
author = {Corentin Ferry and
Steven Derrien and
Sanjay V. Rajopadhye},
title = {Maximal Atomic irRedundant Sets: a Usage-based Dataflow Partitioning
Algorithm},
journal = {CoRR},
volume = {abs/2211.15933},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2211.15933},
doi = {10.48550/ARXIV.2211.15933},
eprinttype = {arXiv},
eprint = {2211.15933},
timestamp = {Fri, 02 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2211-15933.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/arc/2021,
editor = {Steven Derrien and
Frank Hannig and
Pedro C. Diniz and
Daniel Chillet},
title = {Applied Reconfigurable Computing. Architectures, Tools, and Applications
- 17th International Symposium, {ARC} 2021, Virtual Event, June 29-30,
2021, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {12700},
publisher = {Springer},
year = {2021},
url = {https://doi.org/10.1007/978-3-030-79025-7},
doi = {10.1007/978-3-030-79025-7},
isbn = {978-3-030-79024-0},
timestamp = {Thu, 01 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/2021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/UguenDLD20,
author = {Yohann Uguen and
Florent de Dinechin and
Victor Lezaud and
Steven Derrien},
title = {Application-Specific Arithmetic in High-Level Synthesis Tools},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {17},
number = {1},
pages = {5:1--5:23},
year = {2020},
url = {https://doi.org/10.1145/3377403},
doi = {10.1145/3377403},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/UguenDLD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DerrienMRY20,
author = {Steven Derrien and
Thibaut Marty and
Simon Rokicki and
Tomofumi Yuki},
title = {Toward Speculative Loop Pipelining for High-Level Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4229--4239},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012866},
doi = {10.1109/TCAD.2020.3012866},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/DerrienMRY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MartyYD20,
author = {Thibaut Marty and
Tomofumi Yuki and
Steven Derrien},
title = {Safe Overclocking for {CNN} Accelerators Through Algorithm-Level Error
Detection},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4777--4790},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2981056},
doi = {10.1109/TCAD.2020.2981056},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MartyYD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jacic/RederKBBAVSDPOSFDUMD19,
author = {Simon Reder and
Fabian Kempf and
Harald Bucher and
J{\"{u}}rgen Becker and
Panayiotis Alefragis and
Nikolaos S. Voros and
Stefanos Skalistis and
Steven Derrien and
Isabelle Puaut and
Oliver Oey and
Timo Stripf and
Christian Ferdinand and
Cl{\'{e}}ment David and
Peer Ulbig and
David M{\"{u}}ller and
Umut Durak},
title = {Worst-Case Execution-Time-Aware Parallelization of Model-Based Avionics
Applications},
journal = {J. Aerosp. Inf. Syst.},
volume = {16},
number = {11},
pages = {521--533},
year = {2019},
url = {https://doi.org/10.2514/1.i010749},
doi = {10.2514/1.I010749},
timestamp = {Fri, 29 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jacic/RederKBBAVSDPOSFDUMD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RokickiRD19,
author = {Simon Rokicki and
Erven Rohou and
Steven Derrien},
title = {Hybrid-DBT: Hardware/Software Dynamic Binary Translation Targeting
{VLIW}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {38},
number = {10},
pages = {1872--1885},
year = {2019},
url = {https://doi.org/10.1109/TCAD.2018.2864288},
doi = {10.1109/TCAD.2018.2864288},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RokickiRD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RokickiRD19,
author = {Simon Rokicki and
Erven Rohou and
Steven Derrien},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Aggressive Memory Speculation in {HW/SW} Co-Designed Machines},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {332--335},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8715010},
doi = {10.23919/DATE.2019.8715010},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RokickiRD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecrts/RouxelSDP19,
author = {Benjamin Rouxel and
Stefanos Skalistis and
Steven Derrien and
Isabelle Puaut},
editor = {Sophie Quinton},
title = {Hiding Communication Delays in Contention-Free Execution for SPM-Based
Multi-Core Architectures},
booktitle = {31st Euromicro Conference on Real-Time Systems, {ECRTS} 2019, July
9-12, 2019, Stuttgart, Germany},
series = {LIPIcs},
volume = {133},
pages = {25:1--25:24},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2019},
url = {https://doi.org/10.4230/LIPIcs.ECRTS.2019.25},
doi = {10.4230/LIPICS.ECRTS.2019.25},
timestamp = {Tue, 11 Feb 2020 15:52:14 +0100},
biburl = {https://dblp.org/rec/conf/ecrts/RouxelSDP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/DardaillonSPD19,
author = {Micka{\"{e}}l Dardaillon and
Stefanos Skalistis and
Isabelle Puaut and
Steven Derrien},
title = {Reconciling Compiler Optimizations and {WCET} Estimation Using Iterative
Compilation},
booktitle = {{IEEE} Real-Time Systems Symposium, {RTSS} 2019, Hong Kong, SAR, China,
December 3-6, 2019},
pages = {133--145},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/RTSS46320.2019.00022},
doi = {10.1109/RTSS46320.2019.00022},
timestamp = {Tue, 14 Apr 2020 17:53:55 +0200},
biburl = {https://dblp.org/rec/conf/rtss/DardaillonSPD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LefeuvreFCGKPD18,
author = {Thomas Lefeuvre and
Imen Fassi and
Christoph Cullmann and
Gernot Gebhard and
Emin{-}Koray Kasnakli and
Isabelle Puaut and
Steven Derrien},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Using polyhedral techniques to tighten {WCET} estimates of optimized
code: {A} case study with array contraction},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {925--930},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342142},
doi = {10.23919/DATE.2018.8342142},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/LefeuvreFCGKPD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RokickiRD18,
author = {Simon Rokicki and
Erven Rohou and
Steven Derrien},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Supporting runtime reconfigurable VLIWs cores through dynamic binary
translation},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {1009--1014},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342160},
doi = {10.23919/DATE.2018.8342160},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RokickiRD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/MartyYD18,
author = {Thibaut Marty and
Tomofumi Yuki and
Steven Derrien},
title = {Enabling Overclocking Through Algorithm-Level Error Detection},
booktitle = {International Conference on Field-Programmable Technology, {FPT} 2018,
Naha, Okinawa, Japan, December 10-14, 2018},
pages = {174--181},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/FPT.2018.00034},
doi = {10.1109/FPT.2018.00034},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/MartyYD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcet/PuautDCGD18,
author = {Isabelle Puaut and
Micka{\"{e}}l Dardaillon and
Christoph Cullmann and
Gernot Gebhard and
Steven Derrien},
editor = {Florian Brandner},
title = {Fine-Grain Iterative Compilation for {WCET} Estimation},
booktitle = {18th International Workshop on Worst-Case Execution Time Analysis,
{WCET} 2018, July 3, 2018, Barcelona, Spain},
series = {OASIcs},
volume = {63},
pages = {9:1--9:12},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2018},
url = {https://doi.org/10.4230/OASIcs.WCET.2018.9},
doi = {10.4230/OASICS.WCET.2018.9},
timestamp = {Tue, 15 Feb 2022 09:40:04 +0100},
biburl = {https://dblp.org/rec/conf/wcet/PuautDCGD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RouxelDP17,
author = {Benjamin Rouxel and
Steven Derrien and
Isabelle Puaut},
title = {Tightening Contention Delays While Scheduling Parallel Applications
on Multi-core Architectures},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {164:1--164:20},
year = {2017},
url = {https://doi.org/10.1145/3126496},
doi = {10.1145/3126496},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/RouxelDP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/DerrienACB17,
author = {Steven Derrien and
Kubilay Atasu and
Jo{\~{a}}o M. P. Cardoso and
J{\"{u}}rgen Becker},
title = {Foreword to the Special Section on Reconfigurable Computing},
journal = {J. Signal Process. Syst.},
volume = {88},
number = {2},
pages = {103--105},
year = {2017},
url = {https://doi.org/10.1007/s11265-017-1237-7},
doi = {10.1007/S11265-017-1237-7},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/DerrienACB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DerrienPABBDDDF17,
author = {Steven Derrien and
Isabelle Puaut and
Panayiotis Alefragis and
Marcus Bednara and
Harald Bucher and
Cl{\'{e}}ment David and
Yann Debray and
Umut Durak and
Imen Fassi and
Christian Ferdinand and
Damien Hardy and
Angeliki Kritikakou and
Gerard K. Rauwerda and
Simon Reder and
Martin Sicks and
Timo Stripf and
Kim Sunesen and
Timon D. ter Braak and
Nikolaos S. Voros and
J{\"{u}}rgen Becker},
editor = {David Atienza and
Giorgio Di Natale},
title = {WCET-aware parallelization of model-based applications for multi-cores:
The {ARGO} approach},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {286--289},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927000},
doi = {10.23919/DATE.2017.7927000},
timestamp = {Tue, 04 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/DerrienPABBDDDF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RokickiRD17,
author = {Simon Rokicki and
Erven Rohou and
Steven Derrien},
editor = {David Atienza and
Giorgio Di Natale},
title = {Hardware-accelerated dynamic binary translation},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {1062--1067},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927147},
doi = {10.23919/DATE.2017.7927147},
timestamp = {Mon, 14 Aug 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RokickiRD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MoussawiD17,
author = {Ali Hassan El Moussawi and
Steven Derrien},
editor = {David Atienza and
Giorgio Di Natale},
title = {Superword level parallelism aware word length optimization},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {1068--1073},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927148},
doi = {10.23919/DATE.2017.7927148},
timestamp = {Mon, 14 Aug 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MoussawiD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/UguenDD17,
author = {Yohann Uguen and
Florent de Dinechin and
Steven Derrien},
title = {A High-Level Synthesis Approach Optimizing Accumulations in Floating-Point
Programs Using Custom Formats and Operators},
booktitle = {25th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2017, Napa, CA, USA, April 30 - May 2,
2017},
pages = {80},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/FCCM.2017.41},
doi = {10.1109/FCCM.2017.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/UguenDD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DeestYRD17,
author = {Ga{\"{e}}l Deest and
Tomofumi Yuki and
Sanjay V. Rajopadhye and
Steven Derrien},
editor = {Marco D. Santambrogio and
Diana G{\"{o}}hringer and
Dirk Stroobandt and
Nele Mentens and
Jari Nurmi},
title = {One size does not fit all: Implementation trade-offs for iterative
stencil computations on FPGAs},
booktitle = {27th International Conference on Field Programmable Logic and Applications,
{FPL} 2017, Ghent, Belgium, September 4-8, 2017},
pages = {1--8},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/FPL.2017.8056781},
doi = {10.23919/FPL.2017.8056781},
timestamp = {Mon, 20 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/DeestYRD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/UguenDD17,
author = {Yohann Uguen and
Florent de Dinechin and
Steven Derrien},
editor = {Marco D. Santambrogio and
Diana G{\"{o}}hringer and
Dirk Stroobandt and
Nele Mentens and
Jari Nurmi},
title = {Bridging high-level synthesis and application-specific arithmetic:
The case study of floating-point summations},
booktitle = {27th International Conference on Field Programmable Logic and Applications,
{FPL} 2017, Ghent, Belgium, September 4-8, 2017},
pages = {1--8},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/FPL.2017.8056792},
doi = {10.23919/FPL.2017.8056792},
timestamp = {Wed, 11 Oct 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/UguenDD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dasip/MoussawiD16,
author = {Ali Hassan El Moussawi and
Steven Derrien},
title = {Demo: SLP-aware word length optimization},
booktitle = {2016 Conference on Design and Architectures for Signal and Image Processing
(DASIP), Rennes, France, October 12-14, 2016},
pages = {233--234},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/DASIP.2016.7853829},
doi = {10.1109/DASIP.2016.7853829},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/dasip/MoussawiD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/EstibalsDMD16,
author = {Nicolas Estibals and
Ga{\"{e}}l Deest and
Ali Hassan El Moussawi and
Steven Derrien},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {System level synthesis for virtual memory enabled hardware threads},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {738--743},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459405/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/EstibalsDMD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/RouxGSD16,
author = {Baptiste Roux and
Matthieu Gautier and
Olivier Sentieys and
Steven Derrien},
title = {Communication-Based Power Modelling for Heterogeneous Multiprocessor
Architectures},
booktitle = {10th {IEEE} International Symposium on Embedded Multicore/Many-core
Systems-on-Chip, {MCSOC} 2016, Lyon, France, September 21-23, 2016},
pages = {209--216},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MCSoC.2016.27},
doi = {10.1109/MCSOC.2016.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mcsoc/RouxGSD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/AbbasDRQCL15,
author = {Naeem Abbas and
Steven Derrien and
Sanjay V. Rajopadhye and
Patrice Quinton and
Alexandre Cornu and
Dominique Lavenier},
title = {Combining execution pipelines to improve parallel implementation of
{HMMER} on {FPGA}},
journal = {Microprocess. Microsystems},
volume = {39},
number = {7},
pages = {457--470},
year = {2015},
url = {https://doi.org/10.1016/j.micpro.2015.06.006},
doi = {10.1016/J.MICPRO.2015.06.006},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/AbbasDRQCL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/arima/ChanaQD14,
author = {Anne{-}Marie Chana and
Patrice Quinton and
Steven Derrien},
title = {Component reuse methodology for multi-clock Data-Flow parallel embedded
Systems},
journal = {{ARIMA} J.},
volume = {18},
year = {2014},
url = {https://doi.org/10.46298/arima.1979},
doi = {10.46298/ARIMA.1979},
timestamp = {Wed, 25 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/arima/ChanaQD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/TovinakereSDH14,
author = {Vivek D. Tovinakere and
Olivier Sentieys and
Steven Derrien and
Christophe Huriaux},
title = {Low Power Reconfigurable Controllers for Wireless Sensor Network Nodes},
booktitle = {22nd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2014, Boston, MA, USA, May 11-13, 2014},
pages = {230--233},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/FCCM.2014.68},
doi = {10.1109/FCCM.2014.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/TovinakereSDH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DeestYSD14,
author = {Ga{\"{e}}l Deest and
Tomofumi Yuki and
Olivier Sentieys and
Steven Derrien},
editor = {Yao{-}Wen Chang},
title = {Toward scalable source level accuracy analysis for floating-point
to fixed-point conversion},
booktitle = {The {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2014, San Jose, CA, USA, November 3-6, 2014},
pages = {726--733},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ICCAD.2014.7001432},
doi = {10.1109/ICCAD.2014.7001432},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iccad/DeestYSD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/StripfOBBRSGAVDSKDMKMP13,
author = {Timo Stripf and
Oliver Oey and
Thomas Bruckschl{\"{o}}gl and
J{\"{u}}rgen Becker and
Gerard K. Rauwerda and
Kim Sunesen and
George Goulas and
Panayiotis Alefragis and
Nikolaos S. Voros and
Steven Derrien and
Olivier Sentieys and
Nikolaos Kavvadias and
Grigoris Dimitroulakos and
Kostas Masselos and
Dimitrios Kritharidis and
Nikolaos Mitas and
Thomas Perschke},
title = {Compiling Scilab to high performance embedded multicore systems},
journal = {Microprocess. Microsystems},
volume = {37},
number = {8-C},
pages = {1033--1049},
year = {2013},
url = {https://doi.org/10.1016/j.micpro.2013.07.004},
doi = {10.1016/J.MICPRO.2013.07.004},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/StripfOBBRSGAVDSKDMKMP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MorvanDQ13,
author = {Antoine Morvan and
Steven Derrien and
Patrice Quinton},
title = {Polyhedral Bubble Insertion: {A} Method to Improve Nested Loop Pipelining
for High-Level Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {32},
number = {3},
pages = {339--352},
year = {2013},
url = {https://doi.org/10.1109/TCAD.2012.2228270},
doi = {10.1109/TCAD.2012.2228270},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MorvanDQ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AlleMD13,
author = {Mythri Alle and
Antoine Morvan and
Steven Derrien},
title = {Runtime dependency analysis for loop pipelining in high-level synthesis},
booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
TX, USA, May 29 - June 07, 2013},
pages = {51:1--51:10},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2463209.2488796},
doi = {10.1145/2463209.2488796},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AlleMD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PashaDS13,
author = {Muhammad Adeel Pasha and
Steven Derrien and
Olivier Sentieys},
title = {Component-Level Datapath Merging in System-Level Design of Wireless
Sensor Node Controllers for FPGA-Based Implementations},
booktitle = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
Alamitos, CA, USA, September 4-6, 2013},
pages = {543--550},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DSD.2013.64},
doi = {10.1109/DSD.2013.64},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/PashaDS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecmdafa/SunCDF13,
author = {Wuliang Sun and
Beno{\^{\i}}t Combemale and
Steven Derrien and
Robert B. France},
editor = {Pieter Van Gorp and
Tom Ritter and
Louis M. Rose},
title = {Using Model Types to Support Contract-Aware Model Substitutability},
booktitle = {Modelling Foundations and Applications - 9th European Conference,
{ECMFA} 2013, Montpellier, France, July 1-5, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7949},
pages = {118--133},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-39013-5\_9},
doi = {10.1007/978-3-642-39013-5\_9},
timestamp = {Wed, 07 Dec 2022 23:14:06 +0100},
biburl = {https://dblp.org/rec/conf/ecmdafa/SunCDF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/YukiMD13,
author = {Tomofumi Yuki and
Antoine Morvan and
Steven Derrien},
title = {Derivation of efficient {FSM} from loop nests},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {286--293},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718367},
doi = {10.1109/FPT.2013.6718367},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/YukiMD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scam/FlochYMMMNALSDCWS13,
author = {Antoine Floch and
Tomofumi Yuki and
Ali El Moussawi and
Antoine Morvan and
Kevin J. M. Martin and
Maxime Naullet and
Mythri Alle and
Ludovic L'Hours and
Nicolas Simon and
Steven Derrien and
Fran{\c{c}}ois Charot and
Christophe Wolinski and
Olivier Sentieys},
title = {GeCoS: {A} framework for prototyping custom hardware design flows},
booktitle = {13th {IEEE} International Working Conference on Source Code Analysis
and Manipulation, {SCAM} 2013, Eindhoven, Netherlands, September 22-23,
2013},
pages = {100--105},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/SCAM.2013.6648190},
doi = {10.1109/SCAM.2013.6648190},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/scam/FlochYMMMNALSDCWS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sosym/JezequelCDGR12,
author = {Jean{-}Marc J{\'{e}}z{\'{e}}quel and
Beno{\^{\i}}t Combemale and
Steven Derrien and
Cl{\'{e}}ment Guy and
Sanjay V. Rajopadhye},
title = {Bridging the chasm between {MDE} and the world of compilation},
journal = {Softw. Syst. Model.},
volume = {11},
number = {4},
pages = {581--597},
year = {2012},
url = {https://doi.org/10.1007/s10270-012-0266-8},
doi = {10.1007/S10270-012-0266-8},
timestamp = {Fri, 09 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sosym/JezequelCDGR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/PashaDS12,
author = {Muhammad Adeel Pasha and
Steven Derrien and
Olivier Sentieys},
title = {System-Level Synthesis for Wireless Sensor Node Controllers: {A} Complete
Design Flow},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {17},
number = {1},
pages = {2:1--2:24},
year = {2012},
url = {https://doi.org/10.1145/2071356.2071358},
doi = {10.1145/2071356.2071358},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/PashaDS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cse/StripfOBKGAVPSDSB12,
author = {Timo Stripf and
Oliver Oey and
Thomas Bruckschl{\"{o}}gl and
Ralf K{\"{o}}nig and
George Goulas and
Panayiotis Alefragis and
Nikolaos S. Voros and
Jordy Potman and
Kim Sunesen and
Steven Derrien and
Olivier Sentieys and
J{\"{u}}rgen Becker},
title = {A Compilation- and Simulation-Oriented Architecture Description Language
for Multicore Systems},
booktitle = {15th {IEEE} International Conference on Computational Science and
Engineering, {CSE} 2012, Paphos, Cyprus, December 5-7, 2012},
pages = {383--390},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ICCSE.2012.60},
doi = {10.1109/ICCSE.2012.60},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cse/StripfOBKGAVPSDSB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/TovinakereSD12,
author = {Vivek D. Tovinakere and
Olivier Sentieys and
Steven Derrien},
editor = {Patrick Groeneveld and
Donatella Sciuto and
Soha Hassoun},
title = {A semiempirical model for wakeup time estimation in power-gated logic
clusters},
booktitle = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San
Francisco, CA, USA, June 3-7, 2012},
pages = {48--55},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2228360.2228371},
doi = {10.1145/2228360.2228371},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/TovinakereSD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/BeckerSOHDMSRSKMGAVKMG12,
author = {J{\"{u}}rgen Becker and
Timo Stripf and
Oliver Oey and
Michael H{\"{u}}bner and
Steven Derrien and
Daniel M{\'{e}}nard and
Olivier Sentieys and
Gerard K. Rauwerda and
Kim Sunesen and
Nikolaos Kavvadias and
Kostas Masselos and
George Goulas and
Panayiotis Alefragis and
Nikolaos S. Voros and
Dimitrios Kritharidis and
Nikolaos Mitas and
Diana G{\"{o}}hringer},
title = {From Scilab to High Performance Embedded Multicore Systems: The {ALMA}
Approach},
booktitle = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme,
Izmir, Turkey, September 5-8, 2012},
pages = {114--121},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DSD.2012.65},
doi = {10.1109/DSD.2012.65},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/BeckerSOHDMSRSKMGAVKMG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecmdafa/GuyCDSJ12,
author = {Cl{\'{e}}ment Guy and
Beno{\^{\i}}t Combemale and
Steven Derrien and
Jim Steel and
Jean{-}Marc J{\'{e}}z{\'{e}}quel},
editor = {Antonio Vallecillo and
Juha{-}Pekka Tolvanen and
Ekkart Kindler and
Harald St{\"{o}}rrle and
Dimitrios S. Kolovos},
title = {On Model Subtyping},
booktitle = {Modelling Foundations and Applications - 8th European Conference,
{ECMFA} 2012, Kongens Lyngby, Denmark, July 2-5, 2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7349},
pages = {400--415},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-31491-9\_30},
doi = {10.1007/978-3-642-31491-9\_30},
timestamp = {Sat, 30 Sep 2023 09:39:26 +0200},
biburl = {https://dblp.org/rec/conf/ecmdafa/GuyCDSJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/StripfOBKHBRSKDMKMGAVDMSGP12,
author = {Timo Stripf and
Oliver Oey and
Thomas Bruckschl{\"{o}}gl and
Ralf K{\"{o}}nig and
Michael H{\"{u}}bner and
J{\"{u}}rgen Becker and
Gerard K. Rauwerda and
Kim Sunesen and
Nikolaos Kavvadias and
Grigoris Dimitroulakos and
Kostas Masselos and
Dimitrios Kritharidis and
Nikolaos Mitas and
George Goulas and
Panayiotis Alefragis and
Nikolaos S. Voros and
Steven Derrien and
Daniel M{\'{e}}nard and
Olivier Sentieys and
Diana G{\"{o}}hringer and
Thomas Perschke},
editor = {Leandro Soares Indrusiak and
Guy Gogniat and
Nikolaos S. Voros},
title = {A flexible approach for compiling scilab to reconfigurable multi-core
embedded systems},
booktitle = {7th International Workshop on Reconfigurable and Communication-Centric
Systems-on-Chip (ReCoSoC), York, United Kingdom, July 9-11, 2012},
pages = {1--8},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ReCoSoC.2012.6322879},
doi = {10.1109/RECOSOC.2012.6322879},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/StripfOBKHBRSKDMKMGAVDMSGP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/GoulasAVVGKDMGDMSHSOBRSKM12,
author = {George Goulas and
Panayiotis Alefragis and
Nikolaos S. Voros and
Christos Valouxis and
Christos Gogos and
Nikolaos Kavvadias and
Grigoris Dimitroulakos and
Kostas Masselos and
Diana G{\"{o}}hringer and
Steven Derrien and
Daniel M{\'{e}}nard and
Olivier Sentieys and
Michael H{\"{u}}bner and
Timo Stripf and
Oliver Oey and
J{\"{u}}rgen Becker and
Gerard K. Rauwerda and
Kim Sunesen and
Dimitrios Kritharidis and
Nikolaos Mitas},
title = {From Scilab to multicore embedded systems: Algorithms and methodologies},
booktitle = {2012 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} XII, Samos, Greece, July 16-19,
2012},
pages = {268--275},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/SAMOS.2012.6404184},
doi = {10.1109/SAMOS.2012.6404184},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/GoulasAVVGKDMGDMSHSOBRSKM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/QuintonCD12,
author = {Patrice Quinton and
Anne{-}Marie Chana and
Steven Derrien},
title = {Efficient hardware implementation of data-flow parallel embedded systems},
booktitle = {2012 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} XII, Samos, Greece, July 16-19,
2012},
pages = {364--371},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/SAMOS.2012.6404202},
doi = {10.1109/SAMOS.2012.6404202},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/QuintonCD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/hal/Derrien11,
author = {Steven Derrien},
title = {Contributions {\`{a}} la conception d'architectures mat{\'{e}}rielles
d{\'{e}}di{\'{e}}es},
year = {2011},
url = {https://tel.archives-ouvertes.fr/tel-00749092},
timestamp = {Fri, 29 Sep 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/hal/Derrien11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/TovinakereSD11,
author = {Vivek D. Tovinakere and
Olivier Sentieys and
Steven Derrien},
title = {A Polynomial Based Approach to Wakeup Time and Energy Estimation in
Power-Gated Logic Clusters},
journal = {J. Low Power Electron.},
volume = {7},
number = {4},
pages = {482--489},
year = {2011},
url = {https://doi.org/10.1166/jolpe.2011.1159},
doi = {10.1166/JOLPE.2011.1159},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/TovinakereSD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/CornuDL11,
author = {Alexandre Cornu and
Steven Derrien and
Dominique Lavenier},
editor = {Andreas Koch and
Ram Krishnamurthy and
John McAllister and
Roger F. Woods and
Tarek A. El{-}Ghazawi},
title = {{HLS} Tools for {FPGA:} Faster Development with Better Performance},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
7th International Symposium, {ARC} 2011, Belfast, UK, March 23-25,
2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6578},
pages = {67--78},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-19475-7\_8},
doi = {10.1007/978-3-642-19475-7\_8},
timestamp = {Fri, 25 Feb 2022 16:33:50 +0100},
biburl = {https://dblp.org/rec/conf/arc/CornuDL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/MorvanDQ11,
author = {Antoine Morvan and
Steven Derrien and
Patrice Quinton},
editor = {Russell Tessier},
title = {Efficient nested loop pipelining in high level synthesis using polyhedral
bubble insertion},
booktitle = {2011 International Conference on Field-Programmable Technology, {FPT}
2011, New Delhi, India, December 12-14, 2011},
pages = {1--10},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/FPT.2011.6132715},
doi = {10.1109/FPT.2011.6132715},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/MorvanDQ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iwomp/BasupalliYRMDQW11,
author = {V. Basupalli and
Tomofumi Yuki and
Sanjay V. Rajopadhye and
Antoine Morvan and
Steven Derrien and
Patrice Quinton and
David Wonnacott},
editor = {Barbara M. Chapman and
William D. Gropp and
Kalyan Kumaran and
Matthias S. M{\"{u}}ller},
title = {ompVerify: Polyhedral Analysis for the OpenMP Programmer},
booktitle = {OpenMP in the Petascale Era - 7th International Workshop on OpenMP,
{IWOMP} 2011, Chicago, IL, USA, June 13-15, 2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6665},
pages = {37--53},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-21487-5\_4},
doi = {10.1007/978-3-642-21487-5\_4},
timestamp = {Wed, 25 Sep 2019 18:20:09 +0200},
biburl = {https://dblp.org/rec/conf/iwomp/BasupalliYRMDQW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/models/FlochYGDCRF11,
author = {Antoine Floch and
Tomofumi Yuki and
Cl{\'{e}}ment Guy and
Steven Derrien and
Beno{\^{\i}}t Combemale and
Sanjay V. Rajopadhye and
Robert B. France},
editor = {Jon Whittle and
Tony Clark and
Thomas K{\"{u}}hne},
title = {Model-Driven Engineering and Optimizing Compilers: {A} Bridge Too
Far?},
booktitle = {Model Driven Engineering Languages and Systems, 14th International
Conference, {MODELS} 2011, Wellington, New Zealand, October 16-21,
2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6981},
pages = {608--622},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-24485-8\_45},
doi = {10.1007/978-3-642-24485-8\_45},
timestamp = {Sat, 30 Sep 2023 09:53:36 +0200},
biburl = {https://dblp.org/rec/conf/models/FlochYGDCRF11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DSD11,
author = {Vivek D. Tovinakere and
Olivier Sentieys and
Steven Derrien},
title = {Wakeup Time and Wakeup Energy Estimation in Power-Gated Logic Clusters},
booktitle = {{VLSI} Design 2011: 24th International Conference on {VLSI} Design,
{IIT} Madras, Chennai, India, 2-7 January 2011},
pages = {340--345},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VLSID.2011.18},
doi = {10.1109/VLSID.2011.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DSD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/DerrienQ10,
author = {Steven Derrien and
Patrice Quinton},
title = {Hardware Acceleration of {HMMER} on FPGAs},
journal = {J. Signal Process. Syst.},
volume = {58},
number = {1},
pages = {53--67},
year = {2010},
url = {https://doi.org/10.1007/s11265-008-0262-y},
doi = {10.1007/S11265-008-0262-Y},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/DerrienQ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/PashaDS10,
author = {Muhammad Adeel Pasha and
Steven Derrien and
Olivier Sentieys},
editor = {Sachin S. Sapatnekar},
title = {A complete design-flow for the generation of ultra low-power {WSN}
node architectures based on micro-tasking},
booktitle = {Proceedings of the 47th Design Automation Conference, {DAC} 2010,
Anaheim, California, USA, July 13-18, 2010},
pages = {693--698},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1837274.1837450},
doi = {10.1145/1837274.1837450},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/PashaDS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PashaDS10,
author = {Muhammad Adeel Pasha and
Steven Derrien and
Olivier Sentieys},
editor = {Sebasti{\'{a}}n L{\'{o}}pez},
title = {System Level Synthesis for Ultra Low-Power Wireless Sensor Nodes},
booktitle = {13th Euromicro Conference on Digital System Design, Architectures,
Methods and Tools, {DSD} 2010, 1-3 September 2010, Lille, France},
pages = {493--500},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DSD.2010.88},
doi = {10.1109/DSD.2010.88},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/PashaDS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/AbbasDRQ10,
author = {Naeem Abbas and
Steven Derrien and
Sanjay V. Rajopadhye and
Patrice Quinton},
editor = {Jinian Bian and
Qiang Zhou and
Peter Athanas and
Yajun Ha and
Kang Zhao},
title = {Accelerating {HMMER} on {FPGA} using parallel prefixes and reductions},
booktitle = {Proceedings of the International Conference on Field-Programmable
Technology, {FPT} 2010, 8-10 December 2010, Tsinghua University, Beijing,
China},
pages = {37--44},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/FPT.2010.5681755},
doi = {10.1109/FPT.2010.5681755},
timestamp = {Thu, 01 Feb 2018 14:20:39 +0100},
biburl = {https://dblp.org/rec/conf/fpt/AbbasDRQ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PashaDS09,
author = {Muhammad Adeel Pasha and
Steven Derrien and
Olivier Sentieys},
title = {Ultra Low-power {FSM} for Control Oriented Applications},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
May 2009, Taipei, Taiwan},
pages = {1577--1580},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISCAS.2009.5118071},
doi = {10.1109/ISCAS.2009.5118071},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PashaDS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/DerrienTZKD08,
author = {Steven Derrien and
Alexandru Turjan and
Claudiu Zissulescu and
Bart Kienhuis and
Ed F. Deprettere},
title = {Deriving efficient control in Process Networks with Compaan/Laura},
journal = {Int. J. Embed. Syst.},
volume = {3},
number = {3},
pages = {170--180},
year = {2008},
url = {https://doi.org/10.1504/IJES.2008.020298},
doi = {10.1504/IJES.2008.020298},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijes/DerrienTZKD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/ChikhiDNQ07,
author = {Rayan Chikhi and
Steven Derrien and
Auguste Noumsi and
Patrice Quinton},
editor = {Pedro C. Diniz and
Eduardo Marques and
Koen Bertels and
Marcio Merino Fernandes and
Jo{\~{a}}o M. P. Cardoso},
title = {Combining Flash Memory and FPGAs to Efficiently Implement a Massively
Parallel Algorithm for Content-Based Image Retrieval},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, Third
International Workshop, {ARC} 2007, Mangaratiba, Brazil, March 27-29,
2007},
series = {Lecture Notes in Computer Science},
volume = {4419},
pages = {247--258},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-71431-6\_23},
doi = {10.1007/978-3-540-71431-6\_23},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/arc/ChikhiDNQ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DerrienQ07,
author = {Steven Derrien and
Patrice Quinton},
title = {Parallelizing {HMMER} for Hardware Acceleration on FPGAs},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {10--17},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429951},
doi = {10.1109/ASAP.2007.4429951},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DerrienQ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/NoumsiDQ06,
author = {Auguste Noumsi and
Steven Derrien and
Patrice Quinton},
title = {Acceleration of a content-based image-retrieval application on the
{RDISK} cluster},
booktitle = {20th International Parallel and Distributed Processing Symposium {(IPDPS}
2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/IPDPS.2006.1639346},
doi = {10.1109/IPDPS.2006.1639346},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/NoumsiDQ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/GuyetantGLDRLR05,
author = {St{\'{e}}phane Guyetant and
Mathieu Giraud and
Ludovic L'Hours and
Steven Derrien and
St{\'{e}}phane Rubini and
Dominique Lavenier and
Fr{\'{e}}d{\'{e}}ric Raimbault},
title = {Cluster of re-configurable nodes for scanning large genomic banks},
journal = {Parallel Comput.},
volume = {31},
number = {1},
pages = {73--96},
year = {2005},
url = {https://doi.org/10.1016/j.parco.2004.12.005},
doi = {10.1016/J.PARCO.2004.12.005},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pc/GuyetantGLDRLR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DarteDR05,
author = {Alain Darte and
Steven Derrien and
Tanguy Risset},
title = {Hardware/Software Interface for Multi-Dimensional Processor Arrays},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {28--35},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.38},
doi = {10.1109/ASAP.2005.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DarteDR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/LavenierGDR03,
author = {Dominique Lavenier and
St{\'{e}}phane Guyetant and
Steven Derrien and
St{\'{e}}phane Rubini},
editor = {Toomas P. Plaks},
title = {A Reconfigurable Parallel Disk System for Filtering Genomic Banks},
booktitle = {Proceedings of the International Conference on Engineering of Reconfigurable
Systems and Algorithms, June 23 - 26, 2003, Las Vegas, Nevada, {USA}},
pages = {154--166},
publisher = {{CSREA} Press},
year = {2003},
timestamp = {Fri, 12 Jun 2015 19:15:11 +0200},
biburl = {https://dblp.org/rec/conf/ersa/LavenierGDR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/RajopadhyeD02,
author = {Sanjay V. Rajopadhye and
Steven Derrien},
editor = {El Mostapha Aboulhamid and
Yukihiro Nakamura},
title = {Energy/Power Estimation of Regular Processor Arrays},
booktitle = {Proceedings of the 15th International Symposium on System Synthesis
{(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
pages = {50--55},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2002},
url = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227151},
doi = {10.1109/ISSS.2002.1227151},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isss/RajopadhyeD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/DerrienRS01,
author = {Steven Derrien and
Sanjay V. Rajopadhye and
Susmita Sur{-}Kolay},
title = {Combining Instruction and Loop Level Parallelism for FPGAs},
booktitle = {The 9th Annual {IEEE} Symposium on Field-Programmable Custom Computing
Machines, {FCCM} 2001, Rohnert Park, California, USA, April 29 - May
2, 2001},
pages = {273--282},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/FCCM.2001.18},
doi = {10.1109/FCCM.2001.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/DerrienRS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DerrienR01,
author = {Steven Derrien and
Sanjay V. Rajopadhye},
editor = {Gordon J. Brebner and
Roger F. Woods},
title = {Loop Tiling for Reconfigurable Accelerators},
booktitle = {Field-Programmable Logic and Applications, 11th International Conference,
{FPL} 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2147},
pages = {398--408},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-44687-7\_41},
doi = {10.1007/3-540-44687-7\_41},
timestamp = {Sat, 19 Oct 2019 20:15:05 +0200},
biburl = {https://dblp.org/rec/conf/fpl/DerrienR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/DerrienRS01,
author = {Steven Derrien and
Sanjay V. Rajopadhye and
Susmita Sur{-}Kolay},
editor = {Rom{\'{a}}n Hermida and
El Mostapha Aboulhamid},
title = {Combined instruction and loop parallelism in array synthesis for FPGAs},
booktitle = {Proceedings of the 14th International Symposium on Systems Synthesis,
{ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
30 - October 3, 2001},
pages = {165--170},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2001.957933},
doi = {10.1109/ISSS.2001.957933},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isss/DerrienRS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/DerrienR00,
author = {Steven Derrien and
Sanjay V. Rajopadhye},
title = {{FCCMS} and the Memory Wall},
booktitle = {8th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2000), 17-19 April 2000, Napa Valley, CA, USA, Proceedings},
pages = {329--330},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/FPGA.2000.903439},
doi = {10.1109/FPGA.2000.903439},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/DerrienR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icra/DerrienK00,
author = {Steven Derrien and
Kurt Konolige},
title = {Approximating a Single Viewpoint in Panoramic Imaging Devices},
booktitle = {Proceedings of the 2000 {IEEE} International Conference on Robotics
and Automation, {ICRA} 2000, April 24-28, 2000, San Francisco, CA,
{USA}},
pages = {3931--3938},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/ROBOT.2000.845344},
doi = {10.1109/ROBOT.2000.845344},
timestamp = {Mon, 22 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icra/DerrienK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/parelec/DerrienRS00,
author = {Steven Derrien and
Sanjay V. Rajopadhye and
Susmita Sur{-}Kolay},
title = {Optimal Partitioning for {FPGA} Based Regular Array Implementations},
booktitle = {2000 International Conference on Parallel Computing in Electrical
Engineering {(PARELEC} 2000), 27-30 August 2000, Quebec, Canada},
pages = {155--159},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/PCEE.2000.873620},
doi = {10.1109/PCEE.2000.873620},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/parelec/DerrienRS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/DerrienR00,
author = {Steven Derrien and
Tanguy Risset},
editor = {Hamid R. Arabnia},
title = {Interfacing compiled {FPGA} programs: the MMAlpha approach},
booktitle = {Proceedings of the International Conference on Parallel and Distributed
Processing Techniques and Applications, {PDPTA} 2000, June 24-29,
2000, Las Vegas, Nevada, {USA}},
publisher = {{CSREA} Press},
year = {2000},
timestamp = {Mon, 08 Dec 2003 16:35:08 +0100},
biburl = {https://dblp.org/rec/conf/pdpta/DerrienR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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