BibTeX records: George English

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@article{DBLP:journals/jssc/FluhrBBBDDEFGGGHJKMNPPPRRSSSSSDWWZ15,
  author       = {Eric J. Fluhr and
                  Steve Baumgartner and
                  David W. Boerstler and
                  John F. Bulzacchelli and
                  Timothy Diemoz and
                  Daniel Dreps and
                  George English and
                  Joshua Friedrich and
                  Anne Gattiker and
                  Tilman Gloekler and
                  Christopher J. Gonzalez and
                  Jason Hibbeler and
                  Keith A. Jenkins and
                  Yong Kim and
                  Paul Muench and
                  Ryan Nett and
                  Jose Paredes and
                  Juergen Pille and
                  Donald W. Plass and
                  Phillip J. Restle and
                  Raphael Robertazzi and
                  David Shan and
                  David W. Siljenberg and
                  Michael A. Sperling and
                  Kevin Stawiasz and
                  Gregory S. Still and
                  Zeynep Toprak Deniz and
                  James D. Warnock and
                  Glen A. Wiedemeier and
                  Victor V. Zyuban},
  title        = {The 12-Core POWER8{\texttrademark} Processor With 7.6 Tb/s {IO} Bandwidth,
                  Integrated Voltage Regulation, and Resonant Clocking},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {50},
  number       = {1},
  pages        = {10--23},
  year         = {2015},
  url          = {https://doi.org/10.1109/JSSC.2014.2358553},
  doi          = {10.1109/JSSC.2014.2358553},
  timestamp    = {Fri, 25 Feb 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/FluhrBBBDDEFGGGHJKMNPPPRRSSSSSDWWZ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/DenizSBSKKBGRSD14,
  author       = {Zeynep Toprak Deniz and
                  Michael A. Sperling and
                  John F. Bulzacchelli and
                  Gregory S. Still and
                  Ryan Kruse and
                  Seongwon Kim and
                  David Boerstler and
                  Tilman Gloekler and
                  Raphael Robertazzi and
                  Kevin Stawiasz and
                  Tim Diemoz and
                  George English and
                  David Hui and
                  Paul Muench and
                  Joshua Friedrich},
  title        = {5.2 Distributed system of digitally controlled microregulators enabling
                  per-core {DVFS} for the POWER8\({}^{\mbox{TM}}\) microprocessor},
  booktitle    = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
                  {ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
                  February 9-13, 2014},
  pages        = {98--99},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISSCC.2014.6757354},
  doi          = {10.1109/ISSCC.2014.6757354},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/DenizSBSKKBGRSD14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cicc/RylyakovTESF08,
  author       = {Alexander V. Rylyakov and
                  Jos{\'{e}} A. Tierno and
                  George English and
                  Michael A. Sperling and
                  Daniel J. Friedman},
  title        = {A wide tuning range {(1} GHz-to-15 GHz) fractional-N all-digital {PLL}
                  in 45nm {SOI}},
  booktitle    = {Proceedings of the {IEEE} 2008 Custom Integrated Circuits Conference,
                  {CICC} 2008, DoubleTree Hotel, San Jose, California, USA, September
                  21-24, 2008},
  pages        = {431--434},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/CICC.2008.4672113},
  doi          = {10.1109/CICC.2008.4672113},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/RylyakovTESF08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/RylyakovTEFM07,
  author       = {Alexander V. Rylyakov and
                  Jos{\'{e}} A. Tierno and
                  George English and
                  Daniel J. Friedman and
                  M. Megheli},
  title        = {A Wide Power-Supply Range (0.5V-to-1.3V) Wide Tuning Range {(500}
                  MHz-to-8 GHz) All-Static {CMOS} {AD} {PLL} in 65nm {SOI}},
  booktitle    = {2007 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2007, Digest of Technical Papers, San Francisco, CA, USA, February
                  11-15, 2007},
  pages        = {172--173},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISSCC.2007.373349},
  doi          = {10.1109/ISSCC.2007.373349},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/RylyakovTEFM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}