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BibTeX records: Augusli Kifli
@inproceedings{DBLP:conf/vlsi-dat/KifliW15, author = {Augusli Kifli and Kun{-}Cheng Wu}, title = {SoC test integration platform}, booktitle = {{VLSI} Design, Automation and Test, {VLSI-DAT} 2015, Hsinchu, Taiwan, April 27-29, 2015}, pages = {1--2}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/VLSI-DAT.2015.7114546}, doi = {10.1109/VLSI-DAT.2015.7114546}, timestamp = {Wed, 16 Oct 2019 14:14:54 +0200}, biburl = {https://dblp.org/rec/conf/vlsi-dat/KifliW15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccad/WuTCPHK10, author = {Meng{-}Fan Wu and Kun{-}Han Tsai and Wu{-}Tung Cheng and Hsin{-}Cheih Pan and Jiun{-}Lang Huang and Augusli Kifli}, editor = {Louis Scheffer and Joel R. Phillips and Alan J. Hu}, title = {A scalable quantitative measure of IR-drop effects for scan pattern generation}, booktitle = {2010 International Conference on Computer-Aided Design, {ICCAD} 2010, San Jose, CA, USA, November 7-11, 2010}, pages = {162--167}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ICCAD.2010.5654130}, doi = {10.1109/ICCAD.2010.5654130}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccad/WuTCPHK10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/TsaiHCTK10, author = {Kun{-}Han Tsai and Yu Huang and Wu{-}Tung Cheng and Ting{-}Pu Tai and Augusli Kifli}, editor = {Ron Press and Erik H. Volkerink}, title = {Test cycle power optimization for scan-based designs}, booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX, USA, November 2-4, 2010}, pages = {134--143}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/TEST.2010.5699213}, doi = {10.1109/TEST.2010.5699213}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/TsaiHCTK10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/BaiKLW09, author = {Bing{-}Chuan Bai and Augusli Kifli and Chien{-}Mo James Li and Kun{-}Cheng Wu}, editor = {Kazutoshi Wakabayashi}, title = {Fault modeling and testing of retention flip-flops in low power designs}, booktitle = {Proceedings of the 14th Asia South Pacific Design Automation Conference, {ASP-DAC} 2009, Yokohama, Japan, January 19-22, 2009}, pages = {684--689}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/ASPDAC.2009.4796559}, doi = {10.1109/ASPDAC.2009.4796559}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/aspdac/BaiKLW09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/KifliCTW09, author = {Augusli Kifli and Y. W. Chen and Yu{-}Wen Tsai and Kun{-}Cheng Wu}, title = {A Practical {DFT} Approach for Complex Low Power Designs}, booktitle = {Proceedings of the Eighteentgh Asian Test Symposium, {ATS} 2009, 23-26 November 2009, Taichung, Taiwan}, pages = {90--91}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/ATS.2009.61}, doi = {10.1109/ATS.2009.61}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/KifliCTW09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/BaiLKTW09, author = {Bing{-}Chuan Bai and Chien{-}Mo James Li and Augusli Kifli and Even Tsai and Kun{-}Cheng Wu}, editor = {Gordon W. Roberts and Bill Eklow}, title = {Power scan: {DFT} for power switches in {VLSI} designs}, booktitle = {2009 {IEEE} International Test Conference, {ITC} 2009, Austin, TX, USA, November 1-6, 2009}, pages = {1}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/TEST.2009.5355631}, doi = {10.1109/TEST.2009.5355631}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/BaiLKTW09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/HsiehLLK08, author = {Ming{-}Ting Hsieh and Shun{-}Yen Lu and Jing{-}Jia Liou and Augusli Kifli}, title = {High Quality Pattern Generation for Delay Defects with Functional Sensitized Paths}, booktitle = {17th {IEEE} Asian Test Symposium, {ATS} 2008, Sapporo, Japan, November 24-27, 2008}, pages = {131--136}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/ATS.2008.41}, doi = {10.1109/ATS.2008.41}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/HsiehLLK08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/pieee/GoossensPLGKLP97, author = {Gert Goossens and Johan Van Praet and Dirk Lanneer and Werner Geurts and Augusli Kifli and Clifford Liem and Pierre G. Paulin}, title = {Embedded software in real-time signal processing systems: design technologies}, journal = {Proc. {IEEE}}, volume = {85}, number = {3}, pages = {436--454}, year = {1997}, url = {https://doi.org/10.1109/5.558718}, doi = {10.1109/5.558718}, timestamp = {Mon, 04 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/pieee/GoossensPLGKLP97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsisp/GoossensLPDSKCPCM95, author = {Gert Goossens and Dirk Lanneer and Marc Pauwels and Francis Depuydt and Koen Schoofs and Augusli Kifli and Marco Cornero and Paolo Petroni and Francky Catthoor and Hugo De Man}, title = {Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures}, journal = {J. {VLSI} Signal Process.}, volume = {9}, number = {1-2}, pages = {49--65}, year = {1995}, url = {https://doi.org/10.1007/BF02406470}, doi = {10.1007/BF02406470}, timestamp = {Wed, 20 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsisp/GoossensLPDSKCPCM95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/KifliGM95, author = {Augusli Kifli and G. Goosens and Hugo De Man}, title = {A unified scheduling model for high-level synthesis and code generation}, booktitle = {1995 European Design and Test Conference, ED{\&}TC 1995, Paris, France, March 6-9, 1995}, pages = {234--238}, publisher = {{IEEE} Computer Society}, year = {1995}, url = {https://doi.org/10.1109/EDTC.1995.470397}, doi = {10.1109/EDTC.1995.470397}, timestamp = {Fri, 20 May 2022 15:41:46 +0200}, biburl = {https://dblp.org/rec/conf/date/KifliGM95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dagstuhl/LanneerPKSGTG94, author = {Dirk Lanneer and Johan Van Praet and Augusli Kifli and Koen Schoofs and Werner Geurts and Filip Thoen and Gert Goossens}, editor = {Peter Marwedel and Gert Goossens}, title = {Chess: retargetable code generation for embedded {DSP} processors}, booktitle = {Code Generation for Embedded Processors [Dagstuhl Workshop, Dagstuhl, Germany, August 31 - September 2, 1994]}, pages = {85--102}, publisher = {Kluwer}, year = {1994}, timestamp = {Tue, 19 Jun 2018 18:52:39 +0200}, biburl = {https://dblp.org/rec/conf/dagstuhl/LanneerPKSGTG94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ifip10-2/KifliWZGSM92, author = {Augusli Kifli and R. De Wulf and J. Zegers and Gert Goossens and Paul Six and Hugo De Man}, editor = {Gabriele Saucier and Jacques Trilhe}, title = {Flag/Condition Handling and Branch Assignment for Large Microcoded Controllers}, booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the {IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September, 1992}, series = {{IFIP} Transactions}, volume = {{A-22}}, pages = {61--71}, publisher = {North-Holland}, year = {1992}, timestamp = {Wed, 10 Jul 2002 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/ifip10-2/KifliWZGSM92.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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