BibTeX records: Tai Ly

download as .bib file

@article{DBLP:journals/ijrc/MhaskeKLAS17,
  author       = {Swapnil Mhaske and
                  Hojin Kee and
                  Tai Ly and
                  Ahsan Aziz and
                  Predrag Spasojevic},
  title        = {FPGA-Based Channel Coding Architectures for 5G Wireless Using High-Level
                  Synthesis},
  journal      = {Int. J. Reconfigurable Comput.},
  volume       = {2017},
  pages        = {3689308:1--3689308:23},
  year         = {2017},
  url          = {https://doi.org/10.1155/2017/3689308},
  doi          = {10.1155/2017/3689308},
  timestamp    = {Thu, 02 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijrc/MhaskeKLAS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sarnoff/MhaskeKLS16,
  author       = {Swapnil Mhaske and
                  Hojin Kee and
                  Tai Ly and
                  Predrag Spasojevic},
  title        = {FPGA-accelerated simulation of a hybrid-ARQ system using high level
                  synthesis},
  booktitle    = {37th {IEEE} Sarnoff Symposium 2016, Newark, NJ, USA, September 19-21,
                  2016},
  pages        = {19--21},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/SARNOF.2016.7846753},
  doi          = {10.1109/SARNOF.2016.7846753},
  timestamp    = {Mon, 10 Feb 2020 16:25:22 +0100},
  biburl       = {https://dblp.org/rec/conf/sarnoff/MhaskeKLS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sarnoff/MhaskeUKLAS15,
  author       = {Swapnil Mhaske and
                  David Uliana and
                  Hojin Kee and
                  Tai Ly and
                  Ahsan Aziz and
                  Predrag Spasojevic},
  title        = {A 2.48Gb/s FPGA-based {QC-LDPC} decoder: An algorithmic compiler implementation},
  booktitle    = {36th {IEEE} Sarnoff Symposium 2015, Newark, NJ, USA, September 20-22,
                  2015},
  pages        = {88--93},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/SARNOF.2015.7324649},
  doi          = {10.1109/SARNOF.2015.7324649},
  timestamp    = {Mon, 10 Feb 2020 16:25:22 +0100},
  biburl       = {https://dblp.org/rec/conf/sarnoff/MhaskeUKLAS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vtc/MhaskeKLAS15,
  author       = {Swapnil Mhaske and
                  Hojin Kee and
                  Tai Ly and
                  Ahsan Aziz and
                  Predrag Spasojevic},
  title        = {High-Throughput FPGA-Based {QC-LDPC} Decoder Architecture},
  booktitle    = {{IEEE} 82nd Vehicular Technology Conference, {VTC} Fall 2015, Boston,
                  MA, USA, September 6-9, 2015},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/VTCFall.2015.7390967},
  doi          = {10.1109/VTCFALL.2015.7390967},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/vtc/MhaskeKLAS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/MhaskeKLAS15,
  author       = {Swapnil Mhaske and
                  Hojin Kee and
                  Tai Ly and
                  Ahsan Aziz and
                  Predrag Spasojevic},
  title        = {High-Throughput FPGA-based {QC-LDPC} Decoder Architecture},
  journal      = {CoRR},
  volume       = {abs/1503.02986},
  year         = {2015},
  url          = {http://arxiv.org/abs/1503.02986},
  eprinttype    = {arXiv},
  eprint       = {1503.02986},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/MhaskeKLAS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/MhaskeUKLAS15,
  author       = {Swapnil Mhaske and
                  David Uliana and
                  Hojin Kee and
                  Tai Ly and
                  Ahsan Aziz and
                  Predrag Spasojevic},
  title        = {A 2.48Gb/s {QC-LDPC} Decoder Implementation on the {NI} {USRP-2953R}},
  journal      = {CoRR},
  volume       = {abs/1505.04339},
  year         = {2015},
  url          = {http://arxiv.org/abs/1505.04339},
  eprinttype    = {arXiv},
  eprint       = {1505.04339},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/MhaskeUKLAS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/globalsip/KeeMUAPRBL14,
  author       = {Hojin Kee and
                  Swapnil Mhaske and
                  David Uliana and
                  Adam Arnesen and
                  Newton Petersen and
                  Taylor L. Rich{\'{e}} and
                  Dustyn Blasig and
                  Tai Ly},
  title        = {Rapid and high-level constraint-driven prototyping using lab {VIEW}
                  {FPGA}},
  booktitle    = {2014 {IEEE} Global Conference on Signal and Information Processing,
                  GlobalSIP 2014, Atlanta, GA, USA, December 3-5, 2014},
  pages        = {45--49},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/GlobalSIP.2014.7032075},
  doi          = {10.1109/GLOBALSIP.2014.7032075},
  timestamp    = {Mon, 17 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/globalsip/KeeMUAPRBL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/SunCL09,
  author       = {Yang Sun and
                  Joseph R. Cavallaro and
                  Tai Ly},
  title        = {Scalable and low power {LDPC} decoder design using high level algorithmic
                  synthesis},
  booktitle    = {Annual {IEEE} International SoC Conference, SoCC 2009, September 9-11,
                  2009, Belfast, Northern Ireland, UK, Proceedings},
  pages        = {267--270},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/SOCCON.2009.5398044},
  doi          = {10.1109/SOCCON.2009.5398044},
  timestamp    = {Tue, 06 Sep 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/SunCL09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LyKMM95,
  author       = {Tai Ly and
                  David Knapp and
                  Ron Miller and
                  Don MacMillen},
  editor       = {Bryan Preas},
  title        = {Scheduling Using Behavioral Templates},
  booktitle    = {Proceedings of the 32st Conference on Design Automation, San Francisco,
                  California, USA, Moscone Center, June 12-16, 1995},
  pages        = {101--106},
  publisher    = {{ACM} Press},
  year         = {1995},
  url          = {https://doi.org/10.1145/217474.217514},
  doi          = {10.1145/217474.217514},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/LyKMM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KnappLMM95,
  author       = {David Knapp and
                  Tai Ly and
                  Don MacMillen and
                  Ron Miller},
  editor       = {Bryan Preas},
  title        = {Behavioral Synthesis Methodology for HDL-Based Specification and Validation},
  booktitle    = {Proceedings of the 32st Conference on Design Automation, San Francisco,
                  California, USA, Moscone Center, June 12-16, 1995},
  pages        = {286--291},
  publisher    = {{ACM} Press},
  year         = {1995},
  url          = {https://doi.org/10.1145/217474.217543},
  doi          = {10.1145/217474.217543},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/KnappLMM95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics