BibTeX records: Youngmin Shin

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
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@inproceedings{DBLP:conf/cicc/ParkKCLKSC20,
  author       = {Sungsik Park and
                  Yunhong Kim and
                  Woojun Choi and
                  Yong{-}Tae Lee and
                  Sungbeen Kim and
                  Youngmin Shin and
                  Youngcheol Chae},
  title        = {A DTMOST-based Temperature Sensor with 3{\(\sigma\)} Inaccuracy of
                  {\(\pm\)}0.9{\textdegree}C for Self-Refresh Control in 28nm Mobile
                  {DRAM}},
  booktitle    = {2020 {IEEE} Custom Integrated Circuits Conference, {CICC} 2020, Boston,
                  MA, USA, March 22-25, 2020},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/CICC48029.2020.9075873},
  doi          = {10.1109/CICC48029.2020.9075873},
  timestamp    = {Thu, 18 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/cicc/ParkKCLKSC20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/KimHJLCFLS20,
  author       = {Moonsu Kim and
                  Yun Heo and
                  Seungjae Jung and
                  Kelvin Le and
                  Nathaniel Conos and
                  Hanif Fatemi and
                  Jongpil Lee and
                  Youngmin Shin},
  title        = {A Method of Via Variation Induced Delay Computation},
  booktitle    = {2020 Design, Automation {\&} Test in Europe Conference {\&}
                  Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
  pages        = {1712--1713},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.23919/DATE48585.2020.9116405},
  doi          = {10.23919/DATE48585.2020.9116405},
  timestamp    = {Thu, 25 Jun 2020 12:55:44 +0200},
  biburl       = {https://dblp.org/rec/conf/date/KimHJLCFLS20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/KimKKKKKLLPSS18,
  author       = {Min{-}Su Kim and
                  Ah{-}Reum Kim and
                  Yong{-}geol Kim and
                  Chunghee Kim and
                  Dong{-}Yeop Kim and
                  Jong{-}Woo Kim and
                  Daeseong Lee and
                  Hyun Lee and
                  Jungyul Pyo and
                  Youngmin Shin and
                  Jae Cheol Son},
  title        = {Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for
                  Wide Voltage Scaling},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
                  27-30 May 2018, Florence, Italy},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISCAS.2018.8351444},
  doi          = {10.1109/ISCAS.2018.8351444},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KimKKKKKLLPSS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/ShinRB18,
  author       = {Youngmin Shin and
                  Phillip J. Restle and
                  Edith Beign{\'{e}}},
  title        = {Session 7 overview: Neuromorphic, clocking and security circuits:
                  Digital circuits subcommittee},
  booktitle    = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2018, San Francisco, CA, USA, February 11-15, 2018},
  pages        = {116--117},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISSCC.2018.8310211},
  doi          = {10.1109/ISSCC.2018.8310211},
  timestamp    = {Fri, 25 Feb 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/ShinRB18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/WilcoxSB17,
  author       = {Kathy Wilcox and
                  Youngmin Shin and
                  Edith Beign{\'{e}}},
  title        = {Session 26 overview: Processor-power management and clocking},
  booktitle    = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2017, San Francisco, CA, USA, February 5-9, 2017},
  pages        = {436--437},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISSCC.2017.7870448},
  doi          = {10.1109/ISSCC.2017.7870448},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/WilcoxSB17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/socc/KimKKKKKLCSPSS16,
  author       = {Min{-}Su Kim and
                  Chunghee Kim and
                  Yong{-}geol Kim and
                  Ah{-}Reum Kim and
                  Jikyum Kim and
                  Juhyun Kang and
                  Daeseong Lee and
                  Changjun Choi and
                  Ilsuk Suh and
                  Jungyul Pyo and
                  Youngmin Shin and
                  Jae Cheol Son},
  editor       = {Karan S. Bhatia and
                  Massimo Alioto and
                  Danella Zhao and
                  Andrew Marshall and
                  Ramalingam Sridhar},
  title        = {Single-ended {D} flip-flop with implicit scan mux for high performance
                  mobile {AP}},
  booktitle    = {29th {IEEE} International System-on-Chip Conference, {SOCC} 2016,
                  Seattle, WA, USA, September 6-9, 2016},
  pages        = {91--95},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/SOCC.2016.7905442},
  doi          = {10.1109/SOCC.2016.7905442},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/KimKKKKKLCSPSS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/PyoSLBKKSKOLLLH15,
  author       = {Jungyul Pyo and
                  Youngmin Shin and
                  Hoi{-}Jin Lee and
                  Sung{-}il Bae and
                  Min{-}Su Kim and
                  Kwangil Kim and
                  Ken Shin and
                  Yohan Kwon and
                  Heungchul Oh and
                  Jaeyoung Lim and
                  Dong{-}Wook Lee and
                  Jongho Lee and
                  Inpyo Hong and
                  Kyungkuk Chae and
                  Heon{-}Hee Lee and
                  Sung{-}Wook Lee and
                  Seongho Song and
                  Chunghee Kim and
                  Jin{-}Soo Park and
                  Heesoo Kim and
                  Sunghee Yun and
                  Ukrae Cho and
                  Jae Cheol Son and
                  Sungho Park},
  title        = {23.1 20nm high-K metal-gate heterogeneous 64b quad-core CPUs and hexa-core
                  {GPU} for high-performance and energy-efficient mobile application
                  processor},
  booktitle    = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2015, Digest of Technical Papers, San Francisco, CA, USA, February
                  22-26, 2015},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISSCC.2015.7063105},
  doi          = {10.1109/ISSCC.2015.7063105},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/PyoSLBKKSKOLLLH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/CharnasS15,
  author       = {Andy Charnas and
                  Youngmin Shin},
  title        = {Session 23 overview: Low-power SoCs: High-performance digital subcommittee},
  booktitle    = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2015, Digest of Technical Papers, San Francisco, CA, USA, February
                  22-26, 2015},
  pages        = {418--419},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISSCC.2015.7063104},
  doi          = {10.1109/ISSCC.2015.7063104},
  timestamp    = {Wed, 17 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/CharnasS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/cm/YangPSS13,
  author       = {Se{-}Hyun Yang and
                  Jungyul Pyo and
                  Youngmin Shin and
                  Jae Cheol Son},
  title        = {A 1.6 GHz quad-core application processor manufactured in 32 nm high-k
                  metal gate process for smart mobile devices},
  journal      = {{IEEE} Commun. Mag.},
  volume       = {51},
  number       = {4},
  pages        = {94--98},
  year         = {2013},
  url          = {https://doi.org/10.1109/MCOM.2013.6495767},
  doi          = {10.1109/MCOM.2013.6495767},
  timestamp    = {Wed, 26 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cm/YangPSS13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/KimLPKKSKJCSS13,
  author       = {Min{-}Su Kim and
                  Hyoungwook Lee and
                  Jin{-}Soo Park and
                  Chunghee Kim and
                  Juhyun Kang and
                  Ken Shin and
                  Emil Kagramanyan and
                  Gunok Jung and
                  Ukrae Cho and
                  Youngmin Shin and
                  Jae{-}Cheol Son},
  title        = {Scan-controlled pulse flip-flops for mobile application processors},
  booktitle    = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
                  Beijing, China, May 19-23, 2013},
  pages        = {769--772},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISCAS.2013.6571960},
  doi          = {10.1109/ISCAS.2013.6571960},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KimLPKKSKJCSS13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/ShinSKKLSMKIKCBHJLCHSH13,
  author       = {Youngmin Shin and
                  Ken Shin and
                  Prashant Kenkare and
                  Rajesh Kashyap and
                  Hoi{-}Jin Lee and
                  Dongjoo Seo and
                  Brian Millar and
                  Yohan Kwon and
                  Ravi Iyengar and
                  Min{-}Su Kim and
                  Ahsan Chowdhury and
                  Sung{-}il Bae and
                  Inpyo Hong and
                  Wookyeong Jeong and
                  Aaron Lindner and
                  Ukrae Cho and
                  Keith Hawkins and
                  Jae{-}Cheol Son and
                  Seung Ho Hwang},
  title        = {28nm high- metal-gate heterogeneous quad-core CPUs for high-performance
                  and energy-efficient mobile application processor},
  booktitle    = {2013 {IEEE} International Solid-State Circuits Conference - Digest
                  of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
                  17-21, 2013},
  pages        = {154--155},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISSCC.2013.6487678},
  doi          = {10.1109/ISSCC.2013.6487678},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ShinSKKLSMKIKCBHJLCHSH13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isocc/LeeSSHK12,
  author       = {Hoi{-}Jin Lee and
                  Youngmin Shin and
                  Jae Cheol Son and
                  Tae Hee Han and
                  Bai{-}Sun Kong},
  title        = {An efficient dual-supply design for low-power mobile systems},
  booktitle    = {International SoC Design Conference, {ISOCC} 2012, Jeju Island, South
                  Korea, November 4-7, 2012},
  pages        = {359--362},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISOCC.2012.6407115},
  doi          = {10.1109/ISOCC.2012.6407115},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isocc/LeeSSHK12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/YangLLCLCHCSYKCPPSKYCPH12,
  author       = {Se{-}Hyun Yang and
                  Seogjun Lee and
                  Jae Young Lee and
                  Jeonglae Cho and
                  Hoi{-}Jin Lee and
                  Dongsik Cho and
                  Junghun Heo and
                  Sunghoon Cho and
                  Youngmin Shin and
                  Sunghee Yun and
                  Euiseok Kim and
                  Ukrae Cho and
                  Edward Pyo and
                  Man Hyuk Park and
                  Jae{-}Cheol Son and
                  Chinhyun Kim and
                  Jeongnam Youn and
                  Youngki Chung and
                  Sungho Park and
                  Seung Ho Hwang},
  title        = {A 32nm high-k metal gate application processor with GHz multi-core
                  {CPU}},
  booktitle    = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2012, San Francisco, CA, USA, February 19-23, 2012},
  pages        = {214--216},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISSCC.2012.6176980},
  doi          = {10.1109/ISSCC.2012.6176980},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/YangLLCLCHCSYKCPPSKYCPH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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